[llvm] [IR] Disable unsound inttoptr(ptrtoint(p)) to p fold (PR #161662)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 2 06:19:00 PDT 2025
https://github.com/nikic created https://github.com/llvm/llvm-project/pull/161662
None
>From 9354e96cad3853a2eabb4fd3c0ff5d8933c3b11a Mon Sep 17 00:00:00 2001
From: Nikita Popov <npopov at redhat.com>
Date: Thu, 2 Oct 2025 15:17:58 +0200
Subject: [PATCH] [IR] Disable unsound inttoptr(ptrtoint(p)) to p fold
---
llvm/lib/IR/Instructions.cpp | 2 +-
...leanup-pointer-root-users-gep-constexpr.ll | 12 +++++++++
.../2009-02-20-InstCombine-SROA.ll | 26 ++++++++++++-------
.../callsite_nonnull_args_through_casts.ll | 4 ++-
llvm/test/Transforms/InstCombine/intptr1.ll | 15 ++++++-----
llvm/test/Transforms/InstCombine/intptr2.ll | 6 +++--
llvm/test/Transforms/InstCombine/intptr4.ll | 5 ++--
llvm/test/Transforms/InstCombine/intptr5.ll | 5 ++--
llvm/test/Transforms/InstCombine/intptr7.ll | 5 ++--
.../multi-size-address-space-pointer.ll | 8 ++++--
llvm/test/Transforms/InstCombine/phi.ll | 12 +++++++++
.../InstCombine/ptrauth-intrinsics-call.ll | 20 ++++++++++----
12 files changed, 88 insertions(+), 32 deletions(-)
diff --git a/llvm/lib/IR/Instructions.cpp b/llvm/lib/IR/Instructions.cpp
index 941e41f3127d5..a75435b7ead46 100644
--- a/llvm/lib/IR/Instructions.cpp
+++ b/llvm/lib/IR/Instructions.cpp
@@ -54,7 +54,7 @@
using namespace llvm;
static cl::opt<bool> DisableI2pP2iOpt(
- "disable-i2p-p2i-opt", cl::init(false),
+ "disable-i2p-p2i-opt", cl::init(true),
cl::desc("Disables inttoptr/ptrtoint roundtrip optimization"));
//===----------------------------------------------------------------------===//
diff --git a/llvm/test/Transforms/GlobalOpt/cleanup-pointer-root-users-gep-constexpr.ll b/llvm/test/Transforms/GlobalOpt/cleanup-pointer-root-users-gep-constexpr.ll
index 26728a74d032c..831f6a4652b93 100644
--- a/llvm/test/Transforms/GlobalOpt/cleanup-pointer-root-users-gep-constexpr.ll
+++ b/llvm/test/Transforms/GlobalOpt/cleanup-pointer-root-users-gep-constexpr.ll
@@ -18,6 +18,15 @@ declare void @llvm.memcpy.p0i8.p0i8.i64(ptr, ptr, i64, i1) local_unnamed_addr
define void @stores_single_use_gep_constexpr() {
; CHECK-LABEL: @stores_single_use_gep_constexpr(
; CHECK-NEXT: entry:
+; CHECK-NEXT: store ptr @fn0, ptr @global.20ptr, align 8
+; CHECK-NEXT: store ptr @fn1, ptr getelementptr inbounds ([[STRUCT_GLOBAL_20PTR:%.*]], ptr @global.20ptr, i64 0, i32 1), align 8
+; CHECK-NEXT: store ptr @fn2, ptr getelementptr inbounds ([[STRUCT_GLOBAL_20PTR]], ptr @global.20ptr, i64 0, i32 2), align 8
+; CHECK-NEXT: store ptr @fn3, ptr getelementptr inbounds ([[STRUCT_GLOBAL_20PTR]], ptr @global.20ptr, i64 0, i32 3), align 8
+; CHECK-NEXT: store ptr @fn0, ptr getelementptr inbounds ([[STRUCT_GLOBAL_20PTR]], ptr @global.20ptr, i64 0, i32 4), align 8
+; CHECK-NEXT: store ptr @fn1, ptr getelementptr inbounds ([[STRUCT_GLOBAL_20PTR]], ptr @global.20ptr, i64 0, i32 5), align 8
+; CHECK-NEXT: store ptr @fn2, ptr getelementptr inbounds ([[STRUCT_GLOBAL_20PTR]], ptr @global.20ptr, i64 0, i32 6), align 8
+; CHECK-NEXT: store ptr @fn3, ptr getelementptr inbounds ([[STRUCT_GLOBAL_20PTR]], ptr @global.20ptr, i64 0, i32 7), align 8
+; CHECK-NEXT: store ptr @fn0, ptr getelementptr inbounds ([[STRUCT_GLOBAL_20PTR]], ptr @global.20ptr, i64 0, i32 8), align 8
; CHECK-NEXT: ret void
;
entry:
@@ -36,6 +45,8 @@ entry:
define void @stores_multi_use_gep_constexpr() {
; CHECK-LABEL: @stores_multi_use_gep_constexpr(
; CHECK-NEXT: entry:
+; CHECK-NEXT: store i32 0, ptr getelementptr inbounds ([[STRUCT_GLOBAL_20PTR:%.*]], ptr @global.20ptr, i64 0, i32 16), align 8
+; CHECK-NEXT: store i32 0, ptr getelementptr inbounds ([[STRUCT_GLOBAL_20PTR]], ptr @global.20ptr, i64 0, i32 16), align 8
; CHECK-NEXT: ret void
;
entry:
@@ -47,6 +58,7 @@ entry:
define void @stores_ptrtoint_constexpr() {
; CHECK-LABEL: @stores_ptrtoint_constexpr(
; CHECK-NEXT: entry:
+; CHECK-NEXT: store i32 0, ptr inttoptr (i64 ptrtoint (ptr @global.20ptr to i64) to ptr), align 8
; CHECK-NEXT: ret void
;
entry:
diff --git a/llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll b/llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll
index ef414885bf809..bf030803820c0 100644
--- a/llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll
+++ b/llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll
@@ -26,11 +26,13 @@ define ptr @_Z3fooRSt6vectorIiSaIiEE(ptr %X) {
; IC-NEXT: store i32 42, ptr [[TMP0]], align 4
; IC-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[X:%.*]], i32 4
; IC-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP1]], align 4
-; IC-NEXT: [[TMP3:%.*]] = load ptr, ptr [[X]], align 4
-; IC-NEXT: store ptr [[TMP3]], ptr [[__FIRST_ADDR_I_I]], align 4
-; IC-NEXT: store ptr [[TMP2]], ptr [[__LAST_ADDR_I_I]], align 4
; IC-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP2]] to i32
+; IC-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP4]] to ptr
+; IC-NEXT: [[TMP3:%.*]] = load ptr, ptr [[X]], align 4
; IC-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[TMP3]] to i32
+; IC-NEXT: [[TMP8:%.*]] = inttoptr i32 [[TMP5]] to ptr
+; IC-NEXT: store ptr [[TMP8]], ptr [[__FIRST_ADDR_I_I]], align 4
+; IC-NEXT: store ptr [[TMP2]], ptr [[__LAST_ADDR_I_I]], align 4
; IC-NEXT: [[TMP6:%.*]] = sub i32 [[TMP4]], [[TMP5]]
; IC-NEXT: [[TMP7:%.*]] = ashr i32 [[TMP6]], 4
; IC-NEXT: br label [[BB12_I_I:%.*]]
@@ -147,15 +149,19 @@ define ptr @_Z3fooRSt6vectorIiSaIiEE(ptr %X) {
; IC-NEXT: [[DOT0_0_I_I:%.*]] = phi ptr [ [[TMP62]], [[BB26_I_I]] ], [ [[TMP59]], [[BB24_I_I]] ], [ [[TMP52]], [[BB20_I_I]] ], [ [[TMP45]], [[BB16_I_I]] ], [ [[TMP30]], [[BB10_I_I]] ], [ [[TMP24]], [[BB7_I_I]] ], [ [[TMP18]], [[BB4_I_I]] ], [ [[TMP12]], [[BB1_I_I]] ]
; IC-NEXT: br label [[RETURN:%.*]]
; IC: return:
-; IC-NEXT: ret ptr [[DOT0_0_I_I]]
+; IC-NEXT: [[TMP2_I_I:%.*]] = ptrtoint ptr [[DOT0_0_I_I]] to i32
+; IC-NEXT: [[TMP16:%.*]] = inttoptr i32 [[TMP2_I_I]] to ptr
+; IC-NEXT: ret ptr [[TMP16]]
;
; IC_SROA-LABEL: @_Z3fooRSt6vectorIiSaIiEE(
; IC_SROA-NEXT: entry:
; IC_SROA-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[X:%.*]], i32 4
; IC_SROA-NEXT: [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 4
-; IC_SROA-NEXT: [[TMP2:%.*]] = load ptr, ptr [[X]], align 4
; IC_SROA-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[TMP1]] to i32
+; IC_SROA-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP3]] to ptr
+; IC_SROA-NEXT: [[TMP2:%.*]] = load ptr, ptr [[X]], align 4
; IC_SROA-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP2]] to i32
+; IC_SROA-NEXT: [[TMP8:%.*]] = inttoptr i32 [[TMP4]] to ptr
; IC_SROA-NEXT: [[TMP5:%.*]] = sub i32 [[TMP3]], [[TMP4]]
; IC_SROA-NEXT: [[TMP6:%.*]] = ashr i32 [[TMP5]], 4
; IC_SROA-NEXT: br label [[BB12_I_I:%.*]]
@@ -191,12 +197,12 @@ define ptr @_Z3fooRSt6vectorIiSaIiEE(ptr %X) {
; IC_SROA-NEXT: [[TMP19:%.*]] = add nsw i32 [[__TRIP_COUNT_0_I_I:%.*]], -1
; IC_SROA-NEXT: br label [[BB12_I_I]]
; IC_SROA: bb12.i.i:
-; IC_SROA-NEXT: [[__FIRST_ADDR_I_I_SROA_0_0]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[TMP18]], [[BB11_I_I]] ]
+; IC_SROA-NEXT: [[__FIRST_ADDR_I_I_SROA_0_0]] = phi ptr [ [[TMP8]], [[ENTRY:%.*]] ], [ [[TMP18]], [[BB11_I_I]] ]
; IC_SROA-NEXT: [[__TRIP_COUNT_0_I_I]] = phi i32 [ [[TMP6]], [[ENTRY]] ], [ [[TMP19]], [[BB11_I_I]] ]
; IC_SROA-NEXT: [[TMP20:%.*]] = icmp sgt i32 [[__TRIP_COUNT_0_I_I]], 0
; IC_SROA-NEXT: br i1 [[TMP20]], label [[BB_I_I:%.*]], label [[BB13_I_I:%.*]]
; IC_SROA: bb13.i.i:
-; IC_SROA-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP1]] to i32
+; IC_SROA-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP2]] to i32
; IC_SROA-NEXT: [[TMP22:%.*]] = ptrtoint ptr [[__FIRST_ADDR_I_I_SROA_0_0]] to i32
; IC_SROA-NEXT: [[TMP23:%.*]] = sub i32 [[TMP21]], [[TMP22]]
; IC_SROA-NEXT: [[TMP24:%.*]] = ashr i32 [[TMP23]], 2
@@ -237,10 +243,12 @@ define ptr @_Z3fooRSt6vectorIiSaIiEE(ptr %X) {
; IC_SROA: bb26.i.i:
; IC_SROA-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
; IC_SROA: _ZSt4findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEiET_S7_S7_RKT0_.exit:
-; IC_SROA-NEXT: [[DOT0_0_I_I:%.*]] = phi ptr [ [[TMP1]], [[BB26_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_2]], [[BB24_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_1]], [[BB20_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_0]], [[BB16_I_I]] ], [ [[TMP15]], [[BB10_I_I]] ], [ [[TMP12]], [[BB7_I_I]] ], [ [[TMP9]], [[BB4_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_0]], [[BB1_I_I]] ]
+; IC_SROA-NEXT: [[DOT0_0_I_I:%.*]] = phi ptr [ [[TMP2]], [[BB26_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_2]], [[BB24_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_1]], [[BB20_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_0]], [[BB16_I_I]] ], [ [[TMP15]], [[BB10_I_I]] ], [ [[TMP12]], [[BB7_I_I]] ], [ [[TMP9]], [[BB4_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_0]], [[BB1_I_I]] ]
; IC_SROA-NEXT: br label [[RETURN:%.*]]
; IC_SROA: return:
-; IC_SROA-NEXT: ret ptr [[DOT0_0_I_I]]
+; IC_SROA-NEXT: [[TMP2_I_I:%.*]] = ptrtoint ptr [[DOT0_0_I_I]] to i32
+; IC_SROA-NEXT: [[TMP16:%.*]] = inttoptr i32 [[TMP2_I_I]] to ptr
+; IC_SROA-NEXT: ret ptr [[TMP16]]
;
entry:
%0 = alloca %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"
diff --git a/llvm/test/Transforms/InstCombine/callsite_nonnull_args_through_casts.ll b/llvm/test/Transforms/InstCombine/callsite_nonnull_args_through_casts.ll
index 6cf508af83cea..9bd1fe42029d2 100644
--- a/llvm/test/Transforms/InstCombine/callsite_nonnull_args_through_casts.ll
+++ b/llvm/test/Transforms/InstCombine/callsite_nonnull_args_through_casts.ll
@@ -87,7 +87,9 @@ define void @nonnullAfterPtr2Int() {
; CHECK-LABEL: define void @nonnullAfterPtr2Int() {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
-; CHECK-NEXT: call void @foo(ptr nonnull [[A]])
+; CHECK-NEXT: [[P2I:%.*]] = ptrtoint ptr [[A]] to i64
+; CHECK-NEXT: [[I2P:%.*]] = inttoptr i64 [[P2I]] to ptr
+; CHECK-NEXT: call void @foo(ptr nonnull [[I2P]])
; CHECK-NEXT: ret void
;
entry:
diff --git a/llvm/test/Transforms/InstCombine/intptr1.ll b/llvm/test/Transforms/InstCombine/intptr1.ll
index 2f57dc619dbb1..8ad227d08e1ae 100644
--- a/llvm/test/Transforms/InstCombine/intptr1.ll
+++ b/llvm/test/Transforms/InstCombine/intptr1.ll
@@ -57,18 +57,19 @@ define void @test1_neg(ptr %a, ptr readnone %a_end, ptr %b.i64) {
; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
; CHECK: for.body.preheader:
; CHECK-NEXT: [[B:%.*]] = load i64, ptr [[B_I64:%.*]], align 8
-; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[B]] to ptr
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]], [[BB:%.*]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
-; CHECK-NEXT: [[B_ADDR_02:%.*]] = phi ptr [ [[ADD:%.*]], [[BB]] ], [ [[TMP0]], [[FOR_BODY_PREHEADER]] ]
-; CHECK-NEXT: [[PTRCMP:%.*]] = icmp ult ptr [[B_ADDR_02]], [[A_END]]
+; CHECK-NEXT: [[B_ADDR_02:%.*]] = phi i64 [ [[ADD_INT:%.*]], [[BB]] ], [ [[B]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[TMP:%.*]] = inttoptr i64 [[B_ADDR_02]] to ptr
+; CHECK-NEXT: [[PTRCMP:%.*]] = icmp ugt ptr [[A_END]], [[TMP]]
; CHECK-NEXT: br i1 [[PTRCMP]], label [[FOR_END]], label [[BB]]
; CHECK: bb:
; CHECK-NEXT: [[I1:%.*]] = load float, ptr [[A]], align 4
; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
; CHECK-NEXT: store float [[MUL_I]], ptr [[A_ADDR_03]], align 4
-; CHECK-NEXT: [[ADD]] = getelementptr inbounds nuw i8, ptr [[A]], i64 4
+; CHECK-NEXT: [[ADD:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 4
+; CHECK-NEXT: [[ADD_INT]] = ptrtoint ptr [[ADD]] to i64
; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr [[A_ADDR_03]], i64 4
; CHECK-NEXT: [[CMP:%.*]] = icmp ult ptr [[INCDEC_PTR]], [[A_END]]
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]]
@@ -218,10 +219,12 @@ define void @test4(ptr %a, ptr readnone %a_end, ptr %b.float) {
; CHECK: for.body:
; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
; CHECK-NEXT: [[B_ADDR_02_IN:%.*]] = phi ptr [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B_F]], [[FOR_BODY_PREHEADER]] ]
-; CHECK-NEXT: [[I1:%.*]] = load float, ptr [[B_ADDR_02_IN]], align 4
+; CHECK-NEXT: [[B_ADDR_02:%.*]] = ptrtoint ptr [[B_ADDR_02_IN]] to i64
+; CHECK-NEXT: [[TMP:%.*]] = inttoptr i64 [[B_ADDR_02]] to ptr
+; CHECK-NEXT: [[I1:%.*]] = load float, ptr [[TMP]], align 4
; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
; CHECK-NEXT: store float [[MUL_I]], ptr [[A_ADDR_03]], align 4
-; CHECK-NEXT: [[ADD]] = getelementptr inbounds nuw i8, ptr [[B_ADDR_02_IN]], i64 4
+; CHECK-NEXT: [[ADD]] = getelementptr inbounds nuw i8, ptr [[TMP]], i64 4
; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr [[A_ADDR_03]], i64 4
; CHECK-NEXT: [[CMP:%.*]] = icmp ult ptr [[INCDEC_PTR]], [[A_END]]
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]]
diff --git a/llvm/test/Transforms/InstCombine/intptr2.ll b/llvm/test/Transforms/InstCombine/intptr2.ll
index f7bdc0895b6bd..ede19b198f90a 100644
--- a/llvm/test/Transforms/InstCombine/intptr2.ll
+++ b/llvm/test/Transforms/InstCombine/intptr2.ll
@@ -12,10 +12,12 @@ define void @test1(ptr %a, ptr readnone %a_end, ptr %b.i) {
; CHECK: for.body:
; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
; CHECK-NEXT: [[B_ADDR_02_IN:%.*]] = phi ptr [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B_I]], [[FOR_BODY_PREHEADER]] ]
-; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[B_ADDR_02_IN]], align 4
+; CHECK-NEXT: [[B_ADDR_02:%.*]] = ptrtoint ptr [[B_ADDR_02_IN]] to i64
+; CHECK-NEXT: [[TMP:%.*]] = inttoptr i64 [[B_ADDR_02]] to ptr
+; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[TMP]], align 4
; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[TMP1]], 4.200000e+01
; CHECK-NEXT: store float [[MUL_I]], ptr [[A_ADDR_03]], align 4
-; CHECK-NEXT: [[ADD]] = getelementptr inbounds nuw i8, ptr [[B_ADDR_02_IN]], i64 4
+; CHECK-NEXT: [[ADD]] = getelementptr inbounds nuw i8, ptr [[TMP]], i64 4
; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr [[A_ADDR_03]], i64 4
; CHECK-NEXT: [[CMP:%.*]] = icmp ult ptr [[INCDEC_PTR]], [[A_END]]
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]]
diff --git a/llvm/test/Transforms/InstCombine/intptr4.ll b/llvm/test/Transforms/InstCombine/intptr4.ll
index 671ed1ccc3dfb..51a43ef7c942e 100644
--- a/llvm/test/Transforms/InstCombine/intptr4.ll
+++ b/llvm/test/Transforms/InstCombine/intptr4.ll
@@ -8,12 +8,13 @@ define void @test(ptr %a, ptr readnone %a_end, i64 %b, ptr %bf) unnamed_addr {
; CHECK-NEXT: [[B_FLOAT:%.*]] = inttoptr i64 [[B:%.*]] to ptr
; CHECK-NEXT: br i1 [[CMP1]], label [[BB1:%.*]], label [[BB2:%.*]]
; CHECK: bb1:
-; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[B]] to ptr
; CHECK-NEXT: br label [[FOR_BODY_PREHEADER:%.*]]
; CHECK: bb2:
+; CHECK-NEXT: [[BFI:%.*]] = ptrtoint ptr [[BF:%.*]] to i64
; CHECK-NEXT: br label [[FOR_BODY_PREHEADER]]
; CHECK: for.body.preheader:
-; CHECK-NEXT: [[B_PHI:%.*]] = phi ptr [ [[TMP0]], [[BB1]] ], [ [[BF:%.*]], [[BB2]] ]
+; CHECK-NEXT: [[B_PHI1:%.*]] = phi i64 [ [[B]], [[BB1]] ], [ [[BFI]], [[BB2]] ]
+; CHECK-NEXT: [[B_PHI:%.*]] = inttoptr i64 [[B_PHI1]] to ptr
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
diff --git a/llvm/test/Transforms/InstCombine/intptr5.ll b/llvm/test/Transforms/InstCombine/intptr5.ll
index fa7a9a785231b..040c97c3b75be 100644
--- a/llvm/test/Transforms/InstCombine/intptr5.ll
+++ b/llvm/test/Transforms/InstCombine/intptr5.ll
@@ -8,12 +8,13 @@ define void @test(ptr %a, ptr readnone %a_end, i64 %b, ptr %bf) unnamed_addr {
; CHECK-NEXT: [[B_FLOAT:%.*]] = inttoptr i64 [[B:%.*]] to ptr
; CHECK-NEXT: br i1 [[CMP1]], label [[BB1:%.*]], label [[BB2:%.*]]
; CHECK: bb1:
-; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[B]] to ptr
; CHECK-NEXT: br label [[FOR_BODY_PREHEADER:%.*]]
; CHECK: bb2:
+; CHECK-NEXT: [[BFI:%.*]] = ptrtoint ptr [[BF:%.*]] to i64
; CHECK-NEXT: br label [[FOR_BODY_PREHEADER]]
; CHECK: for.body.preheader:
-; CHECK-NEXT: [[B_PHI:%.*]] = phi ptr [ [[TMP0]], [[BB1]] ], [ [[BF:%.*]], [[BB2]] ]
+; CHECK-NEXT: [[B_PHI1:%.*]] = phi i64 [ [[B]], [[BB1]] ], [ [[BFI]], [[BB2]] ]
+; CHECK-NEXT: [[B_PHI:%.*]] = inttoptr i64 [[B_PHI1]] to ptr
; CHECK-NEXT: switch i64 [[B]], label [[FOR_BODY:%.*]] [
; CHECK-NEXT: i64 1, label [[FOR_BODY]]
; CHECK-NEXT: ]
diff --git a/llvm/test/Transforms/InstCombine/intptr7.ll b/llvm/test/Transforms/InstCombine/intptr7.ll
index 3120f028bd59b..4638ffb704fa1 100644
--- a/llvm/test/Transforms/InstCombine/intptr7.ll
+++ b/llvm/test/Transforms/InstCombine/intptr7.ll
@@ -51,15 +51,16 @@ define void @no_matching_phi(i64 %a, ptr %b, i1 %cond) {
; CHECK-NEXT: [[ADDB:%.*]] = getelementptr inbounds nuw i8, ptr [[B:%.*]], i64 8
; CHECK-NEXT: br i1 [[COND:%.*]], label [[B:%.*]], label [[A:%.*]]
; CHECK: A:
-; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[ADD_INT]] to ptr
; CHECK-NEXT: br label [[C:%.*]]
; CHECK: B:
+; CHECK-NEXT: [[ADDB_INT:%.*]] = ptrtoint ptr [[ADDB]] to i64
; CHECK-NEXT: [[ADD:%.*]] = inttoptr i64 [[ADD_INT]] to ptr
; CHECK-NEXT: store float 1.000000e+01, ptr [[ADD]], align 4
; CHECK-NEXT: br label [[C]]
; CHECK: C:
; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi ptr [ [[ADDB]], [[A]] ], [ [[ADD]], [[B]] ]
-; CHECK-NEXT: [[B_ADDR_02:%.*]] = phi ptr [ [[TMP0]], [[A]] ], [ [[ADDB]], [[B]] ]
+; CHECK-NEXT: [[B_ADDR_2:%.*]] = phi i64 [ [[ADD_INT]], [[A]] ], [ [[ADDB_INT]], [[B]] ]
+; CHECK-NEXT: [[B_ADDR_02:%.*]] = inttoptr i64 [[B_ADDR_2]] to ptr
; CHECK-NEXT: [[I1:%.*]] = load float, ptr [[B_ADDR_02]], align 4
; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
; CHECK-NEXT: store float [[MUL_I]], ptr [[A_ADDR_03]], align 4
diff --git a/llvm/test/Transforms/InstCombine/multi-size-address-space-pointer.ll b/llvm/test/Transforms/InstCombine/multi-size-address-space-pointer.ll
index df3152a6a4353..acd19100557e1 100644
--- a/llvm/test/Transforms/InstCombine/multi-size-address-space-pointer.ll
+++ b/llvm/test/Transforms/InstCombine/multi-size-address-space-pointer.ll
@@ -49,7 +49,9 @@ define i32 @test_as3(ptr addrspace(3) %a) {
define i32 @test_combine_ptrtoint(ptr addrspace(2) %a) {
; CHECK-LABEL: @test_combine_ptrtoint(
-; CHECK-NEXT: [[Y:%.*]] = load i32, ptr addrspace(2) [[A:%.*]], align 4
+; CHECK-NEXT: [[CAST:%.*]] = ptrtoint ptr addrspace(2) [[A1:%.*]] to i8
+; CHECK-NEXT: [[A:%.*]] = inttoptr i8 [[CAST]] to ptr addrspace(2)
+; CHECK-NEXT: [[Y:%.*]] = load i32, ptr addrspace(2) [[A]], align 4
; CHECK-NEXT: ret i32 [[Y]]
;
%cast = ptrtoint ptr addrspace(2) %a to i8
@@ -70,7 +72,9 @@ define i8 @test_combine_inttoptr(i8 %a) {
define i32 @test_combine_vector_ptrtoint(<2 x ptr addrspace(2)> %a) {
; CHECK-LABEL: @test_combine_vector_ptrtoint(
; CHECK-NEXT: [[P:%.*]] = extractelement <2 x ptr addrspace(2)> [[A:%.*]], i64 0
-; CHECK-NEXT: [[Y:%.*]] = load i32, ptr addrspace(2) [[P]], align 4
+; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr addrspace(2) [[P]] to i8
+; CHECK-NEXT: [[P1:%.*]] = inttoptr i8 [[TMP2]] to ptr addrspace(2)
+; CHECK-NEXT: [[Y:%.*]] = load i32, ptr addrspace(2) [[P1]], align 4
; CHECK-NEXT: ret i32 [[Y]]
;
%cast = ptrtoint <2 x ptr addrspace(2)> %a to <2 x i8>
diff --git a/llvm/test/Transforms/InstCombine/phi.ll b/llvm/test/Transforms/InstCombine/phi.ll
index 3454835d3ad65..430f04efc9104 100644
--- a/llvm/test/Transforms/InstCombine/phi.ll
+++ b/llvm/test/Transforms/InstCombine/phi.ll
@@ -341,6 +341,7 @@ declare i1 @test11a()
define i1 @test11() {
; CHECK-LABEL: @test11(
; CHECK-NEXT: entry:
+; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[B:%.*]] = call i1 @test11a()
; CHECK-NEXT: br i1 [[B]], label [[ONE:%.*]], label [[TWO:%.*]]
; CHECK: one:
@@ -350,6 +351,9 @@ define i1 @test11() {
; CHECK-NEXT: [[D:%.*]] = call i1 @test11a()
; CHECK-NEXT: br i1 [[D]], label [[ONE]], label [[END]]
; CHECK: end:
+; CHECK-NEXT: [[I:%.*]] = ptrtoint ptr [[A]] to i64
+; CHECK-NEXT: [[G:%.*]] = inttoptr i64 [[I]] to ptr
+; CHECK-NEXT: store i32 10, ptr [[G]], align 4
; CHECK-NEXT: [[Z:%.*]] = call i1 @test11a()
; CHECK-NEXT: ret i1 [[Z]]
;
@@ -841,6 +845,7 @@ declare i1 @test25a()
define i1 @test25() {
; CHECK-LABEL: @test25(
; CHECK-NEXT: entry:
+; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[B:%.*]] = call i1 @test25a()
; CHECK-NEXT: br i1 [[B]], label [[ONE:%.*]], label [[TWO:%.*]]
; CHECK: one:
@@ -850,6 +855,9 @@ define i1 @test25() {
; CHECK-NEXT: [[D:%.*]] = call i1 @test25a()
; CHECK-NEXT: br i1 [[D]], label [[ONE]], label [[END]]
; CHECK: end:
+; CHECK-NEXT: [[I:%.*]] = ptrtoint ptr [[A]] to i64
+; CHECK-NEXT: [[G:%.*]] = inttoptr i64 [[I]] to ptr
+; CHECK-NEXT: store i32 10, ptr [[G]], align 4
; CHECK-NEXT: [[Z:%.*]] = call i1 @test25a()
; CHECK-NEXT: ret i1 [[Z]]
;
@@ -938,6 +946,7 @@ declare i1 @test26a()
define i1 @test26(i32 %n) {
; CHECK-LABEL: @test26(
; CHECK-NEXT: entry:
+; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[B:%.*]] = call i1 @test26a()
; CHECK-NEXT: br label [[ONE:%.*]]
; CHECK: one:
@@ -956,6 +965,9 @@ define i1 @test26(i32 %n) {
; CHECK-NEXT: [[E:%.*]] = call i1 @test26a()
; CHECK-NEXT: br i1 [[E]], label [[ONE]], label [[TWO]]
; CHECK: end:
+; CHECK-NEXT: [[I:%.*]] = ptrtoint ptr [[A]] to i64
+; CHECK-NEXT: [[G:%.*]] = inttoptr i64 [[I]] to ptr
+; CHECK-NEXT: store i32 10, ptr [[G]], align 4
; CHECK-NEXT: [[Z:%.*]] = call i1 @test26a()
; CHECK-NEXT: ret i1 [[Z]]
;
diff --git a/llvm/test/Transforms/InstCombine/ptrauth-intrinsics-call.ll b/llvm/test/Transforms/InstCombine/ptrauth-intrinsics-call.ll
index 5e597c9155f40..c4fe4e8284c56 100644
--- a/llvm/test/Transforms/InstCombine/ptrauth-intrinsics-call.ll
+++ b/llvm/test/Transforms/InstCombine/ptrauth-intrinsics-call.ll
@@ -3,7 +3,9 @@
define i32 @test_ptrauth_call_sign(ptr %p) {
; CHECK-LABEL: @test_ptrauth_call_sign(
-; CHECK-NEXT: [[V3:%.*]] = call i32 [[P:%.*]]()
+; CHECK-NEXT: [[V0:%.*]] = ptrtoint ptr [[P1:%.*]] to i64
+; CHECK-NEXT: [[P:%.*]] = inttoptr i64 [[V0]] to ptr
+; CHECK-NEXT: [[V3:%.*]] = call i32 [[P]]()
; CHECK-NEXT: ret i32 [[V3]]
;
%v0 = ptrtoint ptr %p to i64
@@ -15,7 +17,9 @@ define i32 @test_ptrauth_call_sign(ptr %p) {
define i32 @test_ptrauth_call_sign_otherbundle(ptr %p) {
; CHECK-LABEL: @test_ptrauth_call_sign_otherbundle(
-; CHECK-NEXT: [[V3:%.*]] = call i32 [[P:%.*]]() [ "somebundle"(ptr null), "otherbundle"(i64 0) ]
+; CHECK-NEXT: [[V0:%.*]] = ptrtoint ptr [[P1:%.*]] to i64
+; CHECK-NEXT: [[P:%.*]] = inttoptr i64 [[V0]] to ptr
+; CHECK-NEXT: [[V3:%.*]] = call i32 [[P]]() [ "somebundle"(ptr null), "otherbundle"(i64 0) ]
; CHECK-NEXT: ret i32 [[V3]]
;
%v0 = ptrtoint ptr %p to i64
@@ -27,7 +31,9 @@ define i32 @test_ptrauth_call_sign_otherbundle(ptr %p) {
define i32 @test_ptrauth_call_resign(ptr %p) {
; CHECK-LABEL: @test_ptrauth_call_resign(
-; CHECK-NEXT: [[V3:%.*]] = call i32 [[P:%.*]]() [ "ptrauth"(i32 1, i64 1234) ]
+; CHECK-NEXT: [[V0:%.*]] = ptrtoint ptr [[P1:%.*]] to i64
+; CHECK-NEXT: [[P:%.*]] = inttoptr i64 [[V0]] to ptr
+; CHECK-NEXT: [[V3:%.*]] = call i32 [[P]]() [ "ptrauth"(i32 1, i64 1234) ]
; CHECK-NEXT: ret i32 [[V3]]
;
%v0 = ptrtoint ptr %p to i64
@@ -40,7 +46,9 @@ define i32 @test_ptrauth_call_resign(ptr %p) {
define i32 @test_ptrauth_call_resign_blend(ptr %pp) {
; CHECK-LABEL: @test_ptrauth_call_resign_blend(
; CHECK-NEXT: [[V01:%.*]] = load ptr, ptr [[PP:%.*]], align 8
-; CHECK-NEXT: [[V6:%.*]] = call i32 [[V01]]() [ "ptrauth"(i32 1, i64 1234) ]
+; CHECK-NEXT: [[V2:%.*]] = ptrtoint ptr [[V01]] to i64
+; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i64 [[V2]] to ptr
+; CHECK-NEXT: [[V6:%.*]] = call i32 [[TMP1]]() [ "ptrauth"(i32 1, i64 1234) ]
; CHECK-NEXT: ret i32 [[V6]]
;
%v0 = load ptr, ptr %pp, align 8
@@ -57,8 +65,10 @@ define i32 @test_ptrauth_call_resign_blend_2(ptr %pp) {
; CHECK-LABEL: @test_ptrauth_call_resign_blend_2(
; CHECK-NEXT: [[V01:%.*]] = load ptr, ptr [[PP:%.*]], align 8
; CHECK-NEXT: [[V1:%.*]] = ptrtoint ptr [[PP]] to i64
+; CHECK-NEXT: [[V2:%.*]] = ptrtoint ptr [[V01]] to i64
; CHECK-NEXT: [[V3:%.*]] = call i64 @llvm.ptrauth.blend(i64 [[V1]], i64 5678)
-; CHECK-NEXT: [[V6:%.*]] = call i32 [[V01]]() [ "ptrauth"(i32 0, i64 [[V3]]) ]
+; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i64 [[V2]] to ptr
+; CHECK-NEXT: [[V6:%.*]] = call i32 [[TMP1]]() [ "ptrauth"(i32 0, i64 [[V3]]) ]
; CHECK-NEXT: ret i32 [[V6]]
;
%v0 = load ptr, ptr %pp, align 8
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