[llvm] [AMDGPU] Emit b32 movs if (a)v_mov_b64_pseudo dest vgprs are misaligned (PR #160547)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 1 08:44:10 PDT 2025


arsenm wrote:

> The bug I'm seeing is more so with `AV_MOV_B64_IMM_PSEUDO` than `V_MOV_B64_PSEUDO` but they're related as `AV_MOV_B64_IMM_PSEUDO` does a fallthrough into `V_MOV_B64_PSEUDO` which already assumes an aligned pair whereas `AV_MOV_B64_IMM_PSEUDO` doesn't. This means that it may emit a `v_mov_b64` on a misaligned register pair for `AV_MOV_B64_IMM_PSEUDO`, see https://godbolt.org/z/ch9qcWc3s
> 
> Should I include the relaxation of `V_MOV_B64_PSEUDO`'s register alignment restriction in this PR?

Might as well, they're kind of a pair 

https://github.com/llvm/llvm-project/pull/160547


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