[llvm] 133406e - Reserve R9 on armv6 iOS 2.x (#150835)

[via llvm-commits]

Author: Un1q32
Date: 2025-09-30T21:05:27-07:00
New Revision: 133406e3d9afb845426898154ecf532a75056d37

URL: https://github.com/llvm/llvm-project/commit/133406e3d9afb845426898154ecf532a75056d37
DIFF: https://github.com/llvm/llvm-project/commit/133406e3d9afb845426898154ecf532a75056d37.diff

LOG: Reserve R9 on armv6 iOS 2.x (#150835)

The iOS 2.x ABI had R9 as a reserved register, 3.0 made it available,
but support for the 2.x ABI was never added to LLVM. We only use the 2.x
ABI on armv6 since before 3.0 armv6 was the only architecture supported
by iOS.

Added: 
    

Modified: 
    llvm/lib/Target/ARM/ARMSubtarget.cpp
    llvm/test/CodeGen/ARM/inline-asm-clobber.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/ARM/ARMSubtarget.cpp b/llvm/lib/Target/ARM/ARMSubtarget.cpp
index 3329beab63ddf..58bc338b25856 100644
--- a/llvm/lib/Target/ARM/ARMSubtarget.cpp
+++ b/llvm/lib/Target/ARM/ARMSubtarget.cpp
@@ -225,7 +225,11 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
       (isTargetDarwin() || DM == DenormalMode::getPreserveSign()))
     HasNEONForFP = true;
 
-  if (isRWPI())
+  const ARM::ArchKind Arch = ARM::parseArch(TargetTriple.getArchName());
+  if (isRWPI() ||
+      (isTargetIOS() &&
+       (Arch == ARM::ArchKind::ARMV6K || Arch == ARM::ArchKind::ARMV6) &&
+       TargetTriple.isOSVersionLT(3, 0)))
     ReserveR9 = true;
 
   // If MVEVectorCostFactor is still 0 (has not been set to anything else), default it to 2

diff  --git a/llvm/test/CodeGen/ARM/inline-asm-clobber.ll b/llvm/test/CodeGen/ARM/inline-asm-clobber.ll
index 7b1331f3f1e84..f44ad2a896ad4 100644
--- a/llvm/test/CodeGen/ARM/inline-asm-clobber.ll
+++ b/llvm/test/CodeGen/ARM/inline-asm-clobber.ll
@@ -6,12 +6,19 @@
 ; RUN: llc <%s -mtriple=arm-none-eabi --frame-pointer=all 2>&1 \
 ; RUN:   | FileCheck %s -check-prefix=NO_FP_ELIM
 
+; RUN: llc <%s -mtriple=armv6-apple-ios2 2>&1 | FileCheck %s -check-prefix=IOS2
+; RUN: llc <%s -mtriple=armv6k-apple-ios2 2>&1 | FileCheck %s -check-prefix=IOS2
+; RUN: llc <%s -mtriple=armv6k-apple-ios3 2>&1 | FileCheck %s -check-prefix=IOS3
+; RUN: llc <%s -mtriple=armv7-apple-ios2 2>&1 | FileCheck %s -check-prefix=IOS3
+
 ; CHECK: warning: inline asm clobber list contains reserved registers: SP, PC
 ; CHECK: warning: inline asm clobber list contains reserved registers: R11
 ; RWPI: warning: inline asm clobber list contains reserved registers: R9, SP, PC
 ; RWPI: warning: inline asm clobber list contains reserved registers: R11
 ; NO_FP_ELIM: warning: inline asm clobber list contains reserved registers: R11, SP, PC
 ; NO_FP_ELIM: warning: inline asm clobber list contains reserved registers: R11
+; IOS2: warning: inline asm clobber list contains reserved registers: R9, SP, PC
+; IOS3: warning: inline asm clobber list contains reserved registers: SP, PC
 
 define void @foo() nounwind {
   call void asm sideeffect "mov r7, #1",