[llvm] ab645f1 - [SPIRV] Avoid OpQuantizeToF16 in SPIR-V kernel test (#158086)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 30 08:58:39 PDT 2025
Author: YixingZhang007
Date: 2025-09-30T16:58:35+01:00
New Revision: ab645f1dff323569ffe8a6fabedbae259101b1a7
URL: https://github.com/llvm/llvm-project/commit/ab645f1dff323569ffe8a6fabedbae259101b1a7
DIFF: https://github.com/llvm/llvm-project/commit/ab645f1dff323569ffe8a6fabedbae259101b1a7.diff
LOG: [SPIRV] Avoid OpQuantizeToF16 in SPIR-V kernel test (#158086)
This PR resolves the current failure in the `integer-casts.ll` SPIR-V
test during CI runs in `llvm-project`.
The failure occurs because the SPIR-V instruction `OpQuantizeToF16`
requires the `Capability::Shader`. However, the function in
`integer-casts.ll` is written as a kernel function and executed in a
kernel environment. Therefore, `Capability::Kernel` is emitted instead
of `Capability::Shader`. To fix this, we remove the `QuantizeToF16` test
from`integer-casts.ll` in this PR.
Added:
llvm/test/CodeGen/SPIRV/instructions/quantizeto16.ll
Modified:
llvm/test/CodeGen/SPIRV/instructions/integer-casts.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/SPIRV/instructions/integer-casts.ll b/llvm/test/CodeGen/SPIRV/instructions/integer-casts.ll
index 6a4b4f593bf3b..5fe2cc883ceb9 100644
--- a/llvm/test/CodeGen/SPIRV/instructions/integer-casts.ll
+++ b/llvm/test/CodeGen/SPIRV/instructions/integer-casts.ll
@@ -14,11 +14,11 @@
; CHECK-DAG: OpName [[ZEXT8_16:%.*]] "u8tou16"
; CHECK-DAG: OpName [[ZEXT16_32:%.*]] "u16tou32"
+; CHECK-DAG: OpName %[[#R16:]] "r16"
; CHECK-DAG: OpName %[[#R17:]] "r17"
; CHECK-DAG: OpName %[[#R18:]] "r18"
; CHECK-DAG: OpName %[[#R19:]] "r19"
; CHECK-DAG: OpName %[[#R20:]] "r20"
-; CHECK-DAG: OpName %[[#R21:]] "r21"
; CHECK-DAG: OpName [[TRUNC32_16v4:%.*]] "i32toi16v4"
; CHECK-DAG: OpName [[TRUNC32_8v4:%.*]] "i32toi8v4"
@@ -30,11 +30,11 @@
; CHECK-DAG: OpName [[ZEXT8_16v4:%.*]] "u8tou16v4"
; CHECK-DAG: OpName [[ZEXT16_32v4:%.*]] "u16tou32v4"
-; CHECK-DAG: OpDecorate %[[#R17]] FPRoundingMode RTZ
-; CHECK-DAG: OpDecorate %[[#R18]] FPRoundingMode RTE
-; CHECK-DAG: OpDecorate %[[#R19]] FPRoundingMode RTP
-; CHECK-DAG: OpDecorate %[[#R20]] FPRoundingMode RTN
-; CHECK-DAG: OpDecorate %[[#R21]] SaturatedConversion
+; CHECK-DAG: OpDecorate %[[#R16]] FPRoundingMode RTZ
+; CHECK-DAG: OpDecorate %[[#R17]] FPRoundingMode RTE
+; CHECK-DAG: OpDecorate %[[#R18]] FPRoundingMode RTP
+; CHECK-DAG: OpDecorate %[[#R19]] FPRoundingMode RTN
+; CHECK-DAG: OpDecorate %[[#R20]] SaturatedConversion
; CHECK-DAG: [[F32:%.*]] = OpTypeFloat 32
; CHECK-DAG: [[F16:%.*]] = OpTypeFloat 16
@@ -258,7 +258,6 @@ define <4 x i32> @u16tou32v4(<4 x i16> %a) {
; CHECK: %[[#]] = OpUConvert [[U32]] %[[#]]
; CHECK: %[[#]] = OpSConvert [[U32]] %[[#]]
; CHECK: %[[#]] = OpFConvert [[F16]] %[[#]]
-; CHECK: %[[#]] = OpQuantizeToF16 [[F32]] %[[#]]
; CHECK: %[[#]] = OpSatConvertSToU [[U64]] %[[#]]
; CHECK: %[[#]] = OpSatConvertUToS [[U64]] %[[#]]
; CHECK: %[[#]] = OpConvertPtrToU [[U64]] [[Arg1]]
@@ -267,11 +266,11 @@ define <4 x i32> @u16tou32v4(<4 x i16> %a) {
; CHECK: %[[#]] = OpSConvert [[U32v4]] %[[#]]
; CHECK: %[[#]] = OpConvertUToF [[F32]] %[[#]]
; CHECK: %[[#]] = OpConvertUToF [[F32]] %[[#]]
+; CHECK: %[[#R16]] = OpFConvert [[F32v2]] %[[#]]
; CHECK: %[[#R17]] = OpFConvert [[F32v2]] %[[#]]
; CHECK: %[[#R18]] = OpFConvert [[F32v2]] %[[#]]
; CHECK: %[[#R19]] = OpFConvert [[F32v2]] %[[#]]
-; CHECK: %[[#R20]] = OpFConvert [[F32v2]] %[[#]]
-; CHECK: %[[#R21]] = OpConvertFToU [[U8]] %[[#]]
+; CHECK: %[[#R20]] = OpConvertFToU [[U8]] %[[#]]
; CHECK: OpFunctionEnd
define dso_local spir_kernel void @test_wrappers(ptr addrspace(4) %arg, i64 %arg_ptr, <4 x i8> %arg_v2) {
%r1 = call spir_func i32 @__spirv_ConvertFToU(float 0.000000e+00)
@@ -281,20 +280,19 @@ define dso_local spir_kernel void @test_wrappers(ptr addrspace(4) %arg, i64 %arg
%r5 = call spir_func i32 @__spirv_UConvert(i64 1)
%r6 = call spir_func i32 @__spirv_SConvert(i64 1)
%r7 = call spir_func half @__spirv_FConvert(float 0.000000e+00)
- %r8 = call spir_func float @__spirv_QuantizeToF16(float 0.000000e+00)
- %r9 = call spir_func i64 @__spirv_SatConvertSToU(i64 1)
- %r10 = call spir_func i64 @__spirv_SatConvertUToS(i64 1)
- %r11 = call spir_func i64 @__spirv_ConvertPtrToU(ptr addrspace(4) %arg)
- %r12 = call spir_func ptr addrspace(4) @__spirv_ConvertUToPtr(i64 %arg_ptr)
- %r13 = call spir_func <4 x i32> @_Z22__spirv_UConvert_Rint2Dv2_a(<4 x i8> %arg_v2)
- %r14 = call spir_func <4 x i32> @_Z22__spirv_SConvert_Rint2Dv2_a(<4 x i8> %arg_v2)
- %r15 = call spir_func float @_Z30__spirv_ConvertUToF_Rfloat_rtz(i64 %arg_ptr)
- %r16 = call spir_func float @__spirv_ConvertUToF_Rfloat_rtz(i64 %arg_ptr)
- %r17 = call spir_func <2 x float> @_Z28__spirv_FConvert_Rfloat2_rtzDv2_DF16_(<2 x half> noundef <half 0xH409A, half 0xH439A>)
- %r18 = call spir_func <2 x float> @_Z28__spirv_FConvert_Rfloat2_rteDv2_DF16_(<2 x half> noundef <half 0xH409A, half 0xH439A>)
- %r19 = call spir_func <2 x float> @_Z28__spirv_FConvert_Rfloat2_rtpDv2_DF16_(<2 x half> noundef <half 0xH409A, half 0xH439A>)
- %r20 = call spir_func <2 x float> @_Z28__spirv_FConvert_Rfloat2_rtnDv2_DF16_(<2 x half> noundef <half 0xH409A, half 0xH439A>)
- %r21 = call spir_func i8 @_Z30__spirv_ConvertFToU_Ruchar_satf(float noundef 42.0)
+ %r8 = call spir_func i64 @__spirv_SatConvertSToU(i64 1)
+ %r9 = call spir_func i64 @__spirv_SatConvertUToS(i64 1)
+ %r10 = call spir_func i64 @__spirv_ConvertPtrToU(ptr addrspace(4) %arg)
+ %r11 = call spir_func ptr addrspace(4) @__spirv_ConvertUToPtr(i64 %arg_ptr)
+ %r12 = call spir_func <4 x i32> @_Z22__spirv_UConvert_Rint2Dv2_a(<4 x i8> %arg_v2)
+ %r13 = call spir_func <4 x i32> @_Z22__spirv_SConvert_Rint2Dv2_a(<4 x i8> %arg_v2)
+ %r14 = call spir_func float @_Z30__spirv_ConvertUToF_Rfloat_rtz(i64 %arg_ptr)
+ %r15 = call spir_func float @__spirv_ConvertUToF_Rfloat_rtz(i64 %arg_ptr)
+ %r16 = call spir_func <2 x float> @_Z28__spirv_FConvert_Rfloat2_rtzDv2_DF16_(<2 x half> noundef <half 0xH409A, half 0xH439A>)
+ %r17 = call spir_func <2 x float> @_Z28__spirv_FConvert_Rfloat2_rteDv2_DF16_(<2 x half> noundef <half 0xH409A, half 0xH439A>)
+ %r18 = call spir_func <2 x float> @_Z28__spirv_FConvert_Rfloat2_rtpDv2_DF16_(<2 x half> noundef <half 0xH409A, half 0xH439A>)
+ %r19 = call spir_func <2 x float> @_Z28__spirv_FConvert_Rfloat2_rtnDv2_DF16_(<2 x half> noundef <half 0xH409A, half 0xH439A>)
+ %r20 = call spir_func i8 @_Z30__spirv_ConvertFToU_Ruchar_satf(float noundef 42.0)
ret void
}
@@ -305,7 +303,6 @@ declare dso_local spir_func float @__spirv_ConvertUToF(i32)
declare dso_local spir_func i32 @__spirv_UConvert(i64)
declare dso_local spir_func i32 @__spirv_SConvert(i64)
declare dso_local spir_func half @__spirv_FConvert(float)
-declare dso_local spir_func float @__spirv_QuantizeToF16(float)
declare dso_local spir_func i64 @__spirv_SatConvertSToU(i64)
declare dso_local spir_func i64 @__spirv_SatConvertUToS(i64)
declare dso_local spir_func i64 @__spirv_ConvertPtrToU(ptr addrspace(4))
diff --git a/llvm/test/CodeGen/SPIRV/instructions/quantizeto16.ll b/llvm/test/CodeGen/SPIRV/instructions/quantizeto16.ll
new file mode 100644
index 0000000000000..0b12ba465b289
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/instructions/quantizeto16.ll
@@ -0,0 +1,15 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-vulkan-compute %s -o - | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-vulkan-compute %s -o - -filetype=obj | spirv-val %}
+
+; TODO: Implement support for the SPIR-V QuantizeToF16 operation
+; XFAIL: *
+
+; CHECK-DAG: [[F32:%.*]] = OpTypeFloat 32
+; CHECK: %[[#]] = OpQuantizeToF16 [[F32]] %[[#]]
+define spir_func void @test_wrappers() {
+ entry:
+ %r8 = call spir_func float @__spirv_QuantizeToF16(float 0.000000e+00)
+ ret void
+}
+
+declare dso_local spir_func float @__spirv_QuantizeToF16(float)
More information about the llvm-commits
mailing list