[llvm] [ASan][RISCV] Support asan check for segment load/store RVV intrinsics. (PR #161317)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 30 08:39:03 PDT 2025
================
@@ -2747,20 +2747,69 @@ bool RISCVTTIImpl::getTgtMemIntrinsic(IntrinsicInst *Inst,
Intrinsic::ID IID = Inst->getIntrinsicID();
LLVMContext &C = Inst->getContext();
bool HasMask = false;
+
+ auto getSegNum = [](const IntrinsicInst *II, unsigned PtrOperandNo,
+ bool IsWrite) -> int64_t {
+ if (auto *TarExtTy =
+ dyn_cast<TargetExtType>(II->getArgOperand(0)->getType()))
+ return TarExtTy->getIntParameter(0);
+ if (IsWrite)
+ return PtrOperandNo;
----------------
topperc wrote:
I thought this function returns the number of elements in a segment. But PtrOperandNo is the index of the pointer operand. That doesn't seem like the number of elements.
https://github.com/llvm/llvm-project/pull/161317
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