[llvm] e8e0b3d - [MemorySanitizer] Generate some test checks (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 30 08:26:16 PDT 2025
Author: Nikita Popov
Date: 2025-09-30T17:26:06+02:00
New Revision: e8e0b3dcd0657a75df00ff12769b9837985b385a
URL: https://github.com/llvm/llvm-project/commit/e8e0b3dcd0657a75df00ff12769b9837985b385a
DIFF: https://github.com/llvm/llvm-project/commit/e8e0b3dcd0657a75df00ff12769b9837985b385a.diff
LOG: [MemorySanitizer] Generate some test checks (NFC)
Added:
Modified:
llvm/test/Instrumentation/MemorySanitizer/array_types.ll
llvm/test/Instrumentation/MemorySanitizer/bmi.ll
llvm/test/Instrumentation/MemorySanitizer/byval.ll
Removed:
################################################################################
diff --git a/llvm/test/Instrumentation/MemorySanitizer/array_types.ll b/llvm/test/Instrumentation/MemorySanitizer/array_types.ll
index 236b019147036..ddebe3ee20038 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/array_types.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/array_types.ll
@@ -1,89 +1,194 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt < %s -msan-check-access-address=0 -S -passes=msan 2>&1 | FileCheck %s
-; RUN: opt < %s -msan-check-access-address=0 -msan-track-origins=1 -S -passes=msan 2>&1 | FileCheck -check-prefix=CHECK %s --allow-empty
+; RUN: opt < %s -msan-check-access-address=0 -msan-track-origins=1 -S -passes=msan 2>&1 | FileCheck -check-prefix=CHECK-ORIGIN %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
define [2 x i32] @InsertValue(i32 %x, i32 %y) sanitize_memory {
+; CHECK-LABEL: define [2 x i32] @InsertValue(
+; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @__msan_param_tls, align 8
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[TMP2:%.*]] = insertvalue [2 x i32] [i32 -1, i32 -1], i32 [[TMP0]], 0
+; CHECK-NEXT: [[A:%.*]] = insertvalue [2 x i32] undef, i32 [[X]], 0
+; CHECK-NEXT: [[TMP3:%.*]] = insertvalue [2 x i32] [[TMP2]], i32 [[TMP1]], 1
+; CHECK-NEXT: [[B:%.*]] = insertvalue [2 x i32] [[A]], i32 [[Y]], 1
+; CHECK-NEXT: store [2 x i32] [[TMP3]], ptr @__msan_retval_tls, align 8
+; CHECK-NEXT: ret [2 x i32] [[B]]
+;
+; CHECK-ORIGIN-LABEL: define [2 x i32] @InsertValue(
+; CHECK-ORIGIN-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-ORIGIN-NEXT: [[ENTRY:.*:]]
+; CHECK-ORIGIN-NEXT: [[TMP0:%.*]] = load i32, ptr @__msan_param_tls, align 8
+; CHECK-ORIGIN-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 4
+; CHECK-ORIGIN-NEXT: [[TMP2:%.*]] = load i32, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8
+; CHECK-ORIGIN-NEXT: [[TMP3:%.*]] = load i32, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_origin_tls to i64), i64 8) to ptr), align 4
+; CHECK-ORIGIN-NEXT: call void @llvm.donothing()
+; CHECK-ORIGIN-NEXT: [[TMP4:%.*]] = insertvalue [2 x i32] [i32 -1, i32 -1], i32 [[TMP0]], 0
+; CHECK-ORIGIN-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP0]], 0
+; CHECK-ORIGIN-NEXT: [[TMP6:%.*]] = select i1 [[TMP5]], i32 [[TMP1]], i32 0
+; CHECK-ORIGIN-NEXT: [[A:%.*]] = insertvalue [2 x i32] undef, i32 [[X]], 0
+; CHECK-ORIGIN-NEXT: [[TMP7:%.*]] = insertvalue [2 x i32] [[TMP4]], i32 [[TMP2]], 1
+; CHECK-ORIGIN-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP2]], 0
+; CHECK-ORIGIN-NEXT: [[TMP9:%.*]] = select i1 [[TMP8]], i32 [[TMP3]], i32 [[TMP6]]
+; CHECK-ORIGIN-NEXT: [[B:%.*]] = insertvalue [2 x i32] [[A]], i32 [[Y]], 1
+; CHECK-ORIGIN-NEXT: store [2 x i32] [[TMP7]], ptr @__msan_retval_tls, align 8
+; CHECK-ORIGIN-NEXT: store i32 [[TMP9]], ptr @__msan_retval_origin_tls, align 4
+; CHECK-ORIGIN-NEXT: ret [2 x i32] [[B]]
+;
entry:
%a = insertvalue [2 x i32] undef, i32 %x, 0
%b = insertvalue [2 x i32] %a, i32 %y, 1
ret [2 x i32] %b
}
-; CHECK-LABEL: @InsertValue(
-; CHECK-DAG: [[Sx:%.*]] = load i32, ptr @__msan_param_tls
-; CHECK-DAG: [[Sy:%.*]] = load i32, ptr {{.*}}@__msan_param_tls to i64), i64 8)
-; CHECK: [[A:%.*]] = insertvalue [2 x i32] [i32 -1, i32 -1], i32 [[Sx]], 0
-; CHECK: [[B:%.*]] = insertvalue [2 x i32] [[A]], i32 [[Sy]], 1
-; CHECK: store [2 x i32] [[B]], ptr {{.*}}@__msan_retval_tls
-; CHECK: ret [2 x i32]
-
-
define [2 x double] @InsertValueDouble(double %x, double %y) sanitize_memory {
+; CHECK-LABEL: define [2 x double] @InsertValueDouble(
+; CHECK-SAME: double [[X:%.*]], double [[Y:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 8
+; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[TMP2:%.*]] = insertvalue [2 x i64] [i64 -1, i64 -1], i64 [[TMP0]], 0
+; CHECK-NEXT: [[A:%.*]] = insertvalue [2 x double] undef, double [[X]], 0
+; CHECK-NEXT: [[TMP3:%.*]] = insertvalue [2 x i64] [[TMP2]], i64 [[TMP1]], 1
+; CHECK-NEXT: [[B:%.*]] = insertvalue [2 x double] [[A]], double [[Y]], 1
+; CHECK-NEXT: store [2 x i64] [[TMP3]], ptr @__msan_retval_tls, align 8
+; CHECK-NEXT: ret [2 x double] [[B]]
+;
+; CHECK-ORIGIN-LABEL: define [2 x double] @InsertValueDouble(
+; CHECK-ORIGIN-SAME: double [[X:%.*]], double [[Y:%.*]]) #[[ATTR0]] {
+; CHECK-ORIGIN-NEXT: [[ENTRY:.*:]]
+; CHECK-ORIGIN-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 8
+; CHECK-ORIGIN-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 4
+; CHECK-ORIGIN-NEXT: [[TMP2:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8
+; CHECK-ORIGIN-NEXT: [[TMP3:%.*]] = load i32, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_origin_tls to i64), i64 8) to ptr), align 4
+; CHECK-ORIGIN-NEXT: call void @llvm.donothing()
+; CHECK-ORIGIN-NEXT: [[TMP4:%.*]] = insertvalue [2 x i64] [i64 -1, i64 -1], i64 [[TMP0]], 0
+; CHECK-ORIGIN-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP0]], 0
+; CHECK-ORIGIN-NEXT: [[TMP6:%.*]] = select i1 [[TMP5]], i32 [[TMP1]], i32 0
+; CHECK-ORIGIN-NEXT: [[A:%.*]] = insertvalue [2 x double] undef, double [[X]], 0
+; CHECK-ORIGIN-NEXT: [[TMP7:%.*]] = insertvalue [2 x i64] [[TMP4]], i64 [[TMP2]], 1
+; CHECK-ORIGIN-NEXT: [[TMP8:%.*]] = icmp ne i64 [[TMP2]], 0
+; CHECK-ORIGIN-NEXT: [[TMP9:%.*]] = select i1 [[TMP8]], i32 [[TMP3]], i32 [[TMP6]]
+; CHECK-ORIGIN-NEXT: [[B:%.*]] = insertvalue [2 x double] [[A]], double [[Y]], 1
+; CHECK-ORIGIN-NEXT: store [2 x i64] [[TMP7]], ptr @__msan_retval_tls, align 8
+; CHECK-ORIGIN-NEXT: store i32 [[TMP9]], ptr @__msan_retval_origin_tls, align 4
+; CHECK-ORIGIN-NEXT: ret [2 x double] [[B]]
+;
entry:
%a = insertvalue [2 x double] undef, double %x, 0
%b = insertvalue [2 x double] %a, double %y, 1
ret [2 x double] %b
}
-; CHECK-LABEL: @InsertValueDouble(
-; CHECK-DAG: [[Sx:%.*]] = load i64, ptr @__msan_param_tls
-; CHECK-DAG: [[Sy:%.*]] = load i64, ptr {{.*}}@__msan_param_tls to i64), i64 8)
-; CHECK: [[A:%.*]] = insertvalue [2 x i64] [i64 -1, i64 -1], i64 [[Sx]], 0
-; CHECK: [[B:%.*]] = insertvalue [2 x i64] [[A]], i64 [[Sy]], 1
-; CHECK: store [2 x i64] [[B]], ptr {{.*}}@__msan_retval_tls
-; CHECK: ret [2 x double]
-
-
define i32 @ExtractValue([2 x i32] %a) sanitize_memory {
+; CHECK-LABEL: define i32 @ExtractValue(
+; CHECK-SAME: [2 x i32] [[A:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP0:%.*]] = load [2 x i32], ptr @__msan_param_tls, align 8
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[TMP1:%.*]] = extractvalue [2 x i32] [[TMP0]], 1
+; CHECK-NEXT: [[X:%.*]] = extractvalue [2 x i32] [[A]], 1
+; CHECK-NEXT: store i32 [[TMP1]], ptr @__msan_retval_tls, align 8
+; CHECK-NEXT: ret i32 [[X]]
+;
+; CHECK-ORIGIN-LABEL: define i32 @ExtractValue(
+; CHECK-ORIGIN-SAME: [2 x i32] [[A:%.*]]) #[[ATTR0]] {
+; CHECK-ORIGIN-NEXT: [[ENTRY:.*:]]
+; CHECK-ORIGIN-NEXT: [[TMP0:%.*]] = load [2 x i32], ptr @__msan_param_tls, align 8
+; CHECK-ORIGIN-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 4
+; CHECK-ORIGIN-NEXT: call void @llvm.donothing()
+; CHECK-ORIGIN-NEXT: [[TMP2:%.*]] = extractvalue [2 x i32] [[TMP0]], 1
+; CHECK-ORIGIN-NEXT: [[X:%.*]] = extractvalue [2 x i32] [[A]], 1
+; CHECK-ORIGIN-NEXT: store i32 [[TMP2]], ptr @__msan_retval_tls, align 8
+; CHECK-ORIGIN-NEXT: store i32 [[TMP1]], ptr @__msan_retval_origin_tls, align 4
+; CHECK-ORIGIN-NEXT: ret i32 [[X]]
+;
entry:
%x = extractvalue [2 x i32] %a, 1
ret i32 %x
}
-; CHECK-LABEL: @ExtractValue(
-; CHECK: [[Sa:%.*]] = load [2 x i32], ptr @__msan_param_tls
-; CHECK: [[Sx:%.*]] = extractvalue [2 x i32] [[Sa]], 1
-; CHECK: store i32 [[Sx]], ptr @__msan_retval_tls
-; CHECK: ret i32
-
-
; Regression test for PR20493.
%MyStruct = type { i32, i32, [3 x i32] }
define i32 @ArrayInStruct(%MyStruct %s) sanitize_memory {
+; CHECK-LABEL: define i32 @ArrayInStruct(
+; CHECK-SAME: [[MYSTRUCT:%.*]] [[S:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: [[TMP1:%.*]] = load { i32, i32, [3 x i32] }, ptr @__msan_param_tls, align 8
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i32, [3 x i32] } [[TMP1]], 2, 1
+; CHECK-NEXT: [[X:%.*]] = extractvalue [[MYSTRUCT]] [[S]], 2, 1
+; CHECK-NEXT: store i32 [[TMP2]], ptr @__msan_retval_tls, align 8
+; CHECK-NEXT: ret i32 [[X]]
+;
+; CHECK-ORIGIN-LABEL: define i32 @ArrayInStruct(
+; CHECK-ORIGIN-SAME: [[MYSTRUCT:%.*]] [[S:%.*]]) #[[ATTR0]] {
+; CHECK-ORIGIN-NEXT: [[TMP1:%.*]] = load { i32, i32, [3 x i32] }, ptr @__msan_param_tls, align 8
+; CHECK-ORIGIN-NEXT: [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 4
+; CHECK-ORIGIN-NEXT: call void @llvm.donothing()
+; CHECK-ORIGIN-NEXT: [[TMP3:%.*]] = extractvalue { i32, i32, [3 x i32] } [[TMP1]], 2, 1
+; CHECK-ORIGIN-NEXT: [[X:%.*]] = extractvalue [[MYSTRUCT]] [[S]], 2, 1
+; CHECK-ORIGIN-NEXT: store i32 [[TMP3]], ptr @__msan_retval_tls, align 8
+; CHECK-ORIGIN-NEXT: store i32 [[TMP2]], ptr @__msan_retval_origin_tls, align 4
+; CHECK-ORIGIN-NEXT: ret i32 [[X]]
+;
%x = extractvalue %MyStruct %s, 2, 1
ret i32 %x
}
-; CHECK-LABEL: @ArrayInStruct(
-; CHECK: [[Ss:%.*]] = load { i32, i32, [3 x i32] }, ptr @__msan_param_tls
-; CHECK: [[Sx:%.*]] = extractvalue { i32, i32, [3 x i32] } [[Ss]], 2, 1
-; CHECK: store i32 [[Sx]], ptr @__msan_retval_tls
-; CHECK: ret i32
-
-
define i32 @ArrayOfStructs([3 x { i32, i32 }] %a) sanitize_memory {
+; CHECK-LABEL: define i32 @ArrayOfStructs(
+; CHECK-SAME: [3 x { i32, i32 }] [[A:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: [[TMP1:%.*]] = load [3 x { i32, i32 }], ptr @__msan_param_tls, align 8
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue [3 x { i32, i32 }] [[TMP1]], 2, 1
+; CHECK-NEXT: [[X:%.*]] = extractvalue [3 x { i32, i32 }] [[A]], 2, 1
+; CHECK-NEXT: store i32 [[TMP2]], ptr @__msan_retval_tls, align 8
+; CHECK-NEXT: ret i32 [[X]]
+;
+; CHECK-ORIGIN-LABEL: define i32 @ArrayOfStructs(
+; CHECK-ORIGIN-SAME: [3 x { i32, i32 }] [[A:%.*]]) #[[ATTR0]] {
+; CHECK-ORIGIN-NEXT: [[TMP1:%.*]] = load [3 x { i32, i32 }], ptr @__msan_param_tls, align 8
+; CHECK-ORIGIN-NEXT: [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 4
+; CHECK-ORIGIN-NEXT: call void @llvm.donothing()
+; CHECK-ORIGIN-NEXT: [[TMP3:%.*]] = extractvalue [3 x { i32, i32 }] [[TMP1]], 2, 1
+; CHECK-ORIGIN-NEXT: [[X:%.*]] = extractvalue [3 x { i32, i32 }] [[A]], 2, 1
+; CHECK-ORIGIN-NEXT: store i32 [[TMP3]], ptr @__msan_retval_tls, align 8
+; CHECK-ORIGIN-NEXT: store i32 [[TMP2]], ptr @__msan_retval_origin_tls, align 4
+; CHECK-ORIGIN-NEXT: ret i32 [[X]]
+;
%x = extractvalue [3 x { i32, i32 }] %a, 2, 1
ret i32 %x
}
-; CHECK-LABEL: @ArrayOfStructs(
-; CHECK: [[Ss:%.*]] = load [3 x { i32, i32 }], ptr @__msan_param_tls
-; CHECK: [[Sx:%.*]] = extractvalue [3 x { i32, i32 }] [[Ss]], 2, 1
-; CHECK: store i32 [[Sx]], ptr @__msan_retval_tls
-; CHECK: ret i32
-
-
define <8 x i16> @ArrayOfVectors([3 x <8 x i16>] %a) sanitize_memory {
+; CHECK-LABEL: define <8 x i16> @ArrayOfVectors(
+; CHECK-SAME: [3 x <8 x i16>] [[A:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: [[TMP1:%.*]] = load [3 x <8 x i16>], ptr @__msan_param_tls, align 8
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue [3 x <8 x i16>] [[TMP1]], 1
+; CHECK-NEXT: [[X:%.*]] = extractvalue [3 x <8 x i16>] [[A]], 1
+; CHECK-NEXT: store <8 x i16> [[TMP2]], ptr @__msan_retval_tls, align 8
+; CHECK-NEXT: ret <8 x i16> [[X]]
+;
+; CHECK-ORIGIN-LABEL: define <8 x i16> @ArrayOfVectors(
+; CHECK-ORIGIN-SAME: [3 x <8 x i16>] [[A:%.*]]) #[[ATTR0]] {
+; CHECK-ORIGIN-NEXT: [[TMP1:%.*]] = load [3 x <8 x i16>], ptr @__msan_param_tls, align 8
+; CHECK-ORIGIN-NEXT: [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 4
+; CHECK-ORIGIN-NEXT: call void @llvm.donothing()
+; CHECK-ORIGIN-NEXT: [[TMP3:%.*]] = extractvalue [3 x <8 x i16>] [[TMP1]], 1
+; CHECK-ORIGIN-NEXT: [[X:%.*]] = extractvalue [3 x <8 x i16>] [[A]], 1
+; CHECK-ORIGIN-NEXT: store <8 x i16> [[TMP3]], ptr @__msan_retval_tls, align 8
+; CHECK-ORIGIN-NEXT: store i32 [[TMP2]], ptr @__msan_retval_origin_tls, align 4
+; CHECK-ORIGIN-NEXT: ret <8 x i16> [[X]]
+;
%x = extractvalue [3 x <8 x i16>] %a, 1
ret <8 x i16> %x
}
-; CHECK-LABEL: @ArrayOfVectors(
-; CHECK: [[Ss:%.*]] = load [3 x <8 x i16>], ptr @__msan_param_tls
-; CHECK: [[Sx:%.*]] = extractvalue [3 x <8 x i16>] [[Ss]], 1
-; CHECK: store <8 x i16> [[Sx]], ptr @__msan_retval_tls
-; CHECK: ret <8 x i16>
diff --git a/llvm/test/Instrumentation/MemorySanitizer/bmi.ll b/llvm/test/Instrumentation/MemorySanitizer/bmi.ll
index 2f60bd8b357b8..f0f67fc8f1210 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/bmi.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/bmi.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt < %s -msan-check-access-address=0 -S -passes=msan 2>&1 | FileCheck %s
; REQUIRES: x86-registered-target
@@ -15,131 +16,171 @@ declare i64 @llvm.x86.bmi.pdep.64(i64, i64)
declare i64 @llvm.x86.bmi.pext.64(i64, i64)
define i32 @Test_bzhi_32(i32 %a, i32 %b) sanitize_memory {
+; CHECK-LABEL: define i32 @Test_bzhi_32(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR1:[0-9]+]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP0]], 0
+; CHECK-NEXT: [[TMP3:%.*]] = sext i1 [[TMP2]] to i32
+; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.x86.bmi.bzhi.32(i32 [[TMP1]], i32 [[B]])
+; CHECK-NEXT: [[TMP5:%.*]] = or i32 [[TMP3]], [[TMP4]]
+; CHECK-NEXT: [[C:%.*]] = tail call i32 @llvm.x86.bmi.bzhi.32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT: store i32 [[TMP5]], ptr @__msan_retval_tls, align 8
+; CHECK-NEXT: ret i32 [[C]]
+;
entry:
%c = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %a, i32 %b)
ret i32 %c
}
-; CHECK-LABEL: @Test_bzhi_32(
-; CHECK-DAG: %[[SA:.*]] = load i32, ptr @__msan_param_tls
-; CHECK-DAG: %[[SB:.*]] = load i32, {{.*}}@__msan_param_tls to i64), i64 8)
-; CHECK-DAG: %[[SB0:.*]] = icmp ne i32 %[[SB]], 0
-; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i32
-; CHECK-DAG: %[[X:.*]] = call i32 @llvm.x86.bmi.bzhi.32(i32 %[[SA]], i32 %b)
-; CHECK-DAG: %[[S:.*]] = or i32 %[[SB1]], %[[X]]
-; CHECK-DAG: store i32 %[[S]], {{.*}}@__msan_retval_tls
-; CHECK: ret i32
define i64 @Test_bzhi_64(i64 %a, i64 %b) sanitize_memory {
+; CHECK-LABEL: define i64 @Test_bzhi_64(
+; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8
+; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[TMP0]], 0
+; CHECK-NEXT: [[TMP3:%.*]] = sext i1 [[TMP2]] to i64
+; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.x86.bmi.bzhi.64(i64 [[TMP1]], i64 [[B]])
+; CHECK-NEXT: [[TMP5:%.*]] = or i64 [[TMP3]], [[TMP4]]
+; CHECK-NEXT: [[C:%.*]] = tail call i64 @llvm.x86.bmi.bzhi.64(i64 [[A]], i64 [[B]])
+; CHECK-NEXT: store i64 [[TMP5]], ptr @__msan_retval_tls, align 8
+; CHECK-NEXT: ret i64 [[C]]
+;
entry:
%c = tail call i64 @llvm.x86.bmi.bzhi.64(i64 %a, i64 %b)
ret i64 %c
}
-; CHECK-LABEL: @Test_bzhi_64(
-; CHECK-DAG: %[[SA:.*]] = load i64, ptr @__msan_param_tls
-; CHECK-DAG: %[[SB:.*]] = load i64, {{.*}}@__msan_param_tls to i64), i64 8)
-; CHECK-DAG: %[[SB0:.*]] = icmp ne i64 %[[SB]], 0
-; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i64
-; CHECK-DAG: %[[X:.*]] = call i64 @llvm.x86.bmi.bzhi.64(i64 %[[SA]], i64 %b)
-; CHECK-DAG: %[[S:.*]] = or i64 %[[SB1]], %[[X]]
-; CHECK-DAG: store i64 %[[S]], {{.*}}@__msan_retval_tls
-; CHECK: ret i64
define i32 @Test_bextr_32(i32 %a, i32 %b) sanitize_memory {
+; CHECK-LABEL: define i32 @Test_bextr_32(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP0]], 0
+; CHECK-NEXT: [[TMP3:%.*]] = sext i1 [[TMP2]] to i32
+; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.x86.bmi.bextr.32(i32 [[TMP1]], i32 [[B]])
+; CHECK-NEXT: [[TMP5:%.*]] = or i32 [[TMP3]], [[TMP4]]
+; CHECK-NEXT: [[C:%.*]] = tail call i32 @llvm.x86.bmi.bextr.32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT: store i32 [[TMP5]], ptr @__msan_retval_tls, align 8
+; CHECK-NEXT: ret i32 [[C]]
+;
entry:
%c = tail call i32 @llvm.x86.bmi.bextr.32(i32 %a, i32 %b)
ret i32 %c
}
-; CHECK-LABEL: @Test_bextr_32(
-; CHECK-DAG: %[[SA:.*]] = load i32, ptr @__msan_param_tls
-; CHECK-DAG: %[[SB:.*]] = load i32, {{.*}}@__msan_param_tls to i64), i64 8)
-; CHECK-DAG: %[[SB0:.*]] = icmp ne i32 %[[SB]], 0
-; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i32
-; CHECK-DAG: %[[X:.*]] = call i32 @llvm.x86.bmi.bextr.32(i32 %[[SA]], i32 %b)
-; CHECK-DAG: %[[S:.*]] = or i32 %[[SB1]], %[[X]]
-; CHECK-DAG: store i32 %[[S]], {{.*}}@__msan_retval_tls
-; CHECK: ret i32
define i64 @Test_bextr_64(i64 %a, i64 %b) sanitize_memory {
+; CHECK-LABEL: define i64 @Test_bextr_64(
+; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8
+; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[TMP0]], 0
+; CHECK-NEXT: [[TMP3:%.*]] = sext i1 [[TMP2]] to i64
+; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.x86.bmi.bextr.64(i64 [[TMP1]], i64 [[B]])
+; CHECK-NEXT: [[TMP5:%.*]] = or i64 [[TMP3]], [[TMP4]]
+; CHECK-NEXT: [[C:%.*]] = tail call i64 @llvm.x86.bmi.bextr.64(i64 [[A]], i64 [[B]])
+; CHECK-NEXT: store i64 [[TMP5]], ptr @__msan_retval_tls, align 8
+; CHECK-NEXT: ret i64 [[C]]
+;
entry:
%c = tail call i64 @llvm.x86.bmi.bextr.64(i64 %a, i64 %b)
ret i64 %c
}
-; CHECK-LABEL: @Test_bextr_64(
-; CHECK-DAG: %[[SA:.*]] = load i64, ptr @__msan_param_tls
-; CHECK-DAG: %[[SB:.*]] = load i64, {{.*}}@__msan_param_tls to i64), i64 8)
-; CHECK-DAG: %[[SB0:.*]] = icmp ne i64 %[[SB]], 0
-; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i64
-; CHECK-DAG: %[[X:.*]] = call i64 @llvm.x86.bmi.bextr.64(i64 %[[SA]], i64 %b)
-; CHECK-DAG: %[[S:.*]] = or i64 %[[SB1]], %[[X]]
-; CHECK-DAG: store i64 %[[S]], {{.*}}@__msan_retval_tls
-; CHECK: ret i64
define i32 @Test_pdep_32(i32 %a, i32 %b) sanitize_memory {
+; CHECK-LABEL: define i32 @Test_pdep_32(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP0]], 0
+; CHECK-NEXT: [[TMP3:%.*]] = sext i1 [[TMP2]] to i32
+; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.x86.bmi.pdep.32(i32 [[TMP1]], i32 [[B]])
+; CHECK-NEXT: [[TMP5:%.*]] = or i32 [[TMP3]], [[TMP4]]
+; CHECK-NEXT: [[C:%.*]] = tail call i32 @llvm.x86.bmi.pdep.32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT: store i32 [[TMP5]], ptr @__msan_retval_tls, align 8
+; CHECK-NEXT: ret i32 [[C]]
+;
entry:
%c = tail call i32 @llvm.x86.bmi.pdep.32(i32 %a, i32 %b)
ret i32 %c
}
-; CHECK-LABEL: @Test_pdep_32(
-; CHECK-DAG: %[[SA:.*]] = load i32, ptr @__msan_param_tls
-; CHECK-DAG: %[[SB:.*]] = load i32, {{.*}}@__msan_param_tls to i64), i64 8)
-; CHECK-DAG: %[[SB0:.*]] = icmp ne i32 %[[SB]], 0
-; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i32
-; CHECK-DAG: %[[X:.*]] = call i32 @llvm.x86.bmi.pdep.32(i32 %[[SA]], i32 %b)
-; CHECK-DAG: %[[S:.*]] = or i32 %[[SB1]], %[[X]]
-; CHECK-DAG: store i32 %[[S]], {{.*}}@__msan_retval_tls
-; CHECK: ret i32
define i64 @Test_pdep_64(i64 %a, i64 %b) sanitize_memory {
+; CHECK-LABEL: define i64 @Test_pdep_64(
+; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8
+; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[TMP0]], 0
+; CHECK-NEXT: [[TMP3:%.*]] = sext i1 [[TMP2]] to i64
+; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.x86.bmi.pdep.64(i64 [[TMP1]], i64 [[B]])
+; CHECK-NEXT: [[TMP5:%.*]] = or i64 [[TMP3]], [[TMP4]]
+; CHECK-NEXT: [[C:%.*]] = tail call i64 @llvm.x86.bmi.pdep.64(i64 [[A]], i64 [[B]])
+; CHECK-NEXT: store i64 [[TMP5]], ptr @__msan_retval_tls, align 8
+; CHECK-NEXT: ret i64 [[C]]
+;
entry:
%c = tail call i64 @llvm.x86.bmi.pdep.64(i64 %a, i64 %b)
ret i64 %c
}
-; CHECK-LABEL: @Test_pdep_64(
-; CHECK-DAG: %[[SA:.*]] = load i64, ptr @__msan_param_tls
-; CHECK-DAG: %[[SB:.*]] = load i64, {{.*}}@__msan_param_tls to i64), i64 8)
-; CHECK-DAG: %[[SB0:.*]] = icmp ne i64 %[[SB]], 0
-; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i64
-; CHECK-DAG: %[[X:.*]] = call i64 @llvm.x86.bmi.pdep.64(i64 %[[SA]], i64 %b)
-; CHECK-DAG: %[[S:.*]] = or i64 %[[SB1]], %[[X]]
-; CHECK-DAG: store i64 %[[S]], {{.*}}@__msan_retval_tls
-; CHECK: ret i64
define i32 @Test_pext_32(i32 %a, i32 %b) sanitize_memory {
+; CHECK-LABEL: define i32 @Test_pext_32(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP0]], 0
+; CHECK-NEXT: [[TMP3:%.*]] = sext i1 [[TMP2]] to i32
+; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.x86.bmi.pext.32(i32 [[TMP1]], i32 [[B]])
+; CHECK-NEXT: [[TMP5:%.*]] = or i32 [[TMP3]], [[TMP4]]
+; CHECK-NEXT: [[C:%.*]] = tail call i32 @llvm.x86.bmi.pext.32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT: store i32 [[TMP5]], ptr @__msan_retval_tls, align 8
+; CHECK-NEXT: ret i32 [[C]]
+;
entry:
%c = tail call i32 @llvm.x86.bmi.pext.32(i32 %a, i32 %b)
ret i32 %c
}
-; CHECK-LABEL: @Test_pext_32(
-; CHECK-DAG: %[[SA:.*]] = load i32, ptr @__msan_param_tls
-; CHECK-DAG: %[[SB:.*]] = load i32, {{.*}}@__msan_param_tls to i64), i64 8)
-; CHECK-DAG: %[[SB0:.*]] = icmp ne i32 %[[SB]], 0
-; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i32
-; CHECK-DAG: %[[X:.*]] = call i32 @llvm.x86.bmi.pext.32(i32 %[[SA]], i32 %b)
-; CHECK-DAG: %[[S:.*]] = or i32 %[[SB1]], %[[X]]
-; CHECK-DAG: store i32 %[[S]], {{.*}}@__msan_retval_tls
-; CHECK: ret i32
define i64 @Test_pext_64(i64 %a, i64 %b) sanitize_memory {
+; CHECK-LABEL: define i64 @Test_pext_64(
+; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8
+; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[TMP0]], 0
+; CHECK-NEXT: [[TMP3:%.*]] = sext i1 [[TMP2]] to i64
+; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.x86.bmi.pext.64(i64 [[TMP1]], i64 [[B]])
+; CHECK-NEXT: [[TMP5:%.*]] = or i64 [[TMP3]], [[TMP4]]
+; CHECK-NEXT: [[C:%.*]] = tail call i64 @llvm.x86.bmi.pext.64(i64 [[A]], i64 [[B]])
+; CHECK-NEXT: store i64 [[TMP5]], ptr @__msan_retval_tls, align 8
+; CHECK-NEXT: ret i64 [[C]]
+;
entry:
%c = tail call i64 @llvm.x86.bmi.pext.64(i64 %a, i64 %b)
ret i64 %c
}
-; CHECK-LABEL: @Test_pext_64(
-; CHECK-DAG: %[[SA:.*]] = load i64, ptr @__msan_param_tls
-; CHECK-DAG: %[[SB:.*]] = load i64, {{.*}}@__msan_param_tls to i64), i64 8)
-; CHECK-DAG: %[[SB0:.*]] = icmp ne i64 %[[SB]], 0
-; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i64
-; CHECK-DAG: %[[X:.*]] = call i64 @llvm.x86.bmi.pext.64(i64 %[[SA]], i64 %b)
-; CHECK-DAG: %[[S:.*]] = or i64 %[[SB1]], %[[X]]
-; CHECK-DAG: store i64 %[[S]], {{.*}}@__msan_retval_tls
-; CHECK: ret i64
diff --git a/llvm/test/Instrumentation/MemorySanitizer/byval.ll b/llvm/test/Instrumentation/MemorySanitizer/byval.ll
index 258cec866d6a8..69970896a0527 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/byval.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/byval.ll
@@ -1,4 +1,5 @@
-; RUN: opt < %s -S -passes="msan<track-origins=1>" 2>&1 | FileCheck %s --implicit-check-not "call void @llvm.mem" --implicit-check-not " load" --implicit-check-not " store"
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt < %s -S -passes="msan<track-origins=1>" 2>&1 | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@@ -7,16 +8,28 @@ declare void @FnByVal(ptr byval(i128) %p);
declare void @Fn(ptr %p);
define i128 @ByValArgument(i32, ptr byval(i128) %p) sanitize_memory {
-; CHECK-LABEL: @ByValArgument(
-; CHECK-NEXT: entry:
-; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 %[[#]], ptr align 8 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), i64 16, i1 false)
-; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 %[[#]], ptr align 4 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_origin_tls to i64), i64 8) to ptr), i64 16, i1 false)
-; CHECK: [[X:%.*]] = load i128, ptr %p, align 8
-; CHECK: [[_MSLD:%.*]] = load i128, ptr %[[#]], align 8
-; CHECK: %[[#]] = load i32, ptr %[[#]], align 8
-; CHECK: store i128 [[_MSLD]], ptr @__msan_retval_tls, align 8
-; CHECK: store i32 %[[#]], ptr @__msan_retval_origin_tls, align 4
-; CHECK: ret i128 [[X]]
+; CHECK-LABEL: define i128 @ByValArgument(
+; CHECK-SAME: i32 [[TMP0:%.*]], ptr byval(i128) [[P:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P]] to i64
+; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080
+; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[TMP2]], 17592186044416
+; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP3]], ptr align 8 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), i64 16, i1 false)
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_origin_tls to i64), i64 8) to ptr), i64 16, i1 false)
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[X:%.*]] = load i128, ptr [[P]], align 8
+; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[P]] to i64
+; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 87960930222080
+; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr
+; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[TMP7]], 17592186044416
+; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr
+; CHECK-NEXT: [[_MSLD:%.*]] = load i128, ptr [[TMP8]], align 8
+; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 8
+; CHECK-NEXT: store i128 [[_MSLD]], ptr @__msan_retval_tls, align 8
+; CHECK-NEXT: store i32 [[TMP11]], ptr @__msan_retval_origin_tls, align 4
+; CHECK-NEXT: ret i128 [[X]]
;
entry:
%x = load i128, ptr %p
@@ -24,13 +37,20 @@ entry:
}
define i128 @ByValArgumentNoSanitize(i32, ptr byval(i128) %p) {
-; CHECK-LABEL: @ByValArgumentNoSanitize(
-; CHECK-NEXT: entry:
-; CHECK: call void @llvm.memset.p0.i64(ptr align 8 %[[#]], i8 0, i64 16, i1 false)
-; CHECK: [[X:%.*]] = load i128, ptr %p, align 8
-; CHECK: store i128 0, ptr @__msan_retval_tls, align 8
-; CHECK: store i32 0, ptr @__msan_retval_origin_tls, align 4
-; CHECK: ret i128 [[X]]
+; CHECK-LABEL: define i128 @ByValArgumentNoSanitize(
+; CHECK-SAME: i32 [[TMP0:%.*]], ptr byval(i128) [[P:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P]] to i64
+; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080
+; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[TMP2]], 17592186044416
+; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP3]], i8 0, i64 16, i1 false)
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[X:%.*]] = load i128, ptr [[P]], align 8
+; CHECK-NEXT: store i128 0, ptr @__msan_retval_tls, align 8
+; CHECK-NEXT: store i32 0, ptr @__msan_retval_origin_tls, align 4
+; CHECK-NEXT: ret i128 [[X]]
;
entry:
%x = load i128, ptr %p
@@ -38,13 +58,20 @@ entry:
}
define void @ByValForward(i32, ptr byval(i128) %p) sanitize_memory {
-; CHECK-LABEL: @ByValForward(
-; CHECK-NEXT: entry:
-; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 %[[#]], ptr align 8 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), i64 16, i1 false)
-; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 %[[#]], ptr align 4 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_origin_tls to i64), i64 8) to ptr), i64 16, i1 false)
-; CHECK: store i64 0, ptr @__msan_param_tls, align 8
-; CHECK: call void @Fn(ptr %p)
-; CHECK: ret void
+; CHECK-LABEL: define void @ByValForward(
+; CHECK-SAME: i32 [[TMP0:%.*]], ptr byval(i128) [[P:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P]] to i64
+; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080
+; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[TMP2]], 17592186044416
+; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP3]], ptr align 8 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), i64 16, i1 false)
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_origin_tls to i64), i64 8) to ptr), i64 16, i1 false)
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
+; CHECK-NEXT: call void @Fn(ptr [[P]])
+; CHECK-NEXT: ret void
;
entry:
call void @Fn(ptr %p)
@@ -52,12 +79,19 @@ entry:
}
define void @ByValForwardNoSanitize(i32, ptr byval(i128) %p) {
-; CHECK-LABEL: @ByValForwardNoSanitize(
-; CHECK-NEXT: entry:
-; CHECK: call void @llvm.memset.p0.i64(ptr align 8 %[[#]], i8 0, i64 16, i1 false)
-; CHECK: store i64 0, ptr @__msan_param_tls, align 8
-; CHECK: call void @Fn(ptr %p)
-; CHECK: ret void
+; CHECK-LABEL: define void @ByValForwardNoSanitize(
+; CHECK-SAME: i32 [[TMP0:%.*]], ptr byval(i128) [[P:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P]] to i64
+; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080
+; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[TMP2]], 17592186044416
+; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP3]], i8 0, i64 16, i1 false)
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
+; CHECK-NEXT: call void @Fn(ptr [[P]])
+; CHECK-NEXT: ret void
;
entry:
call void @Fn(ptr %p)
@@ -65,14 +99,27 @@ entry:
}
define void @ByValForwardByVal(i32, ptr byval(i128) %p) sanitize_memory {
-; CHECK-LABEL: @ByValForwardByVal(
-; CHECK-NEXT: entry:
-; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 %[[#]], ptr align 8 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), i64 16, i1 false)
-; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 %[[#]], ptr align 4 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_origin_tls to i64), i64 8) to ptr), i64 16, i1 false)
-; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr @__msan_param_tls, ptr %[[#]], i64 16, i1 false)
-; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 @__msan_param_origin_tls, ptr align 4 %[[#]], i64 16, i1 false)
-; CHECK: call void @FnByVal(ptr byval(i128) %p)
-; CHECK: ret void
+; CHECK-LABEL: define void @ByValForwardByVal(
+; CHECK-SAME: i32 [[TMP0:%.*]], ptr byval(i128) [[P:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P]] to i64
+; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080
+; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[TMP2]], 17592186044416
+; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP3]], ptr align 8 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), i64 16, i1 false)
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_origin_tls to i64), i64 8) to ptr), i64 16, i1 false)
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[P]] to i64
+; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 87960930222080
+; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr
+; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[TMP7]], 17592186044416
+; CHECK-NEXT: [[TMP10:%.*]] = and i64 [[TMP9]], -4
+; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr @__msan_param_tls, ptr [[TMP8]], i64 16, i1 false)
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 @__msan_param_origin_tls, ptr align 4 [[TMP11]], i64 16, i1 false)
+; CHECK-NEXT: call void @FnByVal(ptr byval(i128) [[P]])
+; CHECK-NEXT: ret void
;
entry:
call void @FnByVal(ptr byval(i128) %p)
@@ -80,12 +127,25 @@ entry:
}
define void @ByValForwardByValNoSanitize(i32, ptr byval(i128) %p) {
-; CHECK-LABEL: @ByValForwardByValNoSanitize(
-; CHECK-NEXT: entry:
-; CHECK: call void @llvm.memset.p0.i64(ptr align 8 %[[#]], i8 0, i64 16, i1 false)
-; CHECK: call void @llvm.memset.p0.i64(ptr @__msan_param_tls, i8 0, i64 16, i1 false)
-; CHECK: call void @FnByVal(ptr byval(i128) %p)
-; CHECK: ret void
+; CHECK-LABEL: define void @ByValForwardByValNoSanitize(
+; CHECK-SAME: i32 [[TMP0:%.*]], ptr byval(i128) [[P:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P]] to i64
+; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080
+; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[TMP2]], 17592186044416
+; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP3]], i8 0, i64 16, i1 false)
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[P]] to i64
+; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 87960930222080
+; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr
+; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[TMP7]], 17592186044416
+; CHECK-NEXT: [[TMP10:%.*]] = and i64 [[TMP9]], -4
+; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr @__msan_param_tls, i8 0, i64 16, i1 false)
+; CHECK-NEXT: call void @FnByVal(ptr byval(i128) [[P]])
+; CHECK-NEXT: ret void
;
entry:
call void @FnByVal(ptr byval(i128) %p)
@@ -96,16 +156,30 @@ declare void @FnByVal8(ptr byval(i8) %p);
declare void @Fn8(ptr %p);
define i8 @ByValArgument8(i32, ptr byval(i8) %p) sanitize_memory {
-; CHECK-LABEL: @ByValArgument8(
-; CHECK-NEXT: entry:
-; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 1 %[[#]], ptr align 1 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), i64 1, i1 false)
-; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 %[[#]], ptr align 4 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_origin_tls to i64), i64 8) to ptr), i64 4, i1 false)
-; CHECK: [[X:%.*]] = load i8, ptr %p, align 1
-; CHECK: [[_MSLD:%.*]] = load i8, ptr %[[#]], align 1
-; CHECK: %[[#]] = load i32, ptr %[[#]], align 4
-; CHECK: store i8 [[_MSLD]], ptr @__msan_retval_tls, align 8
-; CHECK: store i32 %[[#]], ptr @__msan_retval_origin_tls, align 4
-; CHECK: ret i8 [[X]]
+; CHECK-LABEL: define i8 @ByValArgument8(
+; CHECK-SAME: i32 [[TMP0:%.*]], ptr byval(i8) [[P:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P]] to i64
+; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080
+; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[TMP2]], 17592186044416
+; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -4
+; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[TMP3]], ptr align 1 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), i64 1, i1 false)
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP6]], ptr align 4 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_origin_tls to i64), i64 8) to ptr), i64 4, i1 false)
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[X:%.*]] = load i8, ptr [[P]], align 1
+; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[P]] to i64
+; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080
+; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr
+; CHECK-NEXT: [[TMP10:%.*]] = add i64 [[TMP8]], 17592186044416
+; CHECK-NEXT: [[TMP11:%.*]] = and i64 [[TMP10]], -4
+; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr
+; CHECK-NEXT: [[_MSLD:%.*]] = load i8, ptr [[TMP9]], align 1
+; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
+; CHECK-NEXT: store i8 [[_MSLD]], ptr @__msan_retval_tls, align 8
+; CHECK-NEXT: store i32 [[TMP13]], ptr @__msan_retval_origin_tls, align 4
+; CHECK-NEXT: ret i8 [[X]]
;
entry:
%x = load i8, ptr %p
@@ -113,13 +187,21 @@ entry:
}
define i8 @ByValArgumentNoSanitize8(i32, ptr byval(i8) %p) {
-; CHECK-LABEL: @ByValArgumentNoSanitize8(
-; CHECK-NEXT: entry:
-; CHECK: call void @llvm.memset.p0.i64(ptr align 1 %[[#]], i8 0, i64 1, i1 false)
-; CHECK: [[X:%.*]] = load i8, ptr %p, align 1
-; CHECK: store i8 0, ptr @__msan_retval_tls, align 8
-; CHECK: store i32 0, ptr @__msan_retval_origin_tls, align 4
-; CHECK: ret i8 [[X]]
+; CHECK-LABEL: define i8 @ByValArgumentNoSanitize8(
+; CHECK-SAME: i32 [[TMP0:%.*]], ptr byval(i8) [[P:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P]] to i64
+; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080
+; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[TMP2]], 17592186044416
+; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -4
+; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP3]], i8 0, i64 1, i1 false)
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[X:%.*]] = load i8, ptr [[P]], align 1
+; CHECK-NEXT: store i8 0, ptr @__msan_retval_tls, align 8
+; CHECK-NEXT: store i32 0, ptr @__msan_retval_origin_tls, align 4
+; CHECK-NEXT: ret i8 [[X]]
;
entry:
%x = load i8, ptr %p
@@ -127,13 +209,21 @@ entry:
}
define void @ByValForward8(i32, ptr byval(i8) %p) sanitize_memory {
-; CHECK-LABEL: @ByValForward8(
-; CHECK-NEXT: entry:
-; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 1 %[[#]], ptr align 1 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), i64 1, i1 false)
-; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 %[[#]], ptr align 4 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_origin_tls to i64), i64 8) to ptr), i64 4, i1 false)
-; CHECK: store i64 0, ptr @__msan_param_tls, align 8
-; CHECK: call void @Fn8(ptr %p)
-; CHECK: ret void
+; CHECK-LABEL: define void @ByValForward8(
+; CHECK-SAME: i32 [[TMP0:%.*]], ptr byval(i8) [[P:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P]] to i64
+; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080
+; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[TMP2]], 17592186044416
+; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -4
+; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[TMP3]], ptr align 1 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), i64 1, i1 false)
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP6]], ptr align 4 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_origin_tls to i64), i64 8) to ptr), i64 4, i1 false)
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
+; CHECK-NEXT: call void @Fn8(ptr [[P]])
+; CHECK-NEXT: ret void
;
entry:
call void @Fn8(ptr %p)
@@ -141,12 +231,20 @@ entry:
}
define void @ByValForwardNoSanitize8(i32, ptr byval(i8) %p) {
-; CHECK-LABEL: @ByValForwardNoSanitize8(
-; CHECK-NEXT: entry:
-; CHECK: call void @llvm.memset.p0.i64(ptr align 1 %[[#]], i8 0, i64 1, i1 false)
-; CHECK: store i64 0, ptr @__msan_param_tls, align 8
-; CHECK: call void @Fn8(ptr %p)
-; CHECK: ret void
+; CHECK-LABEL: define void @ByValForwardNoSanitize8(
+; CHECK-SAME: i32 [[TMP0:%.*]], ptr byval(i8) [[P:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P]] to i64
+; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080
+; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[TMP2]], 17592186044416
+; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -4
+; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP3]], i8 0, i64 1, i1 false)
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
+; CHECK-NEXT: call void @Fn8(ptr [[P]])
+; CHECK-NEXT: ret void
;
entry:
call void @Fn8(ptr %p)
@@ -154,14 +252,28 @@ entry:
}
define void @ByValForwardByVal8(i32, ptr byval(i8) %p) sanitize_memory {
-; CHECK-LABEL: @ByValForwardByVal8(
-; CHECK-NEXT: entry:
-; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 1 %[[#]], ptr align 1 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), i64 1, i1 false)
-; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 %[[#]], ptr align 4 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_origin_tls to i64), i64 8) to ptr), i64 4, i1 false)
-; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr @__msan_param_tls, ptr %[[#]], i64 1, i1 false)
-; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 @__msan_param_origin_tls, ptr align 4 %[[#]], i64 4, i1 false)
-; CHECK: call void @FnByVal8(ptr byval(i8) %p)
-; CHECK: ret void
+; CHECK-LABEL: define void @ByValForwardByVal8(
+; CHECK-SAME: i32 [[TMP0:%.*]], ptr byval(i8) [[P:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P]] to i64
+; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080
+; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[TMP2]], 17592186044416
+; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -4
+; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[TMP3]], ptr align 1 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), i64 1, i1 false)
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP6]], ptr align 4 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_origin_tls to i64), i64 8) to ptr), i64 4, i1 false)
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[P]] to i64
+; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080
+; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr
+; CHECK-NEXT: [[TMP10:%.*]] = add i64 [[TMP8]], 17592186044416
+; CHECK-NEXT: [[TMP11:%.*]] = and i64 [[TMP10]], -4
+; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr @__msan_param_tls, ptr [[TMP9]], i64 1, i1 false)
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 @__msan_param_origin_tls, ptr align 4 [[TMP12]], i64 4, i1 false)
+; CHECK-NEXT: call void @FnByVal8(ptr byval(i8) [[P]])
+; CHECK-NEXT: ret void
;
entry:
call void @FnByVal8(ptr byval(i8) %p)
@@ -169,12 +281,26 @@ entry:
}
define void @ByValForwardByValNoSanitize8(i32, ptr byval(i8) %p) {
-; CHECK-LABEL: @ByValForwardByValNoSanitize8(
-; CHECK-NEXT: entry:
-; CHECK: call void @llvm.memset.p0.i64(ptr align 1 %[[#]], i8 0, i64 1, i1 false)
-; CHECK: call void @llvm.memset.p0.i64(ptr @__msan_param_tls, i8 0, i64 1, i1 false)
-; CHECK: call void @FnByVal8(ptr byval(i8) %p)
-; CHECK: ret void
+; CHECK-LABEL: define void @ByValForwardByValNoSanitize8(
+; CHECK-SAME: i32 [[TMP0:%.*]], ptr byval(i8) [[P:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P]] to i64
+; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080
+; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[TMP2]], 17592186044416
+; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -4
+; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP3]], i8 0, i64 1, i1 false)
+; CHECK-NEXT: call void @llvm.donothing()
+; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[P]] to i64
+; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080
+; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr
+; CHECK-NEXT: [[TMP10:%.*]] = add i64 [[TMP8]], 17592186044416
+; CHECK-NEXT: [[TMP11:%.*]] = and i64 [[TMP10]], -4
+; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr @__msan_param_tls, i8 0, i64 1, i1 false)
+; CHECK-NEXT: call void @FnByVal8(ptr byval(i8) [[P]])
+; CHECK-NEXT: ret void
;
entry:
call void @FnByVal8(ptr byval(i8) %p)
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