[llvm] [MachineScheduler] Add support for scheduling while in SSA (PR #161054)

[Carl Ritson via llvm-commits]

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@@ -615,6 +615,8 @@ bool GCNDownwardRPTracker::advanceBeforeNext(MachineInstr *MI,
       continue;
     if (MO.isUse() && !MO.readsReg())
       continue;
+    if (MO.isUse() && MO.getParent()->getOpcode() == AMDGPU::PHI)
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perlfu wrote:

I think there are cases where we still needs to process the def from the PHI, so I have modified this to break from the loop on the first PHI use.

https://github.com/llvm/llvm-project/pull/161054