[llvm] [AMDGPU] Identify vector idiom to unlock SROA (PR #161200)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions h,cpp -- llvm/lib/Target/AMDGPU/AMDGPUVectorIdiom.cpp llvm/lib/Target/AMDGPU/AMDGPUVectorIdiom.h llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
``````````

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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUVectorIdiom.cpp b/llvm/lib/Target/AMDGPU/AMDGPUVectorIdiom.cpp
index 2703fff9f..89d061231 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUVectorIdiom.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUVectorIdiom.cpp
@@ -414,8 +414,10 @@ AMDGPUVectorIdiomCombinePass::run(Function &F, FunctionAnalysisManager &FAM) {
           Value *Fv = SI->getFalseValue();
           dumpPtrForms("true", T);
           dumpPtrForms("false", Fv);
-          dbgs() << "      trueIsAlloca=" << (hasAllocaUnderlyingObject(T) ? "true" : "false") << '\n';
-          dbgs() << "      falseIsAlloca=" << (hasAllocaUnderlyingObject(Fv) ? "true" : "false") << '\n';
+          dbgs() << "      trueIsAlloca="
+                 << (hasAllocaUnderlyingObject(T) ? "true" : "false") << '\n';
+          dbgs() << "      falseIsAlloca="
+                 << (hasAllocaUnderlyingObject(Fv) ? "true" : "false") << '\n';
         }
       };
 
@@ -432,10 +434,10 @@ AMDGPUVectorIdiomCombinePass::run(Function &F, FunctionAnalysisManager &FAM) {
              << '\n'
              << "  - dstIsSelect=" << (isa<SelectInst>(DstV) ? "true" : "false")
              << '\n'
-             << "  - srcIsAlloca=" << (hasAllocaUnderlyingObject(SrcV) ? "true" : "false")
-             << '\n'
-             << "  - dstIsAlloca=" << (hasAllocaUnderlyingObject(DstV) ? "true" : "false")
-             << '\n';
+             << "  - srcIsAlloca="
+             << (hasAllocaUnderlyingObject(SrcV) ? "true" : "false") << '\n'
+             << "  - dstIsAlloca="
+             << (hasAllocaUnderlyingObject(DstV) ? "true" : "false") << '\n';
 
       dumpSelect("src", SrcV);
       dumpSelect("dst", DstV);
@@ -468,7 +470,8 @@ AMDGPUVectorIdiomCombinePass::run(Function &F, FunctionAnalysisManager &FAM) {
       continue;
     }
 
-    // Check if we have select instructions and if their operands are alloca-based
+    // Check if we have select instructions and if their operands are
+    // alloca-based
     bool ShouldTransform = false;
     if (auto *Sel = dyn_cast<SelectInst>(Src)) {
       bool TrueIsAlloca = hasAllocaUnderlyingObject(Sel->getTrueValue());
@@ -489,8 +492,9 @@ AMDGPUVectorIdiomCombinePass::run(Function &F, FunctionAnalysisManager &FAM) {
         ShouldTransform = true;
         Changed |= Impl.transformSelectMemcpyDest(*MT, *Sel);
       } else {
-        LLVM_DEBUG(dbgs() << "[AMDGPUVectorIdiom] Skip: select destination operands "
-                          << "are not alloca-based\n");
+        LLVM_DEBUG(
+            dbgs() << "[AMDGPUVectorIdiom] Skip: select destination operands "
+                   << "are not alloca-based\n");
       }
       continue;
     }

``````````

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https://github.com/llvm/llvm-project/pull/161200