[llvm] [LoopInterchange] Also look at lcssa phis in outer loop latch block (PR #160889)

[Ryotaro Kasuga via llvm-commits]

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@@ -0,0 +1,75 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --prefix-filecheck-ir-name TEST --version 6
+; RUN: opt < %s -passes=loop-interchange -cache-line-size=64 -verify-dom-info -verify-loop-info -verify-scev -verify-loop-lcssa -S | FileCheck %s
+
+; This test is checking that blocks BB4 and BB5, where BB4 is the exit
+; block of the inner loop and BB5 the latch of the outer loop, correctly
+; deal with the phi-node use-def chain %new.cond.lcssa -> %old.cond.lcssa.
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+
+define i16 @main() {
+; CHECK-LABEL: define i16 @main() {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    br label %[[BB2_PREHEADER:.*]]
+; CHECK:       [[BB1_PREHEADER:.*]]:
+; CHECK-NEXT:    br label %[[TESTBB1:.*]]
+; CHECK:       [[TESTBB1]]:
+; CHECK-NEXT:    [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[BB5:.*]] ], [ 1, %[[BB1_PREHEADER]] ]
+; CHECK-NEXT:    br label %[[BB2_SPLIT:.*]]
+; CHECK:       [[BB2_PREHEADER]]:
+; CHECK-NEXT:    br label %[[TESTBB2:.*]]
+; CHECK:       [[TESTBB2]]:
+; CHECK-NEXT:    [[J:%.*]] = phi i16 [ [[TMP1:%.*]], %[[BB3_SPLIT:.*]] ], [ 0, %[[BB2_PREHEADER]] ]
+; CHECK-NEXT:    br label %[[BB1_PREHEADER]]
+; CHECK:       [[BB2_SPLIT]]:
+; CHECK-NEXT:    [[ARRAYIDX_US_US:%.*]] = getelementptr i16, ptr null, i16 [[J]]
+; CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX_US_US]], align 1
+; CHECK-NEXT:    [[COND:%.*]] = select i1 false, i16 0, i16 0
+; CHECK-NEXT:    br label %[[TESTBB3:.*]]
+; CHECK:       [[TESTBB3]]:
+; CHECK-NEXT:    [[J_NEXT:%.*]] = add i16 [[J]], 1
+; CHECK-NEXT:    br label %[[TESTBB4:.*]]
+; CHECK:       [[BB3_SPLIT]]:
+; CHECK-NEXT:    [[NEW_COND_LCSSA:%.*]] = phi i16 [ [[COND]], %[[BB5]] ]
+; CHECK-NEXT:    [[TMP1]] = add i16 [[J]], 1
+; CHECK-NEXT:    br i1 true, label %[[EXIT:.*]], label %[[TESTBB2]]
+; CHECK:       [[TESTBB4]]:
+; CHECK-NEXT:    br label %[[BB5]]
+; CHECK:       [[BB5]]:
+; CHECK-NEXT:    [[I_NEXT]] = add i64 [[I]], 1
+; CHECK-NEXT:    [[CMP286_US:%.*]] = icmp ugt i64 [[I]], 0
+; CHECK-NEXT:    br i1 [[CMP286_US]], label %[[TESTBB1]], label %[[BB3_SPLIT]]
+; CHECK:       [[EXIT]]:
+; CHECK-NEXT:    ret i16 0
+;
+entry:
+  br label %BB1
+
+BB1:
+  %i = phi i64 [ 1, %entry ], [ %i.next, %BB5 ]
+  br label %BB2
+
+BB2:
+  %j = phi i16 [ 0, %BB1 ], [ %j.next, %BB3 ]
+  %arrayidx.us.us = getelementptr i16, ptr null, i16 %j
+  %0 = load i16, ptr %arrayidx.us.us, align 1
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kasuga-fj wrote:

Isn't this always UB?

https://github.com/llvm/llvm-project/pull/160889