[llvm] [MachineScheduler] Add support for scheduling while in SSA (PR #161054)

[Matt Arsenault via llvm-commits]

================
@@ -615,6 +615,8 @@ bool GCNDownwardRPTracker::advanceBeforeNext(MachineInstr *MI,
       continue;
     if (MO.isUse() && !MO.readsReg())
       continue;
+    if (MO.isUse() && MO.getParent()->getOpcode() == AMDGPU::PHI)
----------------
arsenm wrote:

```suggestion
    if (MO.isUse() && CurrMI->getOpcode() == AMDGPU::PHI)
```

https://github.com/llvm/llvm-project/pull/161054