[llvm] [ARM] Add mayRaiseFPException to appropriate instructions and mark all instructions that read/write fpscr rounding bits as doing so (PR #160698)

[David Green via llvm-commits]

https://github.com/davemgreen commented:

I went through the list and this looks good (baring mve and neon, which we will need to do later). Should we add these VFP instructions too:
```
VCVTASD
VCVTASH
VCVTASS
VCVTAUD
VCVTAUH
VCVTAUS
VCVTMSD
VCVTMSH
VCVTMSS
VCVTMUD
VCVTMUH
VCVTMUS
VCVTNSD
VCVTNSH
VCVTNSS
VCVTNUD
VCVTNUH
VCVTNUS
VCVTPSD
VCVTPSH
VCVTPSS
VCVTPUD
VCVTPUH
VCVTPUS
VFP_VMAXNMD
VFP_VMAXNMH
VFP_VMAXNMS
VFP_VMINNMD
VFP_VMINNMH
VFP_VMINNMS
VJCVT
VRINTAD
VRINTAH
VRINTAS
VRINTMD
VRINTMH
VRINTMS
VRINTND
VRINTNH
VRINTNS
VRINTPD
VRINTPH
VRINTPS
VRINTRD
VRINTRH
VRINTRS
VRINTXD
VRINTXH
VRINTXS
VRINTZD
VRINTZH
VRINTZS
VSHTOD
VSHTOH
VSHTOS
VSITOD
VSITOH
VSITOS
VSLTOD
VSLTOH
VSLTOS
VTOSHD
VTOSHH
VTOSHS
VTOSIRD
VTOSIRH
VTOSIRS
VTOSIZD
VTOSIZH
VTOSIZS
VTOSLD
VTOSLH
VTOSLS
VTOUHD
VTOUHH
VTOUHS
VTOUIRD
VTOUIRH
VTOUIRS
VTOUIZD
VTOUIZH
VTOUIZS
VTOULD
VTOULH
VTOULS
VUHTOD
VUHTOH
VUHTOS
VUITOD
VUITOH
VUITOS
VULTOD
VULTOH
VULTOS
```

https://github.com/llvm/llvm-project/pull/160698