[llvm] [InstCombine] Transform `vector.reduce.add (splat %0, 4)` into `shl i32 %0, 2` (PR #161020)

[Nikita Popov via llvm-commits]

nikic wrote:

This should not be limited to powers of two. You can just emit a multiply and it will get folded to a shift in the power of two case.

https://github.com/llvm/llvm-project/pull/161020