[llvm] [AMDGPU] Sink uniform buffer address offsets into soffset (PR #160939)

Krzysztof Drewniak via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 26 17:45:28 PDT 2025


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@@ -341,8 +338,23 @@ void AMDGPUDAGToDAGISel::PreprocessISelDAG() {
 
     switch (N->getOpcode()) {
     case ISD::BUILD_VECTOR:
-      // TODO: Match load d16 from shl (extload:i16), 16
-      MadeChange |= matchLoadD16FromBuildVector(N);
+      // D16 optimization requires subtarget support
----------------
krzysz00 wrote:

No

Even with the new ones, if I have `/*voffset=*/%x + 16` in the IR, ISel will pattern-match that `+ 16` part into `offset:16` on the instruction

https://github.com/llvm/llvm-project/pull/160939


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