[llvm] [AMDGPU] Emit b32 movs if (a)v_mov_b64_pseudo dest vgprs are misaligned (PR #160547)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 26 08:02:23 PDT 2025


================
@@ -2146,13 +2146,17 @@ bool SIInstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
     Register DstLo = RI.getSubReg(Dst, AMDGPU::sub0);
     Register DstHi = RI.getSubReg(Dst, AMDGPU::sub1);
 
+    MachineRegisterInfo &MRI = MI.getMF()->getRegInfo();
----------------
arsenm wrote:

```suggestion
    MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
```

https://github.com/llvm/llvm-project/pull/160547


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