[llvm] [X86] canCreateUndefOrPoisonForTargetNode/isGuaranteedNotToBeUndefOrPoisonForTargetNode - add X86ISD::VPERMV handling (PR #160845)
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Fri Sep 26 03:12:06 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-x86
Author: Simon Pilgrim (RKSimon)
<details>
<summary>Changes</summary>
X86ISD::PSHUFB shuffles can't create undef/poison itself, allowing us to fold freeze(vpermps(x,y)) -> vpermps(freeze(x),freeze(y))
---
Full diff: https://github.com/llvm/llvm-project/pull/160845.diff
2 Files Affected:
- (modified) llvm/lib/Target/X86/X86ISelLowering.cpp (+2)
- (modified) llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll (+3-13)
``````````diff
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 57cf66e5275e3..69e430d29dbe9 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -45189,6 +45189,7 @@ bool X86TargetLowering::isGuaranteedNotToBeUndefOrPoisonForTargetNode(
case X86ISD::UNPCKL:
case X86ISD::UNPCKH:
case X86ISD::VPERMILPI:
+ case X86ISD::VPERMV:
case X86ISD::VPERMV3: {
SmallVector<int, 8> Mask;
SmallVector<SDValue, 2> Ops;
@@ -45255,6 +45256,7 @@ bool X86TargetLowering::canCreateUndefOrPoisonForTargetNode(
case X86ISD::UNPCKL:
case X86ISD::UNPCKH:
case X86ISD::VPERMILPI:
+ case X86ISD::VPERMV:
case X86ISD::VPERMV3:
return false;
// SSE comparisons handle all icmp/fcmp cases.
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
index 06468f6414751..56c0b164b63d6 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
@@ -934,19 +934,9 @@ entry:
}
define <8 x float> @freeze_permps(<8 x float> %a0) {
-; AVX2-LABEL: freeze_permps:
-; AVX2: # %bb.0:
-; AVX2-NEXT: vmovaps {{.*#+}} ymm1 = [7,6,5,4,3,2,1,0]
-; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0
-; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0
-; AVX2-NEXT: ret{{[l|q]}}
-;
-; AVX512-LABEL: freeze_permps:
-; AVX512: # %bb.0:
-; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm1 = [7,6,5,4,3,2,1,0]
-; AVX512-NEXT: vpermps %ymm0, %ymm1, %ymm0
-; AVX512-NEXT: vpermps %ymm0, %ymm1, %ymm0
-; AVX512-NEXT: ret{{[l|q]}}
+; CHECK-LABEL: freeze_permps:
+; CHECK: # %bb.0:
+; CHECK-NEXT: ret{{[l|q]}}
%s0 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
%f0 = freeze <8 x float> %s0
%s1 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %f0, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
``````````
</details>
https://github.com/llvm/llvm-project/pull/160845
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