[llvm] de59bc4 - [AMDGPU] Avoid constraining RC based on folded into operand (NFC) (#160743)
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Thu Sep 25 22:08:13 PDT 2025
Author: Josh Hutton
Date: 2025-09-26T05:08:09Z
New Revision: de59bc42ed84e062360eb3a9e591a195bfb1104f
URL: https://github.com/llvm/llvm-project/commit/de59bc42ed84e062360eb3a9e591a195bfb1104f
DIFF: https://github.com/llvm/llvm-project/commit/de59bc42ed84e062360eb3a9e591a195bfb1104f.diff
LOG: [AMDGPU] Avoid constraining RC based on folded into operand (NFC) (#160743)
The RC of the folded operand does not need to be constrained based on
the RC of the current operand we are folding into.
The purpose of this PR is to facilitate this PR:
https://github.com/llvm/llvm-project/pull/151033
Added:
Modified:
llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
index 38331b614bceb..51c56ecea2c96 100644
--- a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
@@ -712,10 +712,15 @@ bool SIFoldOperandsImpl::updateOperand(FoldCandidate &Fold) const {
TII->getRegClass(MI->getDesc(), Fold.UseOpNo, TRI)) {
const TargetRegisterClass *NewRC =
TRI->getRegClassForReg(*MRI, New->getReg());
- const TargetRegisterClass *ConstrainRC =
- TRI->findCommonRegClass(OpRC, Old.getSubReg(), NewRC, New->getSubReg());
- if (!ConstrainRC)
- return false;
+
+ const TargetRegisterClass *ConstrainRC = OpRC;
+ if (New->getSubReg()) {
+ ConstrainRC =
+ TRI->getMatchingSuperRegClass(NewRC, OpRC, New->getSubReg());
+
+ if (!ConstrainRC)
+ return false;
+ }
if (!MRI->constrainRegClass(New->getReg(), ConstrainRC)) {
LLVM_DEBUG(dbgs() << "Cannot constrain " << printReg(New->getReg(), TRI)
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