[llvm] [InstCombine] Rotate transformation port from SelectionDAG to InstCombine (PR #160628)
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Thu Sep 25 12:08:54 PDT 2025
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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
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``````````diff
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
index 31db41016..b38206a0c 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
@@ -2413,8 +2413,7 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
if (match(Op0, m_FShl(m_Value(InnerOp), m_Deferred(InnerOp),
m_ImmConstant(ShAmtInnerC))) &&
Op0 == Op1) {
- APInt Sum =
- *ShAmtOuterC + *ShAmtInnerC;
+ APInt Sum = *ShAmtOuterC + *ShAmtInnerC;
APInt Modulo = Sum.urem(APInt(Sum.getBitWidth(), BitWidth));
if (Modulo.isZero())
return replaceInstUsesWith(*II, InnerOp);
``````````
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https://github.com/llvm/llvm-project/pull/160628
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