[llvm] [AMDGPU][MC] GFX9 - Support NV bit in FLAT instructions in pre-GFX90A (PR #154237)

[Jun Wang via llvm-commits]

================
@@ -1585,6 +1585,11 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
 
   bool hasKernargPreload() const { return AMDGPU::hasKernargPreload(getSTI()); }
 
+  bool isFlatInstAndNVAllowed(const MCInst &Inst) const {
+    uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags;
+    return (TSFlags & SIInstrFlags::FLAT) && isGFX9() && !isGFX90A();
+  }
----------------
jwanggit86 wrote:

This function, `isFlatInstAndNVAllowed()` is called during instruction validation in `AMDGPUAsmParser::validateCoherenceBits()`. There the code logic gives an error if NV is set for non-GFX1250 targets.
```
bool AMDGPUAsmParser::validateCoherencyBits(const MCInst &Inst, const OperandVector &Operands, const SMLoc &IDLoc) {
  if (!isGFX1250()) {
    if (CPol & CPol::SCAL) {
...
    }
    if ((CPol & CPol::NV) && !isFlatInstAndNVAllowed(Inst)) {
      SMLoc S = getImmLoc(AMDGPUOperand::ImmTyCPol, Operands);
      StringRef CStr(S.getPointer());
      S = SMLoc::getFromPointer(&CStr.data()[CStr.find("nv")]);
      Error(S, "nv is not supported on this GPU");
    }
  }
```
So without calling this newly added function, it will throw an error for GFX9, which allows NV.

https://github.com/llvm/llvm-project/pull/154237