[llvm] [X86][GlobalIsel] Enable gisel run for fpclass isel (PR #160741)
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Thu Sep 25 10:15:12 PDT 2025
https://github.com/mahesh-attarde created https://github.com/llvm/llvm-project/pull/160741
X86 Gisel has all necessary opcodes supported to expand/lower isfpclass intrinsic. This patch enables runs for isel-fpclass.. test
>From 47d50fb58e0dab94ea1222509961eb2f66da7d30 Mon Sep 17 00:00:00 2001
From: "Attarde, Mahesh" <mahesh.attarde at intel.com>
Date: Thu, 25 Sep 2025 10:13:22 -0700
Subject: [PATCH] [X86][GlobalIsel] Enable gisel run for fpclass isel
---
llvm/test/CodeGen/X86/isel-fpclass.ll | 127 +++++++++++++++++++++++++-
1 file changed, 125 insertions(+), 2 deletions(-)
diff --git a/llvm/test/CodeGen/X86/isel-fpclass.ll b/llvm/test/CodeGen/X86/isel-fpclass.ll
index 960bbf53a6451..da978607e5528 100644
--- a/llvm/test/CodeGen/X86/isel-fpclass.ll
+++ b/llvm/test/CodeGen/X86/isel-fpclass.ll
@@ -3,8 +3,8 @@
; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefixes=X64,X64-SDAGISEL
; RUN: llc < %s -mtriple=i686-linux -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefixes=X86-FASTISEL
; RUN: llc < %s -mtriple=x86_64-linux -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefixes=X64,X64-FASTISEL
-
-; FIXME: We can reuse/delete llvm/test/CodeGen/X86/is_fpclass.ll when all patches are included.
+; RUN: llc < %s -mtriple=i686-linux -global-isel -global-isel-abort=2 | FileCheck %s -check-prefixes=X86
+; RUN: llc < %s -mtriple=x86_64-linux -global-isel -global-isel-abort=2 | FileCheck %s -check-prefixes=X64,X64-GISEL
define i1 @isnone_f(float %x) {
; X86-SDAGISEL-LABEL: isnone_f:
@@ -23,6 +23,11 @@ define i1 @isnone_f(float %x) {
; X86-FASTISEL-NEXT: fstp %st(0)
; X86-FASTISEL-NEXT: xorl %eax, %eax
; X86-FASTISEL-NEXT: retl
+;
+; X86-LABEL: isnone_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: retl
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 0)
ret i1 %0
@@ -45,6 +50,11 @@ define i1 @isany_f(float %x) {
; X86-FASTISEL-NEXT: fstp %st(0)
; X86-FASTISEL-NEXT: movb $1, %al
; X86-FASTISEL-NEXT: retl
+;
+; X86-LABEL: isany_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movb $1, %al
+; X86-NEXT: retl
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 1023)
ret i1 %0
@@ -89,6 +99,17 @@ define i1 @issignaling_f(float %x) {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: .cfi_def_cfa_offset 4
; X86-FASTISEL-NEXT: retl
+;
+; X86-LABEL: issignaling_f:
+; X86: # %bb.0:
+; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X86-NEXT: setl %cl
+; X86-NEXT: cmpl $2139095041, %eax # imm = 0x7F800001
+; X86-NEXT: setge %al
+; X86-NEXT: andb %cl, %al
+; X86-NEXT: retl
%a0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 1) ; "snan"
ret i1 %a0
}
@@ -123,6 +144,14 @@ define i1 @issignaling_f(float %x) {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: .cfi_def_cfa_offset 4
; X86-FASTISEL-NEXT: retl
+;
+; X86-LABEL: isquiet_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X86-NEXT: setge %al
+; X86-NEXT: retl
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 2) ; "qnan"
ret i1 %0
@@ -158,6 +187,14 @@ define i1 @not_isquiet_f(float %x) {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: .cfi_def_cfa_offset 4
; X86-FASTISEL-NEXT: retl
+;
+; X86-LABEL: not_isquiet_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X86-NEXT: setl %al
+; X86-NEXT: retl
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 1021) ; ~"qnan"
ret i1 %0
@@ -193,6 +230,14 @@ define i1 @isinf_f(float %x) {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: .cfi_def_cfa_offset 4
; X86-FASTISEL-NEXT: retl
+;
+; X86-LABEL: isinf_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-NEXT: sete %al
+; X86-NEXT: retl
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 516) ; 0x204 = "inf"
ret i1 %0
@@ -228,6 +273,14 @@ define i1 @not_isinf_f(float %x) {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: .cfi_def_cfa_offset 4
; X86-FASTISEL-NEXT: retl
+;
+; X86-LABEL: not_isinf_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-NEXT: setne %al
+; X86-NEXT: retl
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 507) ; ~0x204 = "~inf"
ret i1 %0
@@ -258,6 +311,12 @@ define i1 @is_plus_inf_f(float %x) {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: .cfi_def_cfa_offset 4
; X86-FASTISEL-NEXT: retl
+;
+; X86-LABEL: is_plus_inf_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: cmpl $2139095040, {{[0-9]+}}(%esp) # imm = 0x7F800000
+; X86-NEXT: sete %al
+; X86-NEXT: retl
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 512) ; 0x200 = "+inf"
ret i1 %0
@@ -288,6 +347,12 @@ define i1 @is_minus_inf_f(float %x) {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: .cfi_def_cfa_offset 4
; X86-FASTISEL-NEXT: retl
+;
+; X86-LABEL: is_minus_inf_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: cmpl $-8388608, {{[0-9]+}}(%esp) # imm = 0xFF800000
+; X86-NEXT: sete %al
+; X86-NEXT: retl
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 4) ; "-inf"
ret i1 %0
@@ -318,6 +383,12 @@ define i1 @not_is_minus_inf_f(float %x) {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: .cfi_def_cfa_offset 4
; X86-FASTISEL-NEXT: retl
+;
+; X86-LABEL: not_is_minus_inf_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: cmpl $-8388608, {{[0-9]+}}(%esp) # imm = 0xFF800000
+; X86-NEXT: setne %al
+; X86-NEXT: retl
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 1019) ; ~"-inf"
ret i1 %0
@@ -353,6 +424,14 @@ define i1 @isfinite_f(float %x) {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: .cfi_def_cfa_offset 4
; X86-FASTISEL-NEXT: retl
+;
+; X86-LABEL: isfinite_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-NEXT: setl %al
+; X86-NEXT: retl
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 504) ; 0x1f8 = "finite"
ret i1 %0
@@ -388,6 +467,14 @@ define i1 @not_isfinite_f(float %x) {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: .cfi_def_cfa_offset 4
; X86-FASTISEL-NEXT: retl
+;
+; X86-LABEL: not_isfinite_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-NEXT: setge %al
+; X86-NEXT: retl
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 519) ; ~0x1f8 = "~finite"
ret i1 %0
@@ -418,6 +505,12 @@ define i1 @is_plus_finite_f(float %x) {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: .cfi_def_cfa_offset 4
; X86-FASTISEL-NEXT: retl
+;
+; X86-LABEL: is_plus_finite_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: cmpl $2139095040, {{[0-9]+}}(%esp) # imm = 0x7F800000
+; X86-NEXT: setb %al
+; X86-NEXT: retl
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 448) ; 0x1c0 = "+finite"
ret i1 %0
@@ -440,6 +533,11 @@ define i1 @isnone_d(double %x) nounwind {
; X86-FASTISEL-NEXT: fstp %st(0)
; X86-FASTISEL-NEXT: xorl %eax, %eax
; X86-FASTISEL-NEXT: retl
+;
+; X86-LABEL: isnone_d:
+; X86: # %bb.0: # %entry
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: retl
entry:
%0 = tail call i1 @llvm.is.fpclass.f64(double %x, i32 0)
ret i1 %0
@@ -462,6 +560,11 @@ define i1 @isany_d(double %x) nounwind {
; X86-FASTISEL-NEXT: fstp %st(0)
; X86-FASTISEL-NEXT: movb $1, %al
; X86-FASTISEL-NEXT: retl
+;
+; X86-LABEL: isany_d:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movb $1, %al
+; X86-NEXT: retl
entry:
%0 = tail call i1 @llvm.is.fpclass.f64(double %x, i32 1023)
ret i1 %0
@@ -491,6 +594,16 @@ define i1 @isnone_f80(x86_fp80 %x) nounwind {
; X64-FASTISEL-NEXT: fstp %st(0)
; X64-FASTISEL-NEXT: xorl %eax, %eax
; X64-FASTISEL-NEXT: retq
+;
+; X86-LABEL: isnone_f80:
+; X86: # %bb.0: # %entry
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: retl
+;
+; X64-GISEL-LABEL: isnone_f80:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: xorl %eax, %eax
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f80(x86_fp80 %x, i32 0)
ret i1 %0
@@ -520,6 +633,16 @@ define i1 @isany_f80(x86_fp80 %x) nounwind {
; X64-FASTISEL-NEXT: fstp %st(0)
; X64-FASTISEL-NEXT: movb $1, %al
; X64-FASTISEL-NEXT: retq
+;
+; X86-LABEL: isany_f80:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movb $1, %al
+; X86-NEXT: retl
+;
+; X64-GISEL-LABEL: isany_f80:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: movb $1, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f80(x86_fp80 %x, i32 1023)
ret i1 %0
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