[llvm] [SPARC] Weaken emitted barriers for atomic ops (PR #154950)

[Matt Arsenault via llvm-commits]

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@@ -3562,3 +3563,27 @@ void SparcTargetLowering::AdjustInstrPostInstrSelection(MachineInstr &MI,
   if (!Node->hasAnyUseOfValue(0))
     MI.getOperand(0).setReg(SP::G0);
 }
+
+Instruction *SparcTargetLowering::emitLeadingFence(IRBuilderBase &Builder,
+                                                   Instruction *Inst,
+                                                   AtomicOrdering Ord) const {
+  bool HasStoreSemantics = isa<AtomicRMWInst>(Inst) || isa<StoreInst>(Inst);
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arsenm wrote:

What about cmpxchg? Comment if it is intended to not be handled

https://github.com/llvm/llvm-project/pull/154950