[llvm] [AMDGPU]: Rewrite mbcnt_lo/mbcnt_hi to work item ID where applicable (PR #160496)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
``````````

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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
index 509e2b019..a2d7733a0 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
@@ -1375,8 +1375,8 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
         if (ST) {
           if (auto MaybeX = ST->getReqdWorkGroupSize(*F, 0)) {
             unsigned XLen = *MaybeX;
-            if (Wave == 0 && (XLen == WavefrontSize32 ||
-                              XLen == WavefrontSize64))
+            if (Wave == 0 &&
+                (XLen == WavefrontSize32 || XLen == WavefrontSize64))
               Wave = XLen; // allow common sizes under test harness
 
             if (Wave != 0 && XLen == Wave) {
@@ -1392,9 +1392,9 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
             // replace lane-id computation with a bitmask when the wave is a
             // power-of-two. Use the Subtarget helper to conservatively decide
             // when per-wave tiling is preserved.
-        if (ST->hasWavefrontsEvenlySplittingXDim(
-          *F, /*RequiresUniformYZ=*/true)) {
-        if (Wave != 0 && isPowerOf2_32(Wave)) {
+            if (ST->hasWavefrontsEvenlySplittingXDim(
+                    *F, /*RequiresUniformYZ=*/true)) {
+              if (Wave != 0 && isPowerOf2_32(Wave)) {
                 // Construct: tid = workitem.id.x(); mask = Wave-1; res = tid &
                 // mask
                 SmallVector<Type *, 0> OverloadTys;

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https://github.com/llvm/llvm-project/pull/160496