[llvm] [AArch64LoadStoreOpt] Allow monotonic atomics to be paired (PR #160580)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp,h -- llvm/include/llvm/CodeGen/MachineInstr.h llvm/include/llvm/CodeGen/MachineMemOperand.h llvm/lib/CodeGen/MachineInstr.cpp llvm/lib/Target/AArch64/AArch64InstrInfo.cpp llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
``````````

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``````````diff
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index 36485f987..c72f60113 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -1591,10 +1591,7 @@ bool MachineInstr::hasOrderedMemoryRef() const {
 /// same address orderings.
 bool MachineInstr::hasDifferentAddressOrderedMemoryRef() const {
   // An instruction known never to access memory won't have a volatile access.
-  if (!mayStore() &&
-      !mayLoad() &&
-      !isCall() &&
-      !hasUnmodeledSideEffects())
+  if (!mayStore() && !mayLoad() && !isCall() && !hasUnmodeledSideEffects())
     return false;
 
   // Otherwise, if the instruction has no memory reference information,

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https://github.com/llvm/llvm-project/pull/160580