[llvm] 844150d - [AMDGPU] Update comment about coop atomics ordering. NFC (#160463)
via llvm-commits
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Wed Sep 24 10:03:41 PDT 2025
Author: Stanislav Mekhanoshin
Date: 2025-09-24T10:03:37-07:00
New Revision: 844150de8ab7b28e1de5e003335b6f39cc671b70
URL: https://github.com/llvm/llvm-project/commit/844150de8ab7b28e1de5e003335b6f39cc671b70
DIFF: https://github.com/llvm/llvm-project/commit/844150de8ab7b28e1de5e003335b6f39cc671b70.diff
LOG: [AMDGPU] Update comment about coop atomics ordering. NFC (#160463)
Added:
Modified:
llvm/include/llvm/IR/IntrinsicsAMDGPU.td
Removed:
################################################################################
diff --git a/llvm/include/llvm/IR/IntrinsicsAMDGPU.td b/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
index be965d8ead6fc..ded00b1274670 100644
--- a/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+++ b/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
@@ -3808,6 +3808,7 @@ class AMDGPUCooperativeAtomicLoad<LLVMType Ty> : Intrinsic <
[SDNPMemOperand, SDNPMayLoad]
>;
+// TODO: We may want to drop _relaxed and use an atomic ordering operand instead.
def int_amdgcn_cooperative_atomic_load_32x4B : AMDGPUCooperativeAtomicLoad<llvm_i32_ty>;
def int_amdgcn_cooperative_atomic_store_32x4B : AMDGPUCooperativeAtomicStore<llvm_i32_ty>;
def int_amdgcn_cooperative_atomic_load_16x8B : AMDGPUCooperativeAtomicLoad<llvm_v2i32_ty>;
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