[llvm] [BOLT] Introduce helpers to match `MCInst`s one at a time (NFC) (PR #138883)

[Anatoly Trosinenko via llvm-commits]

================
@@ -389,81 +390,58 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
 
     // Iterate over the instructions of BB in reverse order, matching opcodes
     // and operands.
-    MCPhysReg TestedReg = 0;
-    MCPhysReg ScratchReg = 0;
+
     auto It = BB.end();
-    auto StepAndGetOpcode = [&It, &BB]() -> int {
-      if (It == BB.begin())
-        return -1;
-      --It;
-      return It->getOpcode();
+    auto StepBack = [&]() {
+      while (It != BB.begin()) {
+        --It;
+        if (!isCFI(*It))
----------------
atrosinenko wrote:

My intention was to control the instruction sequence as much as possible in ptrauth-related methods. While CFI pseudos were known to occur in the middle of the sequence (and they don't add any real instructions to the sequence being analyzed), I don't expect any other pseudo instructions to occur here. As I'm not absolutely sure any pseudo instruction must expand into exactly zero bytes of code (this is obviously not the case in the backend in general, but it is *probably* the case in the disassembled code), I kept `isCFI` so far and added a comment. Please feel free to correct me if I'm wrong.

https://github.com/llvm/llvm-project/pull/138883