[llvm] [BOLT][AArch64] Handle OpNegateRAState to enable optimizing binaries with pac-ret hardening (PR #120064)

[Gergely Bálint via llvm-commits]

bgergely0 wrote:

Thanks for the reviews @maksfb !

> What is the policy for passes that insert instructions, is it their responsibility for annotating the state or is it something InsertNegateRAStatePass can handle?

Adding book-keeping responsibility to other passes would be a burden, so `InsertNegateRAStatePass` tries to guess these using the `inferUnknownStates` function. This just takes the RAState of the prev. instruction, unless that was a signing/authenticating inst, in which case takes the opposite.

This was written under the assumption that new instructions are mostly branches at the ends of BasicBlocks resulting from the reordered BBs. But now I realize that Stubs inserted in LongJmp are tricky, because two calls to the same target can share a Stub, but they might come from ranges with opposing RAStates, in which case the Stub's state is not clear.

Not sure of the solution here, we might have to limit reusing Stubs in such cases.

Another improvement could be to check if we are inserting after an instruction that has no fallthrough case (e.g. branch, return), meaning the next instruction is not after it in the control flow, and cannot inherit its RAState.

https://github.com/llvm/llvm-project/pull/120064