[llvm] [X86][MC][AsmParser] Reject H-byte regs with VEX/EVEX-encoded 8-bit RR (NDD) (PR #160039)

[Shengchen Kan via llvm-commits]

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@@ -4036,11 +4041,19 @@ bool X86AsmParser::validateInstruction(MCInst &Inst, const OperandVector &Ops) {
         UsesRex = true;
     }
 
-    if (UsesRex && HReg) {
-      StringRef RegName = X86IntelInstPrinter::getRegisterName(HReg);
-      return Error(Ops[0]->getStartLoc(),
-                   "can't encode '" + RegName + "' in an instruction requiring "
-                   "REX prefix");
+    if (HReg) {
+      if (Enc == X86II::EVEX || ForcedOpcodePrefix == OpcodePrefix_REX2) {
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KanRobert wrote:

I think we also need to check ForcedOpcodePrefix == OpcodePrefix_REX

https://github.com/llvm/llvm-project/pull/160039