[llvm] [X86][MC][AsmParser] Reject H-byte regs with VEX/EVEX-encoded 8-bit RR (NDD) (PR #160039)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 23 23:07:53 PDT 2025
================
@@ -4031,16 +4034,23 @@ bool X86AsmParser::validateInstruction(MCInst &Inst, const OperandVector &Ops) {
MCRegister Reg = MO.getReg();
if (Reg == X86::AH || Reg == X86::BH || Reg == X86::CH || Reg == X86::DH)
HReg = Reg;
- if (X86II::isX86_64NonExtLowByteReg(Reg) ||
- X86II::isX86_64ExtendedReg(Reg))
+ if (Enc == 0 && (X86II::isX86_64NonExtLowByteReg(Reg) ||
+ X86II::isX86_64ExtendedReg(Reg)))
UsesRex = true;
}
- if (UsesRex && HReg) {
+ if (Enc == 0 && UsesRex && HReg) {
----------------
woruyu wrote:
Done! removed
https://github.com/llvm/llvm-project/pull/160039
More information about the llvm-commits
mailing list