[llvm] [X86][MC][AsmParser] Reject H-byte regs with VEX/EVEX-encoded 8-bit RR (NDD) (PR #160039)

[Phoebe Wang via llvm-commits]

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@@ -4031,16 +4034,23 @@ bool X86AsmParser::validateInstruction(MCInst &Inst, const OperandVector &Ops) {
       MCRegister Reg = MO.getReg();
       if (Reg == X86::AH || Reg == X86::BH || Reg == X86::CH || Reg == X86::DH)
         HReg = Reg;
-      if (X86II::isX86_64NonExtLowByteReg(Reg) ||
-          X86II::isX86_64ExtendedReg(Reg))
+      if (Enc == 0 && (X86II::isX86_64NonExtLowByteReg(Reg) ||
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phoebewang wrote:

`Enc == 0` is not needed.

https://github.com/llvm/llvm-project/pull/160039