[llvm] [X86][MC][AsmParser] Reject H-byte regs with VEX/EVEX-encoded 8-bit RR (NDD) (PR #160039)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 23 19:10:45 PDT 2025
================
@@ -4044,6 +4044,24 @@ bool X86AsmParser::validateInstruction(MCInst &Inst, const OperandVector &Ops) {
}
}
+ unsigned Enc = TSFlags & X86II::EncodingMask;
+ if (Enc == X86II::VEX || Enc == X86II::EVEX || Enc == X86II::XOP) {
----------------
woruyu wrote:
Done! delete VEX and XOP, add REX2.
https://github.com/llvm/llvm-project/pull/160039
More information about the llvm-commits
mailing list