[llvm] [RISCV] Add basic Mach-O triple support. (PR #141682)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions h,cpp -- llvm/lib/Target/RISCV/MCTargetDesc/RISCVMachObjectWriter.cpp llvm/lib/BinaryFormat/MachO.cpp llvm/lib/Object/MachOObjectFile.cpp llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h llvm/lib/Target/RISCV/RISCVTargetMachine.cpp llvm/lib/TargetParser/TargetDataLayout.cpp
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diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
index 34b8b3ca4..32c7e76f8 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -958,9 +958,8 @@ RISCVAsmBackend::createObjectTargetWriter() const {
 class DarwinRISCVAsmBackend : public RISCVAsmBackend {
 public:
   DarwinRISCVAsmBackend(const MCSubtargetInfo &STI, uint8_t OSABI, bool Is64Bit,
-			bool IsLittleEndian,
-                        const MCTargetOptions &Options)
-    : RISCVAsmBackend(STI, OSABI, Is64Bit, IsLittleEndian, Options) {}
+                        bool IsLittleEndian, const MCTargetOptions &Options)
+      : RISCVAsmBackend(STI, OSABI, Is64Bit, IsLittleEndian, Options) {}
 
   std::unique_ptr<MCObjectTargetWriter>
   createObjectTargetWriter() const override {
@@ -978,8 +977,8 @@ MCAsmBackend *llvm::createRISCVAsmBackend(const Target &T,
   const Triple &TT = STI.getTargetTriple();
   uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS());
   if (TT.isOSBinFormatMachO())
-    return new DarwinRISCVAsmBackend(STI, OSABI, TT.isArch64Bit(), TT.isLittleEndian(),
-				     Options);
+    return new DarwinRISCVAsmBackend(STI, OSABI, TT.isArch64Bit(),
+                                     TT.isLittleEndian(), Options);
   return new RISCVAsmBackend(STI, OSABI, TT.isArch64Bit(), TT.isLittleEndian(),
-			     Options);
+                             Options);
 }

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https://github.com/llvm/llvm-project/pull/141682