[llvm] [AMDGPU][True16][MC] vinterp opsel in asm (PR #150315)

[Joe Nash via llvm-commits]

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@@ -9237,15 +9238,29 @@ void AMDGPUAsmParser::cvtVINTERP(MCInst &Inst, const OperandVector &Operands)
     int OpIdx = AMDGPU::getNamedOperandIdx(Opc, Ops[J]);
     if (OpIdx == -1)
       break;
+    const MCOperand &SrcOp = Inst.getOperand(OpIdx);
 
     int ModIdx = AMDGPU::getNamedOperandIdx(Opc, ModOps[J]);
     uint32_t ModVal = Inst.getOperand(ModIdx).getImm();
 
-    if ((OpSel & (1 << J)) != 0)
-      ModVal |= SISrcMods::OP_SEL_0;
-    if (ModOps[J] == AMDGPU::OpName::src0_modifiers &&
-        (OpSel & (1 << 3)) != 0)
-      ModVal |= SISrcMods::DST_OP_SEL;
+    if (SrcOp.isReg() &&
+        MRI->getRegClass(AMDGPU::VGPR_16RegClassID).contains(SrcOp.getReg())) {
+      if (AMDGPU::isHi16Reg(SrcOp.getReg(), *MRI))
+        ModVal |= SISrcMods::OP_SEL_0;
+    } else {
+      if ((OpSel & (1 << J)) != 0)
+        ModVal |= SISrcMods::OP_SEL_0;
+    }
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Sisyph wrote:

Please add a blank line here to better separate the if/else and following if

https://github.com/llvm/llvm-project/pull/150315