[llvm] [AMDGPU][AsmParser][NFC] Combine the Lit and Lit64 modifier flags. (PR #160315)

Ivan Kosarev via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 23 09:47:11 PDT 2025


https://github.com/kosarev updated https://github.com/llvm/llvm-project/pull/160315

>From 75c65e60f5d27c066f788bc8e6625d6b3316793c Mon Sep 17 00:00:00 2001
From: Ivan Kosarev <ivan.kosarev at amd.com>
Date: Tue, 23 Sep 2025 15:49:04 +0100
Subject: [PATCH] [AMDGPU][AsmParser][NFC] Combine the Lit and Lit64 modifier
 flags.

They represent mutually exclusive values of the same attribute.
---
 .../AMDGPU/AsmParser/AMDGPUAsmParser.cpp      | 71 ++++++++++---------
 1 file changed, 37 insertions(+), 34 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index 2ced4d6813766..56f79c2d67d3f 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -55,6 +55,8 @@ class AMDGPUAsmParser;
 
 enum RegisterKind { IS_UNKNOWN, IS_VGPR, IS_SGPR, IS_AGPR, IS_TTMP, IS_SPECIAL };
 
+enum class LitModifier { None, Lit, Lit64 };
+
 //===----------------------------------------------------------------------===//
 // Operand
 //===----------------------------------------------------------------------===//
@@ -80,8 +82,7 @@ class AMDGPUOperand : public MCParsedAsmOperand {
     bool Abs = false;
     bool Neg = false;
     bool Sext = false;
-    bool Lit = false;
-    bool Lit64 = false;
+    LitModifier Lit = LitModifier::None;
 
     bool hasFPModifiers() const { return Abs || Neg; }
     bool hasIntModifiers() const { return Sext; }
@@ -1675,10 +1676,10 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
   bool isOpcodeModifierWithVal(const AsmToken &Token, const AsmToken &NextToken) const;
   bool parseSP3NegModifier();
   ParseStatus parseImm(OperandVector &Operands, bool HasSP3AbsModifier = false,
-                       bool HasLit = false, bool HasLit64 = false);
+                       LitModifier Lit = LitModifier::None);
   ParseStatus parseReg(OperandVector &Operands);
   ParseStatus parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false,
-                            bool HasLit = false, bool HasLit64 = false);
+                            LitModifier Lit = LitModifier::None);
   ParseStatus parseRegOrImmWithFPInputMods(OperandVector &Operands,
                                            bool AllowImm = true);
   ParseStatus parseRegOrImmWithIntInputMods(OperandVector &Operands,
@@ -2437,7 +2438,8 @@ void AMDGPUOperand::addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyMo
     // truncated to uint32_t), if the target doesn't support 64-bit literals, or
     // the lit modifier is explicitly used, we need to truncate it to the 32
     // LSBs.
-    if (!AsmParser->has64BitLiterals() || getModifiers().Lit)
+    if (!AsmParser->has64BitLiterals() ||
+        getModifiers().Lit == LitModifier::Lit)
       Val = Lo_32(Val);
 
     Inst.addOperand(MCOperand::createImm(Val));
@@ -2461,8 +2463,9 @@ void AMDGPUOperand::addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyMo
       // 1) explicitly forced by using lit modifier;
       // 2) the value is a valid 32-bit representation (signed or unsigned),
       // meanwhile not forced by lit64 modifier.
-      if (getModifiers().Lit ||
-          (!getModifiers().Lit64 && (isInt<32>(Val) || isUInt<32>(Val))))
+      if (getModifiers().Lit == LitModifier::Lit ||
+          (getModifiers().Lit != LitModifier::Lit64 &&
+           (isInt<32>(Val) || isUInt<32>(Val))))
         Val = static_cast<uint64_t>(Val) << 32;
     }
 
@@ -2484,7 +2487,8 @@ void AMDGPUOperand::addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyMo
     return;
 
   case AMDGPU::OPERAND_KIMM64:
-    if ((isInt<32>(Val) || isUInt<32>(Val)) && !getModifiers().Lit64)
+    if ((isInt<32>(Val) || isUInt<32>(Val)) &&
+        getModifiers().Lit != LitModifier::Lit64)
       Val <<= 32;
 
     Inst.addOperand(MCOperand::createImm(Val));
@@ -3167,20 +3171,22 @@ AMDGPUAsmParser::parseRegister(bool RestoreOnFailure) {
 }
 
 ParseStatus AMDGPUAsmParser::parseImm(OperandVector &Operands,
-                                      bool HasSP3AbsModifier, bool HasLit,
-                                      bool HasLit64) {
+                                      bool HasSP3AbsModifier, LitModifier Lit) {
   // TODO: add syntactic sugar for 1/(2*PI)
 
   if (isRegister() || isModifier())
     return ParseStatus::NoMatch;
 
-  if (!HasLit && !HasLit64) {
-    HasLit64 = trySkipId("lit64");
-    HasLit = !HasLit64 && trySkipId("lit");
-    if (HasLit || HasLit64) {
+  if (Lit == LitModifier::None) {
+    if (trySkipId("lit"))
+      Lit = LitModifier::Lit;
+    else if (trySkipId("lit64"))
+      Lit = LitModifier::Lit64;
+
+    if (Lit != LitModifier::None) {
       if (!skipToken(AsmToken::LParen, "expected left paren after lit"))
         return ParseStatus::Failure;
-      ParseStatus S = parseImm(Operands, HasSP3AbsModifier, HasLit, HasLit64);
+      ParseStatus S = parseImm(Operands, HasSP3AbsModifier, Lit);
       if (S.isSuccess() &&
           !skipToken(AsmToken::RParen, "expected closing parentheses"))
         return ParseStatus::Failure;
@@ -3201,8 +3207,7 @@ ParseStatus AMDGPUAsmParser::parseImm(OperandVector &Operands,
   }
 
   AMDGPUOperand::Modifiers Mods;
-  Mods.Lit = HasLit;
-  Mods.Lit64 = HasLit64;
+  Mods.Lit = Lit;
 
   if (IsReal) {
     // Floating-point expressions are not supported.
@@ -3253,7 +3258,7 @@ ParseStatus AMDGPUAsmParser::parseImm(OperandVector &Operands,
       AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands.back());
       Op.setModifiers(Mods);
     } else {
-      if (HasLit || HasLit64)
+      if (Lit != LitModifier::None)
         return ParseStatus::NoMatch;
       Operands.push_back(AMDGPUOperand::CreateExpr(this, Expr, S));
     }
@@ -3277,14 +3282,13 @@ ParseStatus AMDGPUAsmParser::parseReg(OperandVector &Operands) {
 }
 
 ParseStatus AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands,
-                                           bool HasSP3AbsMod, bool HasLit,
-                                           bool HasLit64) {
+                                           bool HasSP3AbsMod, LitModifier Lit) {
   ParseStatus Res = parseReg(Operands);
   if (!Res.isNoMatch())
     return Res;
   if (isModifier())
     return ParseStatus::NoMatch;
-  return parseImm(Operands, HasSP3AbsMod, HasLit, HasLit64);
+  return parseImm(Operands, HasSP3AbsMod, Lit);
 }
 
 bool
@@ -3380,7 +3384,6 @@ AMDGPUAsmParser::parseRegOrImmWithFPInputMods(OperandVector &Operands,
                                               bool AllowImm) {
   bool Neg, SP3Neg;
   bool Abs, SP3Abs;
-  bool Lit64, Lit;
   SMLoc Loc;
 
   // Disable ambiguous constructs like '--1' etc. Should use neg(-1) instead.
@@ -3400,18 +3403,19 @@ AMDGPUAsmParser::parseRegOrImmWithFPInputMods(OperandVector &Operands,
   if (Abs && !skipToken(AsmToken::LParen, "expected left paren after abs"))
     return ParseStatus::Failure;
 
-  Lit64 = trySkipId("lit64");
-  if (Lit64) {
+  LitModifier Lit = LitModifier::None;
+  if (trySkipId("lit")) {
+    Lit = LitModifier::Lit;
+    if (!skipToken(AsmToken::LParen, "expected left paren after lit"))
+      return ParseStatus::Failure;
+  } else if (trySkipId("lit64")) {
+    Lit = LitModifier::Lit64;
     if (!skipToken(AsmToken::LParen, "expected left paren after lit64"))
       return ParseStatus::Failure;
     if (!has64BitLiterals())
       return Error(Loc, "lit64 is not supported on this GPU");
   }
 
-  Lit = !Lit64 && trySkipId("lit");
-  if (Lit && !skipToken(AsmToken::LParen, "expected left paren after lit"))
-    return ParseStatus::Failure;
-
   Loc = getLoc();
   SP3Abs = trySkipToken(AsmToken::Pipe);
   if (Abs && SP3Abs)
@@ -3419,16 +3423,16 @@ AMDGPUAsmParser::parseRegOrImmWithFPInputMods(OperandVector &Operands,
 
   ParseStatus Res;
   if (AllowImm) {
-    Res = parseRegOrImm(Operands, SP3Abs, Lit, Lit64);
+    Res = parseRegOrImm(Operands, SP3Abs, Lit);
   } else {
     Res = parseReg(Operands);
   }
   if (!Res.isSuccess())
-    return (SP3Neg || Neg || SP3Abs || Abs || Lit || Lit64)
+    return (SP3Neg || Neg || SP3Abs || Abs || Lit != LitModifier::None)
                ? ParseStatus::Failure
                : Res;
 
-  if ((Lit || Lit64) && !Operands.back()->isImm())
+  if (Lit != LitModifier::None && !Operands.back()->isImm())
     Error(Loc, "expected immediate with lit modifier");
 
   if (SP3Abs && !skipToken(AsmToken::Pipe, "expected vertical bar"))
@@ -3437,7 +3441,7 @@ AMDGPUAsmParser::parseRegOrImmWithFPInputMods(OperandVector &Operands,
     return ParseStatus::Failure;
   if (Neg && !skipToken(AsmToken::RParen, "expected closing parentheses"))
     return ParseStatus::Failure;
-  if ((Lit || Lit64) &&
+  if (Lit != LitModifier::None &&
       !skipToken(AsmToken::RParen, "expected closing parentheses"))
     return ParseStatus::Failure;
 
@@ -3445,9 +3449,8 @@ AMDGPUAsmParser::parseRegOrImmWithFPInputMods(OperandVector &Operands,
   Mods.Abs = Abs || SP3Abs;
   Mods.Neg = Neg || SP3Neg;
   Mods.Lit = Lit;
-  Mods.Lit64 = Lit64;
 
-  if (Mods.hasFPModifiers() || Lit || Lit64) {
+  if (Mods.hasFPModifiers() || Lit != LitModifier::None) {
     AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands.back());
     if (Op.isExpr())
       return Error(Op.getStartLoc(), "expected an absolute expression");



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