[llvm] [AArch64] Adjust the scheduling info of SVE FCMP on Cortex-A510. (PR #153810)

[David Green via llvm-commits]

davemgreen wrote:

Thanks - there is an .ll reproducer here: https://gcc.godbolt.org/z/Pfsh4Ef6a. It is some issue with the debug info of z30_z31 registers and the size of scalable vectors. I will put together a patch to see about fixing it, one way or another.

https://github.com/llvm/llvm-project/pull/153810