[llvm] [DRAFT][RegisterCoalescer] Enable non-trivial rematerialization (PR #160153)

[Luke Lau via llvm-commits]

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@@ -1658,10 +1658,11 @@ bool TargetInstrInfo::isReallyTriviallyReMaterializable(
     if (MO.isDef() && Reg != DefReg)
       return false;
 
-    // Don't allow any virtual-register uses. Rematting an instruction with
-    // virtual register uses would length the live ranges of the uses, which
-    // is not necessarily a good idea, certainly not "trivial".
-    if (MO.isUse())
+    // If asked for trivial materialization, don't allow any virtual-register
+    // uses. Rematting an instruction with virtual register uses would length
+    // the live ranges of the uses, which means rematerialization must become
+    // a per-user query which many callers don't want.
----------------
lukel97 wrote:

I don't think the existing comment was accurate since we never lengthen live ranges when rematerializing. It's something we definitely need to consider if we ever do end up extending live ranges, but that's truly non-trivial and I don't know if that's on the roadmap any time soon 

https://github.com/llvm/llvm-project/pull/160153