[llvm] 1fce874 - [AMDGPU] Use unsigned overflow for S_UADDO_PSEUDO/S_USUBO_PSEUDO (#160142)

[via llvm-commits]

Author: LU-JOHN
Date: 2025-09-22T16:48:16Z
New Revision: 1fce874560c9d8911d0bb83deceb4ef8d5a5b9ac

URL: https://github.com/llvm/llvm-project/commit/1fce874560c9d8911d0bb83deceb4ef8d5a5b9ac
DIFF: https://github.com/llvm/llvm-project/commit/1fce874560c9d8911d0bb83deceb4ef8d5a5b9ac.diff

LOG: [AMDGPU] Use unsigned overflow for S_UADDO_PSEUDO/S_USUBO_PSEUDO (#160142)

Use correct unsigned overflow instructions for
S_UADDO_PSEUDO/S_USUBO_PSEUDO. Note that this issue was hidden because
instruction selection never selected S_UADDO_PSEUDO/S_USUBO_PSEUDO which
will be addressed in https://github.com/llvm/llvm-project/pull/159814.

Signed-off-by: John Lu <John.Lu at amd.com>

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 78d608556f056..febcd304c9ef4 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -5953,8 +5953,8 @@ SITargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
     MachineOperand &Src1 = MI.getOperand(3);
 
     unsigned Opc = (MI.getOpcode() == AMDGPU::S_UADDO_PSEUDO)
-                       ? AMDGPU::S_ADD_I32
-                       : AMDGPU::S_SUB_I32;
+                       ? AMDGPU::S_ADD_U32
+                       : AMDGPU::S_SUB_U32;
     // clang-format off
     BuildMI(*BB, MI, DL, TII->get(Opc), Dest0.getReg())
         .add(Src0)