[llvm] [X86][MC][AsmParser] Reject H-byte regs with VEX/EVEX-encoded 8-bit RR (NDD) (PR #160039)

[Phoebe Wang via llvm-commits]

================
@@ -4044,6 +4044,24 @@ bool X86AsmParser::validateInstruction(MCInst &Inst, const OperandVector &Ops) {
     }
   }
 
+  unsigned Enc = TSFlags & X86II::EncodingMask;
+  if (Enc == X86II::VEX || Enc == X86II::EVEX || Enc == X86II::XOP) {
----------------
phoebewang wrote:

Here is a REX2 example: https://godbolt.org/z/xzYxrGrPn. You may check `ForcedOpcodePrefix == OpcodePrefix_REX2` for it.

https://github.com/llvm/llvm-project/pull/160039