[llvm] Greedy: Make eviction broken hint cost use CopyCost units (PR #160084)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 22 05:23:02 PDT 2025
https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/160084
Change the eviction advisor heuristic cost based on number of broken
hints to work in units of copy cost, rather than a magic number 1.
The intent is to allow breaking hints for cheap subregisters in favor
of more expensive register tuples.
The llvm.amdgcn.image.dim.gfx90a.ll change shows a simple example of
the case I am attempting to solve. Use of tuples in ABI contexts ends up
looking like this:
%argN = COPY $vgprN
%tuple = inst %argN
$vgpr0 = COPY %tuple.sub0
$vgpr1 = COPY %tuple.sub1
$vgpr2 = COPY %tuple.sub2
$vgpr3 = COPY %tuple.sub3
Since there are physreg copies in the input and output sequence,
both have hints to a physreg. The wider tuple hint on the output
should win though, since this satisfies 4 hints instead of 1.
This is the obvious part of a larger change to better handle
subregister interference with register tuples, and is not sufficient
to handle the original case I am looking at. There are several bugs here
that are proving tricky to untangle. In particular, there is a double
counting bug for all registers with multiple regunits; the cost of breaking
the interfering hint is added for each interfering virtual register,
which have repeat visits across regunits. Fixing this badly regresses
a number of RISCV tests, which seem to rely on overestimating the cost
in tryFindEvictionCandidate to avoid early-exiting the eviction
candidate loop.
>From c8a78ab0396e576a50d2e2ebfd4925a7039d4de1 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Sat, 20 Sep 2025 22:39:09 +0900
Subject: [PATCH] Greedy: Make eviction broken hint cost use CopyCost units
Change the eviction advisor heuristic cost based on number of broken
hints to work in units of copy cost, rather than a magic number 1.
The intent is to allow breaking hints for cheap subregisters in favor
of more expensive register tuples.
The llvm.amdgcn.image.dim.gfx90a.ll change shows a simple example of
the case I am attempting to solve. Use of tuples in ABI contexts ends up
looking like this:
%argN = COPY $vgprN
%tuple = inst %argN
$vgpr0 = COPY %tuple.sub0
$vgpr1 = COPY %tuple.sub1
$vgpr2 = COPY %tuple.sub2
$vgpr3 = COPY %tuple.sub3
Since there are physreg copies in the input and output sequence,
both have hints to a physreg. The wider tuple hint on the output
should win though, since this satisfies 4 hints instead of 1.
This is the obvious part of a larger change to better handle
subregister interference with register tuples, and is not sufficient
to handle the original case I am looking at. There are several bugs here
that are proving tricky to untangle. In particular, there is a double
counting bug for all registers with multiple regunits; the cost of breaking
the interfering hint is added for each interfering virtual register,
which have repeat visits across regunits. Fixing this badly regresses
a number of RISCV tests, which seem to rely on overestimating the cost
in tryFindEvictionCandidate to avoid early-exiting the eviction
candidate loop.
---
llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp | 8 +-
.../AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll | 19 +-
llvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll | 3112 +++++++-------
llvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll | 3784 ++++++++--------
llvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll | 3112 +++++++-------
llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll | 3812 ++++++++---------
llvm/test/CodeGen/RISCV/zilsd.ll | 7 +-
7 files changed, 6926 insertions(+), 6928 deletions(-)
diff --git a/llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp b/llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp
index 0d44ddc428570..f2c2f74755ace 100644
--- a/llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp
+++ b/llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp
@@ -224,7 +224,7 @@ bool DefaultEvictionAdvisor::canEvictHintInterference(
const LiveInterval &VirtReg, MCRegister PhysReg,
const SmallVirtRegSet &FixedRegisters) const {
EvictionCost MaxCost;
- MaxCost.setBrokenHints(1);
+ MaxCost.setBrokenHints(MRI->getRegClass(VirtReg.reg())->getCopyCost());
return canEvictInterferenceBasedOnCost(VirtReg, PhysReg, true, MaxCost,
FixedRegisters);
}
@@ -300,12 +300,14 @@ bool DefaultEvictionAdvisor::canEvictInterferenceBasedOnCost(
return false;
// We permit breaking cascades for urgent evictions. It should be the
// last resort, though, so make it really expensive.
- Cost.BrokenHints += 10;
+ Cost.BrokenHints += 10 * MRI->getRegClass(Intf->reg())->getCopyCost();
}
// Would this break a satisfied hint?
bool BreaksHint = VRM->hasPreferredPhys(Intf->reg());
// Update eviction cost.
- Cost.BrokenHints += BreaksHint;
+ if (BreaksHint)
+ Cost.BrokenHints += MRI->getRegClass(Intf->reg())->getCopyCost();
+
Cost.MaxWeight = std::max(Cost.MaxWeight, Intf->weight());
// Abort if this would be too expensive.
if (Cost >= MaxCost)
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
index bb4a607fc62d0..44a4e8171ff33 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
@@ -18,22 +18,19 @@ define amdgpu_ps <4 x float> @load_1d_lwe(<8 x i32> inreg %rsrc, ptr addrspace(1
; GCN-LABEL: load_1d_lwe:
; GCN: ; %bb.0: ; %main_body
; GCN-NEXT: v_mov_b32_e32 v8, 0
+; GCN-NEXT: v_mov_b32_e32 v6, v0
; GCN-NEXT: v_mov_b32_e32 v9, v8
; GCN-NEXT: v_mov_b32_e32 v10, v8
; GCN-NEXT: v_mov_b32_e32 v11, v8
; GCN-NEXT: v_mov_b32_e32 v12, v8
-; GCN-NEXT: v_mov_b32_e32 v2, v8
-; GCN-NEXT: v_mov_b32_e32 v3, v9
-; GCN-NEXT: v_mov_b32_e32 v4, v10
-; GCN-NEXT: v_mov_b32_e32 v5, v11
-; GCN-NEXT: v_mov_b32_e32 v6, v12
-; GCN-NEXT: image_load v[2:6], v0, s[0:7] dmask:0xf unorm lwe
+; GCN-NEXT: v_mov_b32_e32 v0, v8
+; GCN-NEXT: v_mov_b32_e32 v1, v9
+; GCN-NEXT: v_mov_b32_e32 v2, v10
+; GCN-NEXT: v_mov_b32_e32 v3, v11
+; GCN-NEXT: v_mov_b32_e32 v4, v12
+; GCN-NEXT: image_load v[0:4], v6, s[0:7] dmask:0xf unorm lwe
; GCN-NEXT: s_waitcnt vmcnt(0)
-; GCN-NEXT: v_mov_b32_e32 v0, v2
-; GCN-NEXT: v_mov_b32_e32 v1, v3
-; GCN-NEXT: v_mov_b32_e32 v2, v4
-; GCN-NEXT: v_mov_b32_e32 v3, v5
-; GCN-NEXT: global_store_dword v8, v6, s[8:9]
+; GCN-NEXT: global_store_dword v8, v4, s[8:9]
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: ; return to shader part epilog
main_body:
diff --git a/llvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll b/llvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll
index 68d3f85cd1f23..6d70d191ba8b6 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll
@@ -9,8 +9,8 @@ define <vscale x 1 x i8> @test_vloxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv
; CHECK-LABEL: test_vloxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv1i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 3)
@@ -22,8 +22,8 @@ define <vscale x 1 x i8> @test_vloxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2
; CHECK-LABEL: test_vloxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -38,8 +38,8 @@ define <vscale x 1 x i8> @test_vloxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv
; CHECK-LABEL: test_vloxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv1i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 3)
@@ -51,8 +51,8 @@ define <vscale x 1 x i8> @test_vloxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2
; CHECK-LABEL: test_vloxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -67,8 +67,8 @@ define <vscale x 1 x i8> @test_vloxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv
; CHECK-LABEL: test_vloxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv1i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 3)
@@ -80,8 +80,8 @@ define <vscale x 1 x i8> @test_vloxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2
; CHECK-LABEL: test_vloxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -96,8 +96,8 @@ define <vscale x 2 x i8> @test_vloxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv
; CHECK-LABEL: test_vloxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 3)
@@ -109,8 +109,8 @@ define <vscale x 2 x i8> @test_vloxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2
; CHECK-LABEL: test_vloxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -125,8 +125,8 @@ define <vscale x 2 x i8> @test_vloxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv
; CHECK-LABEL: test_vloxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 3)
@@ -138,8 +138,8 @@ define <vscale x 2 x i8> @test_vloxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2
; CHECK-LABEL: test_vloxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -154,8 +154,8 @@ define <vscale x 2 x i8> @test_vloxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv
; CHECK-LABEL: test_vloxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 3)
@@ -167,8 +167,8 @@ define <vscale x 2 x i8> @test_vloxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2
; CHECK-LABEL: test_vloxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -183,8 +183,8 @@ define <vscale x 4 x i8> @test_vloxseg2_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv
; CHECK-LABEL: test_vloxseg2_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 3)
@@ -196,8 +196,8 @@ define <vscale x 4 x i8> @test_vloxseg2_mask_nxv4i8_triscv.vector.tuple_nxv4i8_2
; CHECK-LABEL: test_vloxseg2_mask_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -212,8 +212,8 @@ define <vscale x 4 x i8> @test_vloxseg2_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv
; CHECK-LABEL: test_vloxseg2_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 3)
@@ -225,8 +225,8 @@ define <vscale x 4 x i8> @test_vloxseg2_mask_nxv4i8_triscv.vector.tuple_nxv4i8_2
; CHECK-LABEL: test_vloxseg2_mask_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -270,8 +270,8 @@ define <vscale x 8 x i8> @test_vloxseg2_nxv8i8_triscv.vector.tuple_nxv8i8_2t_nxv
; CHECK-LABEL: test_vloxseg2_nxv8i8_triscv.vector.tuple_nxv8i8_2t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 8 x i8> %index, i32 %vl, i32 3)
@@ -283,8 +283,8 @@ define <vscale x 8 x i8> @test_vloxseg2_mask_nxv8i8_triscv.vector.tuple_nxv8i8_2
; CHECK-LABEL: test_vloxseg2_mask_nxv8i8_triscv.vector.tuple_nxv8i8_2t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -502,8 +502,8 @@ define <vscale x 1 x i8> @test_vloxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv
; CHECK-LABEL: test_vloxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv1i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 3)
@@ -515,8 +515,8 @@ define <vscale x 1 x i8> @test_vloxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3
; CHECK-LABEL: test_vloxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv1i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -531,8 +531,8 @@ define <vscale x 1 x i8> @test_vloxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv
; CHECK-LABEL: test_vloxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv1i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 3)
@@ -544,8 +544,8 @@ define <vscale x 1 x i8> @test_vloxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3
; CHECK-LABEL: test_vloxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv1i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -560,8 +560,8 @@ define <vscale x 1 x i8> @test_vloxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv
; CHECK-LABEL: test_vloxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv1i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 3)
@@ -573,8 +573,8 @@ define <vscale x 1 x i8> @test_vloxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3
; CHECK-LABEL: test_vloxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv1i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -589,8 +589,8 @@ define <vscale x 2 x i8> @test_vloxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv
; CHECK-LABEL: test_vloxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 3)
@@ -602,8 +602,8 @@ define <vscale x 2 x i8> @test_vloxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3
; CHECK-LABEL: test_vloxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -618,8 +618,8 @@ define <vscale x 2 x i8> @test_vloxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv
; CHECK-LABEL: test_vloxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 3)
@@ -631,8 +631,8 @@ define <vscale x 2 x i8> @test_vloxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3
; CHECK-LABEL: test_vloxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -647,8 +647,8 @@ define <vscale x 2 x i8> @test_vloxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv
; CHECK-LABEL: test_vloxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 3)
@@ -660,8 +660,8 @@ define <vscale x 2 x i8> @test_vloxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3
; CHECK-LABEL: test_vloxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -676,8 +676,8 @@ define <vscale x 4 x i8> @test_vloxseg3_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv
; CHECK-LABEL: test_vloxseg3_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 3)
@@ -689,8 +689,8 @@ define <vscale x 4 x i8> @test_vloxseg3_mask_nxv4i8_triscv.vector.tuple_nxv4i8_3
; CHECK-LABEL: test_vloxseg3_mask_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -705,8 +705,8 @@ define <vscale x 4 x i8> @test_vloxseg3_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv
; CHECK-LABEL: test_vloxseg3_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 3)
@@ -718,8 +718,8 @@ define <vscale x 4 x i8> @test_vloxseg3_mask_nxv4i8_triscv.vector.tuple_nxv4i8_3
; CHECK-LABEL: test_vloxseg3_mask_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -763,8 +763,8 @@ define <vscale x 8 x i8> @test_vloxseg3_nxv8i8_triscv.vector.tuple_nxv8i8_3t_nxv
; CHECK-LABEL: test_vloxseg3_nxv8i8_triscv.vector.tuple_nxv8i8_3t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 8 x i8> %index, i32 %vl, i32 3)
@@ -776,8 +776,8 @@ define <vscale x 8 x i8> @test_vloxseg3_mask_nxv8i8_triscv.vector.tuple_nxv8i8_3
; CHECK-LABEL: test_vloxseg3_mask_nxv8i8_triscv.vector.tuple_nxv8i8_3t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -850,8 +850,8 @@ define <vscale x 16 x i8> @test_vloxseg3_nxv16i8_triscv.vector.tuple_nxv16i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv16i8_triscv.vector.tuple_nxv16i8_3t_nxv16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei8.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv16i8_3t.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 16 x i8> %index, i32 %vl, i32 3)
@@ -863,8 +863,8 @@ define <vscale x 16 x i8> @test_vloxseg3_mask_nxv16i8_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vloxseg3_mask_nxv16i8_triscv.vector.tuple_nxv16i8_3t_nxv16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei8.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv16i1.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 16 x i8> %index, <vscale x 16 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -937,8 +937,8 @@ define <vscale x 1 x i8> @test_vloxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv
; CHECK-LABEL: test_vloxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv1i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 3)
@@ -950,8 +950,8 @@ define <vscale x 1 x i8> @test_vloxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4
; CHECK-LABEL: test_vloxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -966,8 +966,8 @@ define <vscale x 1 x i8> @test_vloxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv
; CHECK-LABEL: test_vloxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv1i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 3)
@@ -979,8 +979,8 @@ define <vscale x 1 x i8> @test_vloxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4
; CHECK-LABEL: test_vloxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -995,8 +995,8 @@ define <vscale x 1 x i8> @test_vloxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv
; CHECK-LABEL: test_vloxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv1i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 3)
@@ -1008,8 +1008,8 @@ define <vscale x 1 x i8> @test_vloxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4
; CHECK-LABEL: test_vloxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1024,8 +1024,8 @@ define <vscale x 2 x i8> @test_vloxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv
; CHECK-LABEL: test_vloxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 3)
@@ -1037,8 +1037,8 @@ define <vscale x 2 x i8> @test_vloxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4
; CHECK-LABEL: test_vloxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1053,8 +1053,8 @@ define <vscale x 2 x i8> @test_vloxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv
; CHECK-LABEL: test_vloxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 3)
@@ -1066,8 +1066,8 @@ define <vscale x 2 x i8> @test_vloxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4
; CHECK-LABEL: test_vloxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1082,8 +1082,8 @@ define <vscale x 2 x i8> @test_vloxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv
; CHECK-LABEL: test_vloxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 3)
@@ -1095,8 +1095,8 @@ define <vscale x 2 x i8> @test_vloxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4
; CHECK-LABEL: test_vloxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1111,8 +1111,8 @@ define <vscale x 4 x i8> @test_vloxseg4_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv
; CHECK-LABEL: test_vloxseg4_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 3)
@@ -1124,8 +1124,8 @@ define <vscale x 4 x i8> @test_vloxseg4_mask_nxv4i8_triscv.vector.tuple_nxv4i8_4
; CHECK-LABEL: test_vloxseg4_mask_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1140,8 +1140,8 @@ define <vscale x 4 x i8> @test_vloxseg4_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv
; CHECK-LABEL: test_vloxseg4_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 3)
@@ -1153,8 +1153,8 @@ define <vscale x 4 x i8> @test_vloxseg4_mask_nxv4i8_triscv.vector.tuple_nxv4i8_4
; CHECK-LABEL: test_vloxseg4_mask_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1198,8 +1198,8 @@ define <vscale x 8 x i8> @test_vloxseg4_nxv8i8_triscv.vector.tuple_nxv8i8_4t_nxv
; CHECK-LABEL: test_vloxseg4_nxv8i8_triscv.vector.tuple_nxv8i8_4t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 8 x i8> %index, i32 %vl, i32 3)
@@ -1211,8 +1211,8 @@ define <vscale x 8 x i8> @test_vloxseg4_mask_nxv8i8_triscv.vector.tuple_nxv8i8_4
; CHECK-LABEL: test_vloxseg4_mask_nxv8i8_triscv.vector.tuple_nxv8i8_4t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1285,8 +1285,8 @@ define <vscale x 16 x i8> @test_vloxseg4_nxv16i8_triscv.vector.tuple_nxv16i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv16i8_triscv.vector.tuple_nxv16i8_4t_nxv16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei8.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv16i8_4t.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 16 x i8> %index, i32 %vl, i32 3)
@@ -1298,8 +1298,8 @@ define <vscale x 16 x i8> @test_vloxseg4_mask_nxv16i8_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vloxseg4_mask_nxv16i8_triscv.vector.tuple_nxv16i8_4t_nxv16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei8.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv16i1.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 16 x i8> %index, <vscale x 16 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1372,8 +1372,8 @@ define <vscale x 1 x i8> @test_vloxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv1i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 3)
@@ -1385,8 +1385,8 @@ define <vscale x 1 x i8> @test_vloxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1401,8 +1401,8 @@ define <vscale x 1 x i8> @test_vloxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv1i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 3)
@@ -1414,8 +1414,8 @@ define <vscale x 1 x i8> @test_vloxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1430,8 +1430,8 @@ define <vscale x 1 x i8> @test_vloxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv1i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 3)
@@ -1443,8 +1443,8 @@ define <vscale x 1 x i8> @test_vloxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1459,8 +1459,8 @@ define <vscale x 2 x i8> @test_vloxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 3)
@@ -1472,8 +1472,8 @@ define <vscale x 2 x i8> @test_vloxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1488,8 +1488,8 @@ define <vscale x 2 x i8> @test_vloxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 3)
@@ -1501,8 +1501,8 @@ define <vscale x 2 x i8> @test_vloxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1517,8 +1517,8 @@ define <vscale x 2 x i8> @test_vloxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 3)
@@ -1530,8 +1530,8 @@ define <vscale x 2 x i8> @test_vloxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1546,8 +1546,8 @@ define <vscale x 4 x i8> @test_vloxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 3)
@@ -1559,8 +1559,8 @@ define <vscale x 4 x i8> @test_vloxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1575,8 +1575,8 @@ define <vscale x 4 x i8> @test_vloxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 3)
@@ -1588,8 +1588,8 @@ define <vscale x 4 x i8> @test_vloxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1604,8 +1604,8 @@ define <vscale x 4 x i8> @test_vloxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 3)
@@ -1617,8 +1617,8 @@ define <vscale x 4 x i8> @test_vloxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1633,8 +1633,8 @@ define <vscale x 8 x i8> @test_vloxseg5_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 8 x i8> %index, i32 %vl, i32 3)
@@ -1646,8 +1646,8 @@ define <vscale x 8 x i8> @test_vloxseg5_mask_nxv8i8_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1662,8 +1662,8 @@ define <vscale x 8 x i8> @test_vloxseg5_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 3)
@@ -1675,8 +1675,8 @@ define <vscale x 8 x i8> @test_vloxseg5_mask_nxv8i8_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1720,8 +1720,8 @@ define <vscale x 1 x i8> @test_vloxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv1i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 3)
@@ -1733,8 +1733,8 @@ define <vscale x 1 x i8> @test_vloxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1749,8 +1749,8 @@ define <vscale x 1 x i8> @test_vloxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv1i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 3)
@@ -1762,8 +1762,8 @@ define <vscale x 1 x i8> @test_vloxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1778,8 +1778,8 @@ define <vscale x 1 x i8> @test_vloxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv1i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 3)
@@ -1791,8 +1791,8 @@ define <vscale x 1 x i8> @test_vloxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1807,8 +1807,8 @@ define <vscale x 2 x i8> @test_vloxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 3)
@@ -1820,8 +1820,8 @@ define <vscale x 2 x i8> @test_vloxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1836,8 +1836,8 @@ define <vscale x 2 x i8> @test_vloxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 3)
@@ -1849,8 +1849,8 @@ define <vscale x 2 x i8> @test_vloxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1865,8 +1865,8 @@ define <vscale x 2 x i8> @test_vloxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 3)
@@ -1878,8 +1878,8 @@ define <vscale x 2 x i8> @test_vloxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1894,8 +1894,8 @@ define <vscale x 4 x i8> @test_vloxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 3)
@@ -1907,8 +1907,8 @@ define <vscale x 4 x i8> @test_vloxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1923,8 +1923,8 @@ define <vscale x 4 x i8> @test_vloxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 3)
@@ -1936,8 +1936,8 @@ define <vscale x 4 x i8> @test_vloxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1952,8 +1952,8 @@ define <vscale x 4 x i8> @test_vloxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 3)
@@ -1965,8 +1965,8 @@ define <vscale x 4 x i8> @test_vloxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1981,8 +1981,8 @@ define <vscale x 8 x i8> @test_vloxseg6_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 8 x i8> %index, i32 %vl, i32 3)
@@ -1994,8 +1994,8 @@ define <vscale x 8 x i8> @test_vloxseg6_mask_nxv8i8_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2010,8 +2010,8 @@ define <vscale x 8 x i8> @test_vloxseg6_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 3)
@@ -2023,8 +2023,8 @@ define <vscale x 8 x i8> @test_vloxseg6_mask_nxv8i8_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2068,8 +2068,8 @@ define <vscale x 1 x i8> @test_vloxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv1i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 3)
@@ -2081,8 +2081,8 @@ define <vscale x 1 x i8> @test_vloxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2097,8 +2097,8 @@ define <vscale x 1 x i8> @test_vloxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv1i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 3)
@@ -2110,8 +2110,8 @@ define <vscale x 1 x i8> @test_vloxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2126,8 +2126,8 @@ define <vscale x 1 x i8> @test_vloxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv1i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 3)
@@ -2139,8 +2139,8 @@ define <vscale x 1 x i8> @test_vloxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2155,8 +2155,8 @@ define <vscale x 2 x i8> @test_vloxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 3)
@@ -2168,8 +2168,8 @@ define <vscale x 2 x i8> @test_vloxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2184,8 +2184,8 @@ define <vscale x 2 x i8> @test_vloxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 3)
@@ -2197,8 +2197,8 @@ define <vscale x 2 x i8> @test_vloxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2213,8 +2213,8 @@ define <vscale x 2 x i8> @test_vloxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 3)
@@ -2226,8 +2226,8 @@ define <vscale x 2 x i8> @test_vloxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2242,8 +2242,8 @@ define <vscale x 4 x i8> @test_vloxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 3)
@@ -2255,8 +2255,8 @@ define <vscale x 4 x i8> @test_vloxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2271,8 +2271,8 @@ define <vscale x 4 x i8> @test_vloxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 3)
@@ -2284,8 +2284,8 @@ define <vscale x 4 x i8> @test_vloxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2300,8 +2300,8 @@ define <vscale x 4 x i8> @test_vloxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 3)
@@ -2313,8 +2313,8 @@ define <vscale x 4 x i8> @test_vloxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2329,8 +2329,8 @@ define <vscale x 8 x i8> @test_vloxseg7_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 8 x i8> %index, i32 %vl, i32 3)
@@ -2342,8 +2342,8 @@ define <vscale x 8 x i8> @test_vloxseg7_mask_nxv8i8_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2358,8 +2358,8 @@ define <vscale x 8 x i8> @test_vloxseg7_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 3)
@@ -2371,8 +2371,8 @@ define <vscale x 8 x i8> @test_vloxseg7_mask_nxv8i8_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2416,8 +2416,8 @@ define <vscale x 1 x i8> @test_vloxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv1i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 3)
@@ -2429,8 +2429,8 @@ define <vscale x 1 x i8> @test_vloxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2445,8 +2445,8 @@ define <vscale x 1 x i8> @test_vloxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv1i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 3)
@@ -2458,8 +2458,8 @@ define <vscale x 1 x i8> @test_vloxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2474,8 +2474,8 @@ define <vscale x 1 x i8> @test_vloxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv1i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 3)
@@ -2487,8 +2487,8 @@ define <vscale x 1 x i8> @test_vloxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2503,8 +2503,8 @@ define <vscale x 2 x i8> @test_vloxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 3)
@@ -2516,8 +2516,8 @@ define <vscale x 2 x i8> @test_vloxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2532,8 +2532,8 @@ define <vscale x 2 x i8> @test_vloxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 3)
@@ -2545,8 +2545,8 @@ define <vscale x 2 x i8> @test_vloxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2561,8 +2561,8 @@ define <vscale x 2 x i8> @test_vloxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 3)
@@ -2574,8 +2574,8 @@ define <vscale x 2 x i8> @test_vloxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2590,8 +2590,8 @@ define <vscale x 4 x i8> @test_vloxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 3)
@@ -2603,8 +2603,8 @@ define <vscale x 4 x i8> @test_vloxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2619,8 +2619,8 @@ define <vscale x 4 x i8> @test_vloxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 3)
@@ -2632,8 +2632,8 @@ define <vscale x 4 x i8> @test_vloxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2648,8 +2648,8 @@ define <vscale x 4 x i8> @test_vloxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 3)
@@ -2661,8 +2661,8 @@ define <vscale x 4 x i8> @test_vloxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2677,8 +2677,8 @@ define <vscale x 8 x i8> @test_vloxseg8_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 8 x i8> %index, i32 %vl, i32 3)
@@ -2690,8 +2690,8 @@ define <vscale x 8 x i8> @test_vloxseg8_mask_nxv8i8_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2706,8 +2706,8 @@ define <vscale x 8 x i8> @test_vloxseg8_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 3)
@@ -2719,8 +2719,8 @@ define <vscale x 8 x i8> @test_vloxseg8_mask_nxv8i8_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2764,8 +2764,8 @@ define <vscale x 1 x i16> @test_vloxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -2777,8 +2777,8 @@ define <vscale x 1 x i16> @test_vloxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -2793,8 +2793,8 @@ define <vscale x 1 x i16> @test_vloxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -2806,8 +2806,8 @@ define <vscale x 1 x i16> @test_vloxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -2822,8 +2822,8 @@ define <vscale x 1 x i16> @test_vloxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -2835,8 +2835,8 @@ define <vscale x 1 x i16> @test_vloxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -2851,8 +2851,8 @@ define <vscale x 2 x i16> @test_vloxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -2864,8 +2864,8 @@ define <vscale x 2 x i16> @test_vloxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -2880,8 +2880,8 @@ define <vscale x 2 x i16> @test_vloxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -2893,8 +2893,8 @@ define <vscale x 2 x i16> @test_vloxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -2909,8 +2909,8 @@ define <vscale x 2 x i16> @test_vloxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -2922,8 +2922,8 @@ define <vscale x 2 x i16> @test_vloxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -2938,8 +2938,8 @@ define <vscale x 4 x i16> @test_vloxseg2_nxv4i16_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv4i16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -2951,8 +2951,8 @@ define <vscale x 4 x i16> @test_vloxseg2_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg2_mask_nxv4i16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -2967,8 +2967,8 @@ define <vscale x 4 x i16> @test_vloxseg2_nxv4i16_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv4i16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -2980,8 +2980,8 @@ define <vscale x 4 x i16> @test_vloxseg2_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg2_mask_nxv4i16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3199,8 +3199,8 @@ define <vscale x 1 x i16> @test_vloxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -3212,8 +3212,8 @@ define <vscale x 1 x i16> @test_vloxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3228,8 +3228,8 @@ define <vscale x 1 x i16> @test_vloxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -3241,8 +3241,8 @@ define <vscale x 1 x i16> @test_vloxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3257,8 +3257,8 @@ define <vscale x 1 x i16> @test_vloxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -3270,8 +3270,8 @@ define <vscale x 1 x i16> @test_vloxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3286,8 +3286,8 @@ define <vscale x 2 x i16> @test_vloxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -3299,8 +3299,8 @@ define <vscale x 2 x i16> @test_vloxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3315,8 +3315,8 @@ define <vscale x 2 x i16> @test_vloxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -3328,8 +3328,8 @@ define <vscale x 2 x i16> @test_vloxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3344,8 +3344,8 @@ define <vscale x 2 x i16> @test_vloxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -3357,8 +3357,8 @@ define <vscale x 2 x i16> @test_vloxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3373,8 +3373,8 @@ define <vscale x 4 x i16> @test_vloxseg3_nxv4i16_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv4i16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -3386,8 +3386,8 @@ define <vscale x 4 x i16> @test_vloxseg3_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg3_mask_nxv4i16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3402,8 +3402,8 @@ define <vscale x 4 x i16> @test_vloxseg3_nxv4i16_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv4i16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -3415,8 +3415,8 @@ define <vscale x 4 x i16> @test_vloxseg3_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg3_mask_nxv4i16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3489,8 +3489,8 @@ define <vscale x 8 x i16> @test_vloxseg3_nxv8i16_triscv.vector.tuple_nxv16i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv8i16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei16.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv16i8_3t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 4)
@@ -3502,8 +3502,8 @@ define <vscale x 8 x i16> @test_vloxseg3_mask_nxv8i16_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vloxseg3_mask_nxv8i16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei16.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3547,8 +3547,8 @@ define <vscale x 1 x i16> @test_vloxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -3560,8 +3560,8 @@ define <vscale x 1 x i16> @test_vloxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3576,8 +3576,8 @@ define <vscale x 1 x i16> @test_vloxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -3589,8 +3589,8 @@ define <vscale x 1 x i16> @test_vloxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3605,8 +3605,8 @@ define <vscale x 1 x i16> @test_vloxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -3618,8 +3618,8 @@ define <vscale x 1 x i16> @test_vloxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3634,8 +3634,8 @@ define <vscale x 2 x i16> @test_vloxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -3647,8 +3647,8 @@ define <vscale x 2 x i16> @test_vloxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3663,8 +3663,8 @@ define <vscale x 2 x i16> @test_vloxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -3676,8 +3676,8 @@ define <vscale x 2 x i16> @test_vloxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3692,8 +3692,8 @@ define <vscale x 2 x i16> @test_vloxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -3705,8 +3705,8 @@ define <vscale x 2 x i16> @test_vloxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3721,8 +3721,8 @@ define <vscale x 4 x i16> @test_vloxseg4_nxv4i16_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv4i16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -3734,8 +3734,8 @@ define <vscale x 4 x i16> @test_vloxseg4_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg4_mask_nxv4i16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3750,8 +3750,8 @@ define <vscale x 4 x i16> @test_vloxseg4_nxv4i16_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv4i16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -3763,8 +3763,8 @@ define <vscale x 4 x i16> @test_vloxseg4_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg4_mask_nxv4i16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3837,8 +3837,8 @@ define <vscale x 8 x i16> @test_vloxseg4_nxv8i16_triscv.vector.tuple_nxv16i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv8i16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei16.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv16i8_4t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 4)
@@ -3850,8 +3850,8 @@ define <vscale x 8 x i16> @test_vloxseg4_mask_nxv8i16_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vloxseg4_mask_nxv8i16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei16.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3895,8 +3895,8 @@ define <vscale x 1 x i16> @test_vloxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -3908,8 +3908,8 @@ define <vscale x 1 x i16> @test_vloxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3924,8 +3924,8 @@ define <vscale x 1 x i16> @test_vloxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -3937,8 +3937,8 @@ define <vscale x 1 x i16> @test_vloxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3953,8 +3953,8 @@ define <vscale x 1 x i16> @test_vloxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -3966,8 +3966,8 @@ define <vscale x 1 x i16> @test_vloxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3982,8 +3982,8 @@ define <vscale x 2 x i16> @test_vloxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -3995,8 +3995,8 @@ define <vscale x 2 x i16> @test_vloxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4011,8 +4011,8 @@ define <vscale x 2 x i16> @test_vloxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -4024,8 +4024,8 @@ define <vscale x 2 x i16> @test_vloxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4040,8 +4040,8 @@ define <vscale x 2 x i16> @test_vloxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -4053,8 +4053,8 @@ define <vscale x 2 x i16> @test_vloxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4069,8 +4069,8 @@ define <vscale x 4 x i16> @test_vloxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -4082,8 +4082,8 @@ define <vscale x 4 x i16> @test_vloxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4098,8 +4098,8 @@ define <vscale x 4 x i16> @test_vloxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -4111,8 +4111,8 @@ define <vscale x 4 x i16> @test_vloxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4127,8 +4127,8 @@ define <vscale x 4 x i16> @test_vloxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -4140,8 +4140,8 @@ define <vscale x 4 x i16> @test_vloxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4156,8 +4156,8 @@ define <vscale x 1 x i16> @test_vloxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -4169,8 +4169,8 @@ define <vscale x 1 x i16> @test_vloxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4185,8 +4185,8 @@ define <vscale x 1 x i16> @test_vloxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -4198,8 +4198,8 @@ define <vscale x 1 x i16> @test_vloxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4214,8 +4214,8 @@ define <vscale x 1 x i16> @test_vloxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -4227,8 +4227,8 @@ define <vscale x 1 x i16> @test_vloxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4243,8 +4243,8 @@ define <vscale x 2 x i16> @test_vloxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -4256,8 +4256,8 @@ define <vscale x 2 x i16> @test_vloxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4272,8 +4272,8 @@ define <vscale x 2 x i16> @test_vloxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -4285,8 +4285,8 @@ define <vscale x 2 x i16> @test_vloxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4301,8 +4301,8 @@ define <vscale x 2 x i16> @test_vloxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -4314,8 +4314,8 @@ define <vscale x 2 x i16> @test_vloxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4330,8 +4330,8 @@ define <vscale x 4 x i16> @test_vloxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -4343,8 +4343,8 @@ define <vscale x 4 x i16> @test_vloxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4359,8 +4359,8 @@ define <vscale x 4 x i16> @test_vloxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -4372,8 +4372,8 @@ define <vscale x 4 x i16> @test_vloxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4388,8 +4388,8 @@ define <vscale x 4 x i16> @test_vloxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -4401,8 +4401,8 @@ define <vscale x 4 x i16> @test_vloxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4417,8 +4417,8 @@ define <vscale x 1 x i16> @test_vloxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -4430,8 +4430,8 @@ define <vscale x 1 x i16> @test_vloxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4446,8 +4446,8 @@ define <vscale x 1 x i16> @test_vloxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -4459,8 +4459,8 @@ define <vscale x 1 x i16> @test_vloxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4475,8 +4475,8 @@ define <vscale x 1 x i16> @test_vloxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -4488,8 +4488,8 @@ define <vscale x 1 x i16> @test_vloxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4504,8 +4504,8 @@ define <vscale x 2 x i16> @test_vloxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -4517,8 +4517,8 @@ define <vscale x 2 x i16> @test_vloxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4533,8 +4533,8 @@ define <vscale x 2 x i16> @test_vloxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -4546,8 +4546,8 @@ define <vscale x 2 x i16> @test_vloxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4562,8 +4562,8 @@ define <vscale x 2 x i16> @test_vloxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -4575,8 +4575,8 @@ define <vscale x 2 x i16> @test_vloxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4591,8 +4591,8 @@ define <vscale x 4 x i16> @test_vloxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -4604,8 +4604,8 @@ define <vscale x 4 x i16> @test_vloxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4620,8 +4620,8 @@ define <vscale x 4 x i16> @test_vloxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -4633,8 +4633,8 @@ define <vscale x 4 x i16> @test_vloxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4649,8 +4649,8 @@ define <vscale x 4 x i16> @test_vloxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -4662,8 +4662,8 @@ define <vscale x 4 x i16> @test_vloxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4678,8 +4678,8 @@ define <vscale x 1 x i16> @test_vloxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -4691,8 +4691,8 @@ define <vscale x 1 x i16> @test_vloxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4707,8 +4707,8 @@ define <vscale x 1 x i16> @test_vloxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -4720,8 +4720,8 @@ define <vscale x 1 x i16> @test_vloxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4736,8 +4736,8 @@ define <vscale x 1 x i16> @test_vloxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -4749,8 +4749,8 @@ define <vscale x 1 x i16> @test_vloxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4765,8 +4765,8 @@ define <vscale x 2 x i16> @test_vloxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -4778,8 +4778,8 @@ define <vscale x 2 x i16> @test_vloxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4794,8 +4794,8 @@ define <vscale x 2 x i16> @test_vloxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -4807,8 +4807,8 @@ define <vscale x 2 x i16> @test_vloxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4823,8 +4823,8 @@ define <vscale x 2 x i16> @test_vloxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -4836,8 +4836,8 @@ define <vscale x 2 x i16> @test_vloxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4852,8 +4852,8 @@ define <vscale x 4 x i16> @test_vloxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -4865,8 +4865,8 @@ define <vscale x 4 x i16> @test_vloxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4881,8 +4881,8 @@ define <vscale x 4 x i16> @test_vloxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -4894,8 +4894,8 @@ define <vscale x 4 x i16> @test_vloxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4910,8 +4910,8 @@ define <vscale x 4 x i16> @test_vloxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -4923,8 +4923,8 @@ define <vscale x 4 x i16> @test_vloxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4939,8 +4939,8 @@ define <vscale x 1 x i32> @test_vloxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -4952,8 +4952,8 @@ define <vscale x 1 x i32> @test_vloxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -4968,8 +4968,8 @@ define <vscale x 1 x i32> @test_vloxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -4981,8 +4981,8 @@ define <vscale x 1 x i32> @test_vloxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -4997,8 +4997,8 @@ define <vscale x 1 x i32> @test_vloxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -5010,8 +5010,8 @@ define <vscale x 1 x i32> @test_vloxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5026,8 +5026,8 @@ define <vscale x 2 x i32> @test_vloxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -5039,8 +5039,8 @@ define <vscale x 2 x i32> @test_vloxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5055,8 +5055,8 @@ define <vscale x 2 x i32> @test_vloxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -5068,8 +5068,8 @@ define <vscale x 2 x i32> @test_vloxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5084,8 +5084,8 @@ define <vscale x 2 x i32> @test_vloxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -5097,8 +5097,8 @@ define <vscale x 2 x i32> @test_vloxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5287,8 +5287,8 @@ define <vscale x 1 x i32> @test_vloxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -5300,8 +5300,8 @@ define <vscale x 1 x i32> @test_vloxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5316,8 +5316,8 @@ define <vscale x 1 x i32> @test_vloxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -5329,8 +5329,8 @@ define <vscale x 1 x i32> @test_vloxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5345,8 +5345,8 @@ define <vscale x 1 x i32> @test_vloxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -5358,8 +5358,8 @@ define <vscale x 1 x i32> @test_vloxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5374,8 +5374,8 @@ define <vscale x 2 x i32> @test_vloxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -5387,8 +5387,8 @@ define <vscale x 2 x i32> @test_vloxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5403,8 +5403,8 @@ define <vscale x 2 x i32> @test_vloxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -5416,8 +5416,8 @@ define <vscale x 2 x i32> @test_vloxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5432,8 +5432,8 @@ define <vscale x 2 x i32> @test_vloxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -5445,8 +5445,8 @@ define <vscale x 2 x i32> @test_vloxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5519,8 +5519,8 @@ define <vscale x 4 x i32> @test_vloxseg3_nxv4i32_triscv.vector.tuple_nxv16i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv4i32_triscv.vector.tuple_nxv16i8_3t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei32.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv16i8_3t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 5)
@@ -5532,8 +5532,8 @@ define <vscale x 4 x i32> @test_vloxseg3_mask_nxv4i32_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vloxseg3_mask_nxv4i32_triscv.vector.tuple_nxv16i8_3t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei32.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5548,8 +5548,8 @@ define <vscale x 1 x i32> @test_vloxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -5561,8 +5561,8 @@ define <vscale x 1 x i32> @test_vloxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5577,8 +5577,8 @@ define <vscale x 1 x i32> @test_vloxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -5590,8 +5590,8 @@ define <vscale x 1 x i32> @test_vloxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5606,8 +5606,8 @@ define <vscale x 1 x i32> @test_vloxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -5619,8 +5619,8 @@ define <vscale x 1 x i32> @test_vloxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5635,8 +5635,8 @@ define <vscale x 2 x i32> @test_vloxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -5648,8 +5648,8 @@ define <vscale x 2 x i32> @test_vloxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5664,8 +5664,8 @@ define <vscale x 2 x i32> @test_vloxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -5677,8 +5677,8 @@ define <vscale x 2 x i32> @test_vloxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5693,8 +5693,8 @@ define <vscale x 2 x i32> @test_vloxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -5706,8 +5706,8 @@ define <vscale x 2 x i32> @test_vloxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5780,8 +5780,8 @@ define <vscale x 4 x i32> @test_vloxseg4_nxv4i32_triscv.vector.tuple_nxv16i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv4i32_triscv.vector.tuple_nxv16i8_4t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei32.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv16i8_4t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 5)
@@ -5793,8 +5793,8 @@ define <vscale x 4 x i32> @test_vloxseg4_mask_nxv4i32_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vloxseg4_mask_nxv4i32_triscv.vector.tuple_nxv16i8_4t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei32.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5809,8 +5809,8 @@ define <vscale x 1 x i32> @test_vloxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -5822,8 +5822,8 @@ define <vscale x 1 x i32> @test_vloxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5838,8 +5838,8 @@ define <vscale x 1 x i32> @test_vloxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -5851,8 +5851,8 @@ define <vscale x 1 x i32> @test_vloxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5867,8 +5867,8 @@ define <vscale x 1 x i32> @test_vloxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -5880,8 +5880,8 @@ define <vscale x 1 x i32> @test_vloxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5896,8 +5896,8 @@ define <vscale x 2 x i32> @test_vloxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -5909,8 +5909,8 @@ define <vscale x 2 x i32> @test_vloxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5925,8 +5925,8 @@ define <vscale x 2 x i32> @test_vloxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -5938,8 +5938,8 @@ define <vscale x 2 x i32> @test_vloxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5954,8 +5954,8 @@ define <vscale x 2 x i32> @test_vloxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -5967,8 +5967,8 @@ define <vscale x 2 x i32> @test_vloxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5983,8 +5983,8 @@ define <vscale x 1 x i32> @test_vloxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -5996,8 +5996,8 @@ define <vscale x 1 x i32> @test_vloxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6012,8 +6012,8 @@ define <vscale x 1 x i32> @test_vloxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -6025,8 +6025,8 @@ define <vscale x 1 x i32> @test_vloxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6041,8 +6041,8 @@ define <vscale x 1 x i32> @test_vloxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -6054,8 +6054,8 @@ define <vscale x 1 x i32> @test_vloxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6070,8 +6070,8 @@ define <vscale x 2 x i32> @test_vloxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -6083,8 +6083,8 @@ define <vscale x 2 x i32> @test_vloxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6099,8 +6099,8 @@ define <vscale x 2 x i32> @test_vloxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -6112,8 +6112,8 @@ define <vscale x 2 x i32> @test_vloxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6128,8 +6128,8 @@ define <vscale x 2 x i32> @test_vloxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -6141,8 +6141,8 @@ define <vscale x 2 x i32> @test_vloxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6157,8 +6157,8 @@ define <vscale x 1 x i32> @test_vloxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -6170,8 +6170,8 @@ define <vscale x 1 x i32> @test_vloxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6186,8 +6186,8 @@ define <vscale x 1 x i32> @test_vloxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -6199,8 +6199,8 @@ define <vscale x 1 x i32> @test_vloxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6215,8 +6215,8 @@ define <vscale x 1 x i32> @test_vloxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -6228,8 +6228,8 @@ define <vscale x 1 x i32> @test_vloxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6244,8 +6244,8 @@ define <vscale x 2 x i32> @test_vloxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -6257,8 +6257,8 @@ define <vscale x 2 x i32> @test_vloxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6273,8 +6273,8 @@ define <vscale x 2 x i32> @test_vloxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -6286,8 +6286,8 @@ define <vscale x 2 x i32> @test_vloxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6302,8 +6302,8 @@ define <vscale x 2 x i32> @test_vloxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -6315,8 +6315,8 @@ define <vscale x 2 x i32> @test_vloxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6331,8 +6331,8 @@ define <vscale x 1 x i32> @test_vloxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -6344,8 +6344,8 @@ define <vscale x 1 x i32> @test_vloxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6360,8 +6360,8 @@ define <vscale x 1 x i32> @test_vloxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -6373,8 +6373,8 @@ define <vscale x 1 x i32> @test_vloxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6389,8 +6389,8 @@ define <vscale x 1 x i32> @test_vloxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -6402,8 +6402,8 @@ define <vscale x 1 x i32> @test_vloxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6418,8 +6418,8 @@ define <vscale x 2 x i32> @test_vloxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -6431,8 +6431,8 @@ define <vscale x 2 x i32> @test_vloxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6447,8 +6447,8 @@ define <vscale x 2 x i32> @test_vloxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -6460,8 +6460,8 @@ define <vscale x 2 x i32> @test_vloxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6476,8 +6476,8 @@ define <vscale x 2 x i32> @test_vloxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -6489,8 +6489,8 @@ define <vscale x 2 x i32> @test_vloxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6505,8 +6505,8 @@ define <vscale x 1 x i64> @test_vloxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -6518,8 +6518,8 @@ define <vscale x 1 x i64> @test_vloxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -6534,8 +6534,8 @@ define <vscale x 1 x i64> @test_vloxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -6547,8 +6547,8 @@ define <vscale x 1 x i64> @test_vloxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -6563,8 +6563,8 @@ define <vscale x 1 x i64> @test_vloxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -6576,8 +6576,8 @@ define <vscale x 1 x i64> @test_vloxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -6766,8 +6766,8 @@ define <vscale x 1 x i64> @test_vloxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -6779,8 +6779,8 @@ define <vscale x 1 x i64> @test_vloxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -6795,8 +6795,8 @@ define <vscale x 1 x i64> @test_vloxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -6808,8 +6808,8 @@ define <vscale x 1 x i64> @test_vloxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -6824,8 +6824,8 @@ define <vscale x 1 x i64> @test_vloxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -6837,8 +6837,8 @@ define <vscale x 1 x i64> @test_vloxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -6940,8 +6940,8 @@ define <vscale x 1 x i64> @test_vloxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -6953,8 +6953,8 @@ define <vscale x 1 x i64> @test_vloxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -6969,8 +6969,8 @@ define <vscale x 1 x i64> @test_vloxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -6982,8 +6982,8 @@ define <vscale x 1 x i64> @test_vloxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -6998,8 +6998,8 @@ define <vscale x 1 x i64> @test_vloxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -7011,8 +7011,8 @@ define <vscale x 1 x i64> @test_vloxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7114,8 +7114,8 @@ define <vscale x 1 x i64> @test_vloxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -7127,8 +7127,8 @@ define <vscale x 1 x i64> @test_vloxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7143,8 +7143,8 @@ define <vscale x 1 x i64> @test_vloxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -7156,8 +7156,8 @@ define <vscale x 1 x i64> @test_vloxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7172,8 +7172,8 @@ define <vscale x 1 x i64> @test_vloxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -7185,8 +7185,8 @@ define <vscale x 1 x i64> @test_vloxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7201,8 +7201,8 @@ define <vscale x 1 x i64> @test_vloxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -7214,8 +7214,8 @@ define <vscale x 1 x i64> @test_vloxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7230,8 +7230,8 @@ define <vscale x 1 x i64> @test_vloxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -7243,8 +7243,8 @@ define <vscale x 1 x i64> @test_vloxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7259,8 +7259,8 @@ define <vscale x 1 x i64> @test_vloxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -7272,8 +7272,8 @@ define <vscale x 1 x i64> @test_vloxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7288,8 +7288,8 @@ define <vscale x 1 x i64> @test_vloxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -7301,8 +7301,8 @@ define <vscale x 1 x i64> @test_vloxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7317,8 +7317,8 @@ define <vscale x 1 x i64> @test_vloxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -7330,8 +7330,8 @@ define <vscale x 1 x i64> @test_vloxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7346,8 +7346,8 @@ define <vscale x 1 x i64> @test_vloxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -7359,8 +7359,8 @@ define <vscale x 1 x i64> @test_vloxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7375,8 +7375,8 @@ define <vscale x 1 x i64> @test_vloxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -7388,8 +7388,8 @@ define <vscale x 1 x i64> @test_vloxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7404,8 +7404,8 @@ define <vscale x 1 x i64> @test_vloxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -7417,8 +7417,8 @@ define <vscale x 1 x i64> @test_vloxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7433,8 +7433,8 @@ define <vscale x 1 x i64> @test_vloxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -7446,8 +7446,8 @@ define <vscale x 1 x i64> @test_vloxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7460,8 +7460,8 @@ define <vscale x 1 x half> @test_vloxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_
; CHECK-LABEL: test_vloxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -7473,8 +7473,8 @@ define <vscale x 1 x half> @test_vloxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7487,8 +7487,8 @@ define <vscale x 1 x half> @test_vloxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_
; CHECK-LABEL: test_vloxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -7500,8 +7500,8 @@ define <vscale x 1 x half> @test_vloxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7514,8 +7514,8 @@ define <vscale x 1 x half> @test_vloxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_
; CHECK-LABEL: test_vloxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -7527,8 +7527,8 @@ define <vscale x 1 x half> @test_vloxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7541,8 +7541,8 @@ define <vscale x 2 x half> @test_vloxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_
; CHECK-LABEL: test_vloxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -7554,8 +7554,8 @@ define <vscale x 2 x half> @test_vloxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7568,8 +7568,8 @@ define <vscale x 2 x half> @test_vloxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_
; CHECK-LABEL: test_vloxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -7581,8 +7581,8 @@ define <vscale x 2 x half> @test_vloxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7595,8 +7595,8 @@ define <vscale x 2 x half> @test_vloxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_
; CHECK-LABEL: test_vloxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -7608,8 +7608,8 @@ define <vscale x 2 x half> @test_vloxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7622,8 +7622,8 @@ define <vscale x 4 x half> @test_vloxseg2_nxv4f16_triscv.vector.tuple_nxv8i8_2t_
; CHECK-LABEL: test_vloxseg2_nxv4f16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -7635,8 +7635,8 @@ define <vscale x 4 x half> @test_vloxseg2_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg2_mask_nxv4f16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7649,8 +7649,8 @@ define <vscale x 4 x half> @test_vloxseg2_nxv4f16_triscv.vector.tuple_nxv8i8_2t_
; CHECK-LABEL: test_vloxseg2_nxv4f16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -7662,8 +7662,8 @@ define <vscale x 4 x half> @test_vloxseg2_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg2_mask_nxv4f16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7865,8 +7865,8 @@ define <vscale x 1 x half> @test_vloxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -7878,8 +7878,8 @@ define <vscale x 1 x half> @test_vloxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7892,8 +7892,8 @@ define <vscale x 1 x half> @test_vloxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -7905,8 +7905,8 @@ define <vscale x 1 x half> @test_vloxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7919,8 +7919,8 @@ define <vscale x 1 x half> @test_vloxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -7932,8 +7932,8 @@ define <vscale x 1 x half> @test_vloxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7946,8 +7946,8 @@ define <vscale x 2 x half> @test_vloxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -7959,8 +7959,8 @@ define <vscale x 2 x half> @test_vloxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7973,8 +7973,8 @@ define <vscale x 2 x half> @test_vloxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -7986,8 +7986,8 @@ define <vscale x 2 x half> @test_vloxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8000,8 +8000,8 @@ define <vscale x 2 x half> @test_vloxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -8013,8 +8013,8 @@ define <vscale x 2 x half> @test_vloxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8027,8 +8027,8 @@ define <vscale x 4 x half> @test_vloxseg3_nxv4f16_triscv.vector.tuple_nxv8i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv4f16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -8040,8 +8040,8 @@ define <vscale x 4 x half> @test_vloxseg3_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg3_mask_nxv4f16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8054,8 +8054,8 @@ define <vscale x 4 x half> @test_vloxseg3_nxv4f16_triscv.vector.tuple_nxv8i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv4f16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -8067,8 +8067,8 @@ define <vscale x 4 x half> @test_vloxseg3_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg3_mask_nxv4f16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8135,8 +8135,8 @@ define <vscale x 8 x half> @test_vloxseg3_nxv8f16_triscv.vector.tuple_nxv16i8_3t
; CHECK-LABEL: test_vloxseg3_nxv8f16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei16.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv16i8_3t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 4)
@@ -8148,8 +8148,8 @@ define <vscale x 8 x half> @test_vloxseg3_mask_nxv8f16_triscv.vector.tuple_nxv16
; CHECK-LABEL: test_vloxseg3_mask_nxv8f16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei16.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8189,8 +8189,8 @@ define <vscale x 1 x half> @test_vloxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -8202,8 +8202,8 @@ define <vscale x 1 x half> @test_vloxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8216,8 +8216,8 @@ define <vscale x 1 x half> @test_vloxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -8229,8 +8229,8 @@ define <vscale x 1 x half> @test_vloxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8243,8 +8243,8 @@ define <vscale x 1 x half> @test_vloxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -8256,8 +8256,8 @@ define <vscale x 1 x half> @test_vloxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8270,8 +8270,8 @@ define <vscale x 2 x half> @test_vloxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -8283,8 +8283,8 @@ define <vscale x 2 x half> @test_vloxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8297,8 +8297,8 @@ define <vscale x 2 x half> @test_vloxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -8310,8 +8310,8 @@ define <vscale x 2 x half> @test_vloxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8324,8 +8324,8 @@ define <vscale x 2 x half> @test_vloxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -8337,8 +8337,8 @@ define <vscale x 2 x half> @test_vloxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8351,8 +8351,8 @@ define <vscale x 4 x half> @test_vloxseg4_nxv4f16_triscv.vector.tuple_nxv8i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv4f16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -8364,8 +8364,8 @@ define <vscale x 4 x half> @test_vloxseg4_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg4_mask_nxv4f16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8378,8 +8378,8 @@ define <vscale x 4 x half> @test_vloxseg4_nxv4f16_triscv.vector.tuple_nxv8i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv4f16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -8391,8 +8391,8 @@ define <vscale x 4 x half> @test_vloxseg4_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg4_mask_nxv4f16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8459,8 +8459,8 @@ define <vscale x 8 x half> @test_vloxseg4_nxv8f16_triscv.vector.tuple_nxv16i8_4t
; CHECK-LABEL: test_vloxseg4_nxv8f16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei16.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv16i8_4t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 4)
@@ -8472,8 +8472,8 @@ define <vscale x 8 x half> @test_vloxseg4_mask_nxv8f16_triscv.vector.tuple_nxv16
; CHECK-LABEL: test_vloxseg4_mask_nxv8f16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei16.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8513,8 +8513,8 @@ define <vscale x 1 x half> @test_vloxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -8526,8 +8526,8 @@ define <vscale x 1 x half> @test_vloxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8540,8 +8540,8 @@ define <vscale x 1 x half> @test_vloxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -8553,8 +8553,8 @@ define <vscale x 1 x half> @test_vloxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8567,8 +8567,8 @@ define <vscale x 1 x half> @test_vloxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -8580,8 +8580,8 @@ define <vscale x 1 x half> @test_vloxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8594,8 +8594,8 @@ define <vscale x 2 x half> @test_vloxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -8607,8 +8607,8 @@ define <vscale x 2 x half> @test_vloxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8621,8 +8621,8 @@ define <vscale x 2 x half> @test_vloxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -8634,8 +8634,8 @@ define <vscale x 2 x half> @test_vloxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8648,8 +8648,8 @@ define <vscale x 2 x half> @test_vloxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -8661,8 +8661,8 @@ define <vscale x 2 x half> @test_vloxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8675,8 +8675,8 @@ define <vscale x 4 x half> @test_vloxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -8688,8 +8688,8 @@ define <vscale x 4 x half> @test_vloxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8702,8 +8702,8 @@ define <vscale x 4 x half> @test_vloxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -8715,8 +8715,8 @@ define <vscale x 4 x half> @test_vloxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8729,8 +8729,8 @@ define <vscale x 4 x half> @test_vloxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -8742,8 +8742,8 @@ define <vscale x 4 x half> @test_vloxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8756,8 +8756,8 @@ define <vscale x 1 x half> @test_vloxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -8769,8 +8769,8 @@ define <vscale x 1 x half> @test_vloxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8783,8 +8783,8 @@ define <vscale x 1 x half> @test_vloxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -8796,8 +8796,8 @@ define <vscale x 1 x half> @test_vloxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8810,8 +8810,8 @@ define <vscale x 1 x half> @test_vloxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -8823,8 +8823,8 @@ define <vscale x 1 x half> @test_vloxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8837,8 +8837,8 @@ define <vscale x 2 x half> @test_vloxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -8850,8 +8850,8 @@ define <vscale x 2 x half> @test_vloxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8864,8 +8864,8 @@ define <vscale x 2 x half> @test_vloxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -8877,8 +8877,8 @@ define <vscale x 2 x half> @test_vloxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8891,8 +8891,8 @@ define <vscale x 2 x half> @test_vloxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -8904,8 +8904,8 @@ define <vscale x 2 x half> @test_vloxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8918,8 +8918,8 @@ define <vscale x 4 x half> @test_vloxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -8931,8 +8931,8 @@ define <vscale x 4 x half> @test_vloxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8945,8 +8945,8 @@ define <vscale x 4 x half> @test_vloxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -8958,8 +8958,8 @@ define <vscale x 4 x half> @test_vloxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8972,8 +8972,8 @@ define <vscale x 4 x half> @test_vloxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -8985,8 +8985,8 @@ define <vscale x 4 x half> @test_vloxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8999,8 +8999,8 @@ define <vscale x 1 x half> @test_vloxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -9012,8 +9012,8 @@ define <vscale x 1 x half> @test_vloxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9026,8 +9026,8 @@ define <vscale x 1 x half> @test_vloxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -9039,8 +9039,8 @@ define <vscale x 1 x half> @test_vloxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9053,8 +9053,8 @@ define <vscale x 1 x half> @test_vloxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -9066,8 +9066,8 @@ define <vscale x 1 x half> @test_vloxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9080,8 +9080,8 @@ define <vscale x 2 x half> @test_vloxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -9093,8 +9093,8 @@ define <vscale x 2 x half> @test_vloxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9107,8 +9107,8 @@ define <vscale x 2 x half> @test_vloxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -9120,8 +9120,8 @@ define <vscale x 2 x half> @test_vloxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9134,8 +9134,8 @@ define <vscale x 2 x half> @test_vloxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -9147,8 +9147,8 @@ define <vscale x 2 x half> @test_vloxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9161,8 +9161,8 @@ define <vscale x 4 x half> @test_vloxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -9174,8 +9174,8 @@ define <vscale x 4 x half> @test_vloxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9188,8 +9188,8 @@ define <vscale x 4 x half> @test_vloxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -9201,8 +9201,8 @@ define <vscale x 4 x half> @test_vloxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9215,8 +9215,8 @@ define <vscale x 4 x half> @test_vloxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -9228,8 +9228,8 @@ define <vscale x 4 x half> @test_vloxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9242,8 +9242,8 @@ define <vscale x 1 x half> @test_vloxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -9255,8 +9255,8 @@ define <vscale x 1 x half> @test_vloxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9269,8 +9269,8 @@ define <vscale x 1 x half> @test_vloxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -9282,8 +9282,8 @@ define <vscale x 1 x half> @test_vloxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9296,8 +9296,8 @@ define <vscale x 1 x half> @test_vloxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -9309,8 +9309,8 @@ define <vscale x 1 x half> @test_vloxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9323,8 +9323,8 @@ define <vscale x 2 x half> @test_vloxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -9336,8 +9336,8 @@ define <vscale x 2 x half> @test_vloxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9350,8 +9350,8 @@ define <vscale x 2 x half> @test_vloxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -9363,8 +9363,8 @@ define <vscale x 2 x half> @test_vloxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9377,8 +9377,8 @@ define <vscale x 2 x half> @test_vloxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -9390,8 +9390,8 @@ define <vscale x 2 x half> @test_vloxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9404,8 +9404,8 @@ define <vscale x 4 x half> @test_vloxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -9417,8 +9417,8 @@ define <vscale x 4 x half> @test_vloxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9431,8 +9431,8 @@ define <vscale x 4 x half> @test_vloxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -9444,8 +9444,8 @@ define <vscale x 4 x half> @test_vloxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9458,8 +9458,8 @@ define <vscale x 4 x half> @test_vloxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -9471,8 +9471,8 @@ define <vscale x 4 x half> @test_vloxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9485,8 +9485,8 @@ define <vscale x 1 x float> @test_vloxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t
; CHECK-LABEL: test_vloxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -9498,8 +9498,8 @@ define <vscale x 1 x float> @test_vloxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9512,8 +9512,8 @@ define <vscale x 1 x float> @test_vloxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t
; CHECK-LABEL: test_vloxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -9525,8 +9525,8 @@ define <vscale x 1 x float> @test_vloxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9539,8 +9539,8 @@ define <vscale x 1 x float> @test_vloxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t
; CHECK-LABEL: test_vloxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -9552,8 +9552,8 @@ define <vscale x 1 x float> @test_vloxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9566,8 +9566,8 @@ define <vscale x 2 x float> @test_vloxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t
; CHECK-LABEL: test_vloxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -9579,8 +9579,8 @@ define <vscale x 2 x float> @test_vloxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9593,8 +9593,8 @@ define <vscale x 2 x float> @test_vloxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t
; CHECK-LABEL: test_vloxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -9606,8 +9606,8 @@ define <vscale x 2 x float> @test_vloxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9620,8 +9620,8 @@ define <vscale x 2 x float> @test_vloxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t
; CHECK-LABEL: test_vloxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -9633,8 +9633,8 @@ define <vscale x 2 x float> @test_vloxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9809,8 +9809,8 @@ define <vscale x 1 x float> @test_vloxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t
; CHECK-LABEL: test_vloxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -9822,8 +9822,8 @@ define <vscale x 1 x float> @test_vloxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9836,8 +9836,8 @@ define <vscale x 1 x float> @test_vloxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t
; CHECK-LABEL: test_vloxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -9849,8 +9849,8 @@ define <vscale x 1 x float> @test_vloxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9863,8 +9863,8 @@ define <vscale x 1 x float> @test_vloxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t
; CHECK-LABEL: test_vloxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -9876,8 +9876,8 @@ define <vscale x 1 x float> @test_vloxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9890,8 +9890,8 @@ define <vscale x 2 x float> @test_vloxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t
; CHECK-LABEL: test_vloxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -9903,8 +9903,8 @@ define <vscale x 2 x float> @test_vloxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9917,8 +9917,8 @@ define <vscale x 2 x float> @test_vloxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t
; CHECK-LABEL: test_vloxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -9930,8 +9930,8 @@ define <vscale x 2 x float> @test_vloxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9944,8 +9944,8 @@ define <vscale x 2 x float> @test_vloxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t
; CHECK-LABEL: test_vloxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -9957,8 +9957,8 @@ define <vscale x 2 x float> @test_vloxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10025,8 +10025,8 @@ define <vscale x 4 x float> @test_vloxseg3_nxv4f32_triscv.vector.tuple_nxv16i8_3
; CHECK-LABEL: test_vloxseg3_nxv4f32_triscv.vector.tuple_nxv16i8_3t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei32.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv16i8_3t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 5)
@@ -10038,8 +10038,8 @@ define <vscale x 4 x float> @test_vloxseg3_mask_nxv4f32_triscv.vector.tuple_nxv1
; CHECK-LABEL: test_vloxseg3_mask_nxv4f32_triscv.vector.tuple_nxv16i8_3t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei32.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10052,8 +10052,8 @@ define <vscale x 1 x float> @test_vloxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t
; CHECK-LABEL: test_vloxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -10065,8 +10065,8 @@ define <vscale x 1 x float> @test_vloxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10079,8 +10079,8 @@ define <vscale x 1 x float> @test_vloxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t
; CHECK-LABEL: test_vloxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -10092,8 +10092,8 @@ define <vscale x 1 x float> @test_vloxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10106,8 +10106,8 @@ define <vscale x 1 x float> @test_vloxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t
; CHECK-LABEL: test_vloxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -10119,8 +10119,8 @@ define <vscale x 1 x float> @test_vloxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10133,8 +10133,8 @@ define <vscale x 2 x float> @test_vloxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t
; CHECK-LABEL: test_vloxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -10146,8 +10146,8 @@ define <vscale x 2 x float> @test_vloxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10160,8 +10160,8 @@ define <vscale x 2 x float> @test_vloxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t
; CHECK-LABEL: test_vloxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -10173,8 +10173,8 @@ define <vscale x 2 x float> @test_vloxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10187,8 +10187,8 @@ define <vscale x 2 x float> @test_vloxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t
; CHECK-LABEL: test_vloxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -10200,8 +10200,8 @@ define <vscale x 2 x float> @test_vloxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10268,8 +10268,8 @@ define <vscale x 4 x float> @test_vloxseg4_nxv4f32_triscv.vector.tuple_nxv16i8_4
; CHECK-LABEL: test_vloxseg4_nxv4f32_triscv.vector.tuple_nxv16i8_4t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei32.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv16i8_4t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 5)
@@ -10281,8 +10281,8 @@ define <vscale x 4 x float> @test_vloxseg4_mask_nxv4f32_triscv.vector.tuple_nxv1
; CHECK-LABEL: test_vloxseg4_mask_nxv4f32_triscv.vector.tuple_nxv16i8_4t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei32.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10295,8 +10295,8 @@ define <vscale x 1 x float> @test_vloxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t
; CHECK-LABEL: test_vloxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -10308,8 +10308,8 @@ define <vscale x 1 x float> @test_vloxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10322,8 +10322,8 @@ define <vscale x 1 x float> @test_vloxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t
; CHECK-LABEL: test_vloxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -10335,8 +10335,8 @@ define <vscale x 1 x float> @test_vloxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10349,8 +10349,8 @@ define <vscale x 1 x float> @test_vloxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t
; CHECK-LABEL: test_vloxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -10362,8 +10362,8 @@ define <vscale x 1 x float> @test_vloxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10376,8 +10376,8 @@ define <vscale x 2 x float> @test_vloxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t
; CHECK-LABEL: test_vloxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -10389,8 +10389,8 @@ define <vscale x 2 x float> @test_vloxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10403,8 +10403,8 @@ define <vscale x 2 x float> @test_vloxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t
; CHECK-LABEL: test_vloxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -10416,8 +10416,8 @@ define <vscale x 2 x float> @test_vloxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10430,8 +10430,8 @@ define <vscale x 2 x float> @test_vloxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t
; CHECK-LABEL: test_vloxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -10443,8 +10443,8 @@ define <vscale x 2 x float> @test_vloxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10457,8 +10457,8 @@ define <vscale x 1 x float> @test_vloxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t
; CHECK-LABEL: test_vloxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -10470,8 +10470,8 @@ define <vscale x 1 x float> @test_vloxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10484,8 +10484,8 @@ define <vscale x 1 x float> @test_vloxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t
; CHECK-LABEL: test_vloxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -10497,8 +10497,8 @@ define <vscale x 1 x float> @test_vloxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10511,8 +10511,8 @@ define <vscale x 1 x float> @test_vloxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t
; CHECK-LABEL: test_vloxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -10524,8 +10524,8 @@ define <vscale x 1 x float> @test_vloxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10538,8 +10538,8 @@ define <vscale x 2 x float> @test_vloxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t
; CHECK-LABEL: test_vloxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -10551,8 +10551,8 @@ define <vscale x 2 x float> @test_vloxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10565,8 +10565,8 @@ define <vscale x 2 x float> @test_vloxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t
; CHECK-LABEL: test_vloxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -10578,8 +10578,8 @@ define <vscale x 2 x float> @test_vloxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10592,8 +10592,8 @@ define <vscale x 2 x float> @test_vloxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t
; CHECK-LABEL: test_vloxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -10605,8 +10605,8 @@ define <vscale x 2 x float> @test_vloxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10619,8 +10619,8 @@ define <vscale x 1 x float> @test_vloxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t
; CHECK-LABEL: test_vloxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -10632,8 +10632,8 @@ define <vscale x 1 x float> @test_vloxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10646,8 +10646,8 @@ define <vscale x 1 x float> @test_vloxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t
; CHECK-LABEL: test_vloxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -10659,8 +10659,8 @@ define <vscale x 1 x float> @test_vloxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10673,8 +10673,8 @@ define <vscale x 1 x float> @test_vloxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t
; CHECK-LABEL: test_vloxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -10686,8 +10686,8 @@ define <vscale x 1 x float> @test_vloxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10700,8 +10700,8 @@ define <vscale x 2 x float> @test_vloxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t
; CHECK-LABEL: test_vloxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -10713,8 +10713,8 @@ define <vscale x 2 x float> @test_vloxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10727,8 +10727,8 @@ define <vscale x 2 x float> @test_vloxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t
; CHECK-LABEL: test_vloxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -10740,8 +10740,8 @@ define <vscale x 2 x float> @test_vloxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10754,8 +10754,8 @@ define <vscale x 2 x float> @test_vloxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t
; CHECK-LABEL: test_vloxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -10767,8 +10767,8 @@ define <vscale x 2 x float> @test_vloxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10781,8 +10781,8 @@ define <vscale x 1 x float> @test_vloxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t
; CHECK-LABEL: test_vloxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -10794,8 +10794,8 @@ define <vscale x 1 x float> @test_vloxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10808,8 +10808,8 @@ define <vscale x 1 x float> @test_vloxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t
; CHECK-LABEL: test_vloxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -10821,8 +10821,8 @@ define <vscale x 1 x float> @test_vloxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10835,8 +10835,8 @@ define <vscale x 1 x float> @test_vloxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t
; CHECK-LABEL: test_vloxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -10848,8 +10848,8 @@ define <vscale x 1 x float> @test_vloxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10862,8 +10862,8 @@ define <vscale x 2 x float> @test_vloxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t
; CHECK-LABEL: test_vloxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -10875,8 +10875,8 @@ define <vscale x 2 x float> @test_vloxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10889,8 +10889,8 @@ define <vscale x 2 x float> @test_vloxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t
; CHECK-LABEL: test_vloxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -10902,8 +10902,8 @@ define <vscale x 2 x float> @test_vloxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10916,8 +10916,8 @@ define <vscale x 2 x float> @test_vloxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t
; CHECK-LABEL: test_vloxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -10929,8 +10929,8 @@ define <vscale x 2 x float> @test_vloxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10943,8 +10943,8 @@ define <vscale x 1 x double> @test_vloxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2
; CHECK-LABEL: test_vloxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -10956,8 +10956,8 @@ define <vscale x 1 x double> @test_vloxseg2_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg2_mask_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -10970,8 +10970,8 @@ define <vscale x 1 x double> @test_vloxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2
; CHECK-LABEL: test_vloxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -10983,8 +10983,8 @@ define <vscale x 1 x double> @test_vloxseg2_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg2_mask_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -10997,8 +10997,8 @@ define <vscale x 1 x double> @test_vloxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2
; CHECK-LABEL: test_vloxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -11010,8 +11010,8 @@ define <vscale x 1 x double> @test_vloxseg2_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg2_mask_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11186,8 +11186,8 @@ define <vscale x 1 x double> @test_vloxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3
; CHECK-LABEL: test_vloxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -11199,8 +11199,8 @@ define <vscale x 1 x double> @test_vloxseg3_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg3_mask_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11213,8 +11213,8 @@ define <vscale x 1 x double> @test_vloxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3
; CHECK-LABEL: test_vloxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -11226,8 +11226,8 @@ define <vscale x 1 x double> @test_vloxseg3_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg3_mask_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11240,8 +11240,8 @@ define <vscale x 1 x double> @test_vloxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3
; CHECK-LABEL: test_vloxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -11253,8 +11253,8 @@ define <vscale x 1 x double> @test_vloxseg3_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg3_mask_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11348,8 +11348,8 @@ define <vscale x 1 x double> @test_vloxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4
; CHECK-LABEL: test_vloxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -11361,8 +11361,8 @@ define <vscale x 1 x double> @test_vloxseg4_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg4_mask_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11375,8 +11375,8 @@ define <vscale x 1 x double> @test_vloxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4
; CHECK-LABEL: test_vloxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -11388,8 +11388,8 @@ define <vscale x 1 x double> @test_vloxseg4_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg4_mask_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11402,8 +11402,8 @@ define <vscale x 1 x double> @test_vloxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4
; CHECK-LABEL: test_vloxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -11415,8 +11415,8 @@ define <vscale x 1 x double> @test_vloxseg4_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg4_mask_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11510,8 +11510,8 @@ define <vscale x 1 x double> @test_vloxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vloxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -11523,8 +11523,8 @@ define <vscale x 1 x double> @test_vloxseg5_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg5_mask_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11537,8 +11537,8 @@ define <vscale x 1 x double> @test_vloxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vloxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -11550,8 +11550,8 @@ define <vscale x 1 x double> @test_vloxseg5_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg5_mask_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11564,8 +11564,8 @@ define <vscale x 1 x double> @test_vloxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vloxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -11577,8 +11577,8 @@ define <vscale x 1 x double> @test_vloxseg5_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg5_mask_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11591,8 +11591,8 @@ define <vscale x 1 x double> @test_vloxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vloxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -11604,8 +11604,8 @@ define <vscale x 1 x double> @test_vloxseg6_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg6_mask_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11618,8 +11618,8 @@ define <vscale x 1 x double> @test_vloxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vloxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -11631,8 +11631,8 @@ define <vscale x 1 x double> @test_vloxseg6_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg6_mask_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11645,8 +11645,8 @@ define <vscale x 1 x double> @test_vloxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vloxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -11658,8 +11658,8 @@ define <vscale x 1 x double> @test_vloxseg6_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg6_mask_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11672,8 +11672,8 @@ define <vscale x 1 x double> @test_vloxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vloxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -11685,8 +11685,8 @@ define <vscale x 1 x double> @test_vloxseg7_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg7_mask_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11699,8 +11699,8 @@ define <vscale x 1 x double> @test_vloxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vloxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -11712,8 +11712,8 @@ define <vscale x 1 x double> @test_vloxseg7_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg7_mask_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11726,8 +11726,8 @@ define <vscale x 1 x double> @test_vloxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vloxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -11739,8 +11739,8 @@ define <vscale x 1 x double> @test_vloxseg7_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg7_mask_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11753,8 +11753,8 @@ define <vscale x 1 x double> @test_vloxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vloxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -11766,8 +11766,8 @@ define <vscale x 1 x double> @test_vloxseg8_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg8_mask_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11780,8 +11780,8 @@ define <vscale x 1 x double> @test_vloxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vloxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -11793,8 +11793,8 @@ define <vscale x 1 x double> @test_vloxseg8_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg8_mask_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11807,8 +11807,8 @@ define <vscale x 1 x double> @test_vloxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vloxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -11820,8 +11820,8 @@ define <vscale x 1 x double> @test_vloxseg8_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg8_mask_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11834,8 +11834,8 @@ define <vscale x 1 x bfloat> @test_vloxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -11847,8 +11847,8 @@ define <vscale x 1 x bfloat> @test_vloxseg2_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg2_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -11861,8 +11861,8 @@ define <vscale x 1 x bfloat> @test_vloxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -11874,8 +11874,8 @@ define <vscale x 1 x bfloat> @test_vloxseg2_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg2_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -11888,8 +11888,8 @@ define <vscale x 1 x bfloat> @test_vloxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -11901,8 +11901,8 @@ define <vscale x 1 x bfloat> @test_vloxseg2_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg2_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -11915,8 +11915,8 @@ define <vscale x 2 x bfloat> @test_vloxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -11928,8 +11928,8 @@ define <vscale x 2 x bfloat> @test_vloxseg2_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg2_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -11942,8 +11942,8 @@ define <vscale x 2 x bfloat> @test_vloxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -11955,8 +11955,8 @@ define <vscale x 2 x bfloat> @test_vloxseg2_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg2_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -11969,8 +11969,8 @@ define <vscale x 2 x bfloat> @test_vloxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -11982,8 +11982,8 @@ define <vscale x 2 x bfloat> @test_vloxseg2_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg2_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -11996,8 +11996,8 @@ define <vscale x 4 x bfloat> @test_vloxseg2_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg2_nxv4bf16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -12009,8 +12009,8 @@ define <vscale x 4 x bfloat> @test_vloxseg2_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg2_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12023,8 +12023,8 @@ define <vscale x 4 x bfloat> @test_vloxseg2_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg2_nxv4bf16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -12036,8 +12036,8 @@ define <vscale x 4 x bfloat> @test_vloxseg2_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg2_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12239,8 +12239,8 @@ define <vscale x 1 x bfloat> @test_vloxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -12252,8 +12252,8 @@ define <vscale x 1 x bfloat> @test_vloxseg3_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg3_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12266,8 +12266,8 @@ define <vscale x 1 x bfloat> @test_vloxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -12279,8 +12279,8 @@ define <vscale x 1 x bfloat> @test_vloxseg3_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg3_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12293,8 +12293,8 @@ define <vscale x 1 x bfloat> @test_vloxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -12306,8 +12306,8 @@ define <vscale x 1 x bfloat> @test_vloxseg3_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg3_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12320,8 +12320,8 @@ define <vscale x 2 x bfloat> @test_vloxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -12333,8 +12333,8 @@ define <vscale x 2 x bfloat> @test_vloxseg3_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg3_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12347,8 +12347,8 @@ define <vscale x 2 x bfloat> @test_vloxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -12360,8 +12360,8 @@ define <vscale x 2 x bfloat> @test_vloxseg3_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg3_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12374,8 +12374,8 @@ define <vscale x 2 x bfloat> @test_vloxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -12387,8 +12387,8 @@ define <vscale x 2 x bfloat> @test_vloxseg3_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg3_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12401,8 +12401,8 @@ define <vscale x 4 x bfloat> @test_vloxseg3_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg3_nxv4bf16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -12414,8 +12414,8 @@ define <vscale x 4 x bfloat> @test_vloxseg3_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg3_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12428,8 +12428,8 @@ define <vscale x 4 x bfloat> @test_vloxseg3_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg3_nxv4bf16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -12441,8 +12441,8 @@ define <vscale x 4 x bfloat> @test_vloxseg3_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg3_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12509,8 +12509,8 @@ define <vscale x 8 x bfloat> @test_vloxseg3_nxv8bf16_triscv.vector.tuple_nxv16i8
; CHECK-LABEL: test_vloxseg3_nxv8bf16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei16.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv16i8_3t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 4)
@@ -12522,8 +12522,8 @@ define <vscale x 8 x bfloat> @test_vloxseg3_mask_nxv8bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg3_mask_nxv8bf16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei16.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12563,8 +12563,8 @@ define <vscale x 1 x bfloat> @test_vloxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -12576,8 +12576,8 @@ define <vscale x 1 x bfloat> @test_vloxseg4_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg4_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12590,8 +12590,8 @@ define <vscale x 1 x bfloat> @test_vloxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -12603,8 +12603,8 @@ define <vscale x 1 x bfloat> @test_vloxseg4_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg4_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12617,8 +12617,8 @@ define <vscale x 1 x bfloat> @test_vloxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -12630,8 +12630,8 @@ define <vscale x 1 x bfloat> @test_vloxseg4_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg4_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12644,8 +12644,8 @@ define <vscale x 2 x bfloat> @test_vloxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -12657,8 +12657,8 @@ define <vscale x 2 x bfloat> @test_vloxseg4_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg4_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12671,8 +12671,8 @@ define <vscale x 2 x bfloat> @test_vloxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -12684,8 +12684,8 @@ define <vscale x 2 x bfloat> @test_vloxseg4_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg4_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12698,8 +12698,8 @@ define <vscale x 2 x bfloat> @test_vloxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -12711,8 +12711,8 @@ define <vscale x 2 x bfloat> @test_vloxseg4_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg4_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12725,8 +12725,8 @@ define <vscale x 4 x bfloat> @test_vloxseg4_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg4_nxv4bf16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -12738,8 +12738,8 @@ define <vscale x 4 x bfloat> @test_vloxseg4_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg4_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12752,8 +12752,8 @@ define <vscale x 4 x bfloat> @test_vloxseg4_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg4_nxv4bf16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -12765,8 +12765,8 @@ define <vscale x 4 x bfloat> @test_vloxseg4_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg4_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12833,8 +12833,8 @@ define <vscale x 8 x bfloat> @test_vloxseg4_nxv8bf16_triscv.vector.tuple_nxv16i8
; CHECK-LABEL: test_vloxseg4_nxv8bf16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei16.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv16i8_4t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 4)
@@ -12846,8 +12846,8 @@ define <vscale x 8 x bfloat> @test_vloxseg4_mask_nxv8bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg4_mask_nxv8bf16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei16.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12887,8 +12887,8 @@ define <vscale x 1 x bfloat> @test_vloxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -12900,8 +12900,8 @@ define <vscale x 1 x bfloat> @test_vloxseg5_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12914,8 +12914,8 @@ define <vscale x 1 x bfloat> @test_vloxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -12927,8 +12927,8 @@ define <vscale x 1 x bfloat> @test_vloxseg5_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12941,8 +12941,8 @@ define <vscale x 1 x bfloat> @test_vloxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -12954,8 +12954,8 @@ define <vscale x 1 x bfloat> @test_vloxseg5_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12968,8 +12968,8 @@ define <vscale x 2 x bfloat> @test_vloxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -12981,8 +12981,8 @@ define <vscale x 2 x bfloat> @test_vloxseg5_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12995,8 +12995,8 @@ define <vscale x 2 x bfloat> @test_vloxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -13008,8 +13008,8 @@ define <vscale x 2 x bfloat> @test_vloxseg5_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13022,8 +13022,8 @@ define <vscale x 2 x bfloat> @test_vloxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -13035,8 +13035,8 @@ define <vscale x 2 x bfloat> @test_vloxseg5_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13049,8 +13049,8 @@ define <vscale x 4 x bfloat> @test_vloxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -13062,8 +13062,8 @@ define <vscale x 4 x bfloat> @test_vloxseg5_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13076,8 +13076,8 @@ define <vscale x 4 x bfloat> @test_vloxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -13089,8 +13089,8 @@ define <vscale x 4 x bfloat> @test_vloxseg5_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13103,8 +13103,8 @@ define <vscale x 4 x bfloat> @test_vloxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -13116,8 +13116,8 @@ define <vscale x 4 x bfloat> @test_vloxseg5_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13130,8 +13130,8 @@ define <vscale x 1 x bfloat> @test_vloxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -13143,8 +13143,8 @@ define <vscale x 1 x bfloat> @test_vloxseg6_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13157,8 +13157,8 @@ define <vscale x 1 x bfloat> @test_vloxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -13170,8 +13170,8 @@ define <vscale x 1 x bfloat> @test_vloxseg6_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13184,8 +13184,8 @@ define <vscale x 1 x bfloat> @test_vloxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -13197,8 +13197,8 @@ define <vscale x 1 x bfloat> @test_vloxseg6_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13211,8 +13211,8 @@ define <vscale x 2 x bfloat> @test_vloxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -13224,8 +13224,8 @@ define <vscale x 2 x bfloat> @test_vloxseg6_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13238,8 +13238,8 @@ define <vscale x 2 x bfloat> @test_vloxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -13251,8 +13251,8 @@ define <vscale x 2 x bfloat> @test_vloxseg6_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13265,8 +13265,8 @@ define <vscale x 2 x bfloat> @test_vloxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -13278,8 +13278,8 @@ define <vscale x 2 x bfloat> @test_vloxseg6_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13292,8 +13292,8 @@ define <vscale x 4 x bfloat> @test_vloxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -13305,8 +13305,8 @@ define <vscale x 4 x bfloat> @test_vloxseg6_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13319,8 +13319,8 @@ define <vscale x 4 x bfloat> @test_vloxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -13332,8 +13332,8 @@ define <vscale x 4 x bfloat> @test_vloxseg6_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13346,8 +13346,8 @@ define <vscale x 4 x bfloat> @test_vloxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -13359,8 +13359,8 @@ define <vscale x 4 x bfloat> @test_vloxseg6_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13373,8 +13373,8 @@ define <vscale x 1 x bfloat> @test_vloxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -13386,8 +13386,8 @@ define <vscale x 1 x bfloat> @test_vloxseg7_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13400,8 +13400,8 @@ define <vscale x 1 x bfloat> @test_vloxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -13413,8 +13413,8 @@ define <vscale x 1 x bfloat> @test_vloxseg7_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13427,8 +13427,8 @@ define <vscale x 1 x bfloat> @test_vloxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -13440,8 +13440,8 @@ define <vscale x 1 x bfloat> @test_vloxseg7_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13454,8 +13454,8 @@ define <vscale x 2 x bfloat> @test_vloxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -13467,8 +13467,8 @@ define <vscale x 2 x bfloat> @test_vloxseg7_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13481,8 +13481,8 @@ define <vscale x 2 x bfloat> @test_vloxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -13494,8 +13494,8 @@ define <vscale x 2 x bfloat> @test_vloxseg7_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13508,8 +13508,8 @@ define <vscale x 2 x bfloat> @test_vloxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -13521,8 +13521,8 @@ define <vscale x 2 x bfloat> @test_vloxseg7_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13535,8 +13535,8 @@ define <vscale x 4 x bfloat> @test_vloxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -13548,8 +13548,8 @@ define <vscale x 4 x bfloat> @test_vloxseg7_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13562,8 +13562,8 @@ define <vscale x 4 x bfloat> @test_vloxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -13575,8 +13575,8 @@ define <vscale x 4 x bfloat> @test_vloxseg7_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13589,8 +13589,8 @@ define <vscale x 4 x bfloat> @test_vloxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -13602,8 +13602,8 @@ define <vscale x 4 x bfloat> @test_vloxseg7_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13616,8 +13616,8 @@ define <vscale x 1 x bfloat> @test_vloxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -13629,8 +13629,8 @@ define <vscale x 1 x bfloat> @test_vloxseg8_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13643,8 +13643,8 @@ define <vscale x 1 x bfloat> @test_vloxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -13656,8 +13656,8 @@ define <vscale x 1 x bfloat> @test_vloxseg8_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13670,8 +13670,8 @@ define <vscale x 1 x bfloat> @test_vloxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -13683,8 +13683,8 @@ define <vscale x 1 x bfloat> @test_vloxseg8_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13697,8 +13697,8 @@ define <vscale x 2 x bfloat> @test_vloxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -13710,8 +13710,8 @@ define <vscale x 2 x bfloat> @test_vloxseg8_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13724,8 +13724,8 @@ define <vscale x 2 x bfloat> @test_vloxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -13737,8 +13737,8 @@ define <vscale x 2 x bfloat> @test_vloxseg8_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13751,8 +13751,8 @@ define <vscale x 2 x bfloat> @test_vloxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -13764,8 +13764,8 @@ define <vscale x 2 x bfloat> @test_vloxseg8_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13778,8 +13778,8 @@ define <vscale x 4 x bfloat> @test_vloxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -13791,8 +13791,8 @@ define <vscale x 4 x bfloat> @test_vloxseg8_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13805,8 +13805,8 @@ define <vscale x 4 x bfloat> @test_vloxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -13818,8 +13818,8 @@ define <vscale x 4 x bfloat> @test_vloxseg8_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13832,8 +13832,8 @@ define <vscale x 4 x bfloat> @test_vloxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -13845,8 +13845,8 @@ define <vscale x 4 x bfloat> @test_vloxseg8_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
diff --git a/llvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll b/llvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll
index a45571e30e853..8f85eb5638255 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll
@@ -9,8 +9,8 @@ define <vscale x 1 x i8> @test_vloxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv
; CHECK-LABEL: test_vloxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv1i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 3)
@@ -22,8 +22,8 @@ define <vscale x 1 x i8> @test_vloxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2
; CHECK-LABEL: test_vloxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -38,8 +38,8 @@ define <vscale x 1 x i8> @test_vloxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv
; CHECK-LABEL: test_vloxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv1i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 3)
@@ -51,8 +51,8 @@ define <vscale x 1 x i8> @test_vloxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2
; CHECK-LABEL: test_vloxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -67,8 +67,8 @@ define <vscale x 1 x i8> @test_vloxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv
; CHECK-LABEL: test_vloxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv1i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 3)
@@ -80,8 +80,8 @@ define <vscale x 1 x i8> @test_vloxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2
; CHECK-LABEL: test_vloxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -96,8 +96,8 @@ define <vscale x 1 x i8> @test_vloxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv
; CHECK-LABEL: test_vloxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg2ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei64.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv1i8_2t.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 3)
@@ -109,8 +109,8 @@ define <vscale x 1 x i8> @test_vloxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2
; CHECK-LABEL: test_vloxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg2ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei64.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -125,8 +125,8 @@ define <vscale x 2 x i8> @test_vloxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv
; CHECK-LABEL: test_vloxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 3)
@@ -138,8 +138,8 @@ define <vscale x 2 x i8> @test_vloxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2
; CHECK-LABEL: test_vloxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -154,8 +154,8 @@ define <vscale x 2 x i8> @test_vloxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv
; CHECK-LABEL: test_vloxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 3)
@@ -167,8 +167,8 @@ define <vscale x 2 x i8> @test_vloxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2
; CHECK-LABEL: test_vloxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -183,8 +183,8 @@ define <vscale x 2 x i8> @test_vloxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv
; CHECK-LABEL: test_vloxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 3)
@@ -196,8 +196,8 @@ define <vscale x 2 x i8> @test_vloxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2
; CHECK-LABEL: test_vloxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -241,8 +241,8 @@ define <vscale x 4 x i8> @test_vloxseg2_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv
; CHECK-LABEL: test_vloxseg2_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 3)
@@ -254,8 +254,8 @@ define <vscale x 4 x i8> @test_vloxseg2_mask_nxv4i8_triscv.vector.tuple_nxv4i8_2
; CHECK-LABEL: test_vloxseg2_mask_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -270,8 +270,8 @@ define <vscale x 4 x i8> @test_vloxseg2_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv
; CHECK-LABEL: test_vloxseg2_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 3)
@@ -283,8 +283,8 @@ define <vscale x 4 x i8> @test_vloxseg2_mask_nxv4i8_triscv.vector.tuple_nxv4i8_2
; CHECK-LABEL: test_vloxseg2_mask_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -357,8 +357,8 @@ define <vscale x 8 x i8> @test_vloxseg2_nxv8i8_triscv.vector.tuple_nxv8i8_2t_nxv
; CHECK-LABEL: test_vloxseg2_nxv8i8_triscv.vector.tuple_nxv8i8_2t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 8 x i8> %index, i64 %vl, i64 3)
@@ -370,8 +370,8 @@ define <vscale x 8 x i8> @test_vloxseg2_mask_nxv8i8_triscv.vector.tuple_nxv8i8_2
; CHECK-LABEL: test_vloxseg2_mask_nxv8i8_triscv.vector.tuple_nxv8i8_2t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -618,8 +618,8 @@ define <vscale x 1 x i8> @test_vloxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv
; CHECK-LABEL: test_vloxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv1i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 3)
@@ -631,8 +631,8 @@ define <vscale x 1 x i8> @test_vloxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3
; CHECK-LABEL: test_vloxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv1i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -647,8 +647,8 @@ define <vscale x 1 x i8> @test_vloxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv
; CHECK-LABEL: test_vloxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv1i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 3)
@@ -660,8 +660,8 @@ define <vscale x 1 x i8> @test_vloxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3
; CHECK-LABEL: test_vloxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv1i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -676,8 +676,8 @@ define <vscale x 1 x i8> @test_vloxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv
; CHECK-LABEL: test_vloxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv1i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 3)
@@ -689,8 +689,8 @@ define <vscale x 1 x i8> @test_vloxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3
; CHECK-LABEL: test_vloxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv1i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -705,8 +705,8 @@ define <vscale x 1 x i8> @test_vloxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv
; CHECK-LABEL: test_vloxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei64.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv1i8_3t.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 3)
@@ -718,8 +718,8 @@ define <vscale x 1 x i8> @test_vloxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3
; CHECK-LABEL: test_vloxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei64.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv1i8_3t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -734,8 +734,8 @@ define <vscale x 2 x i8> @test_vloxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv
; CHECK-LABEL: test_vloxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 3)
@@ -747,8 +747,8 @@ define <vscale x 2 x i8> @test_vloxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3
; CHECK-LABEL: test_vloxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -763,8 +763,8 @@ define <vscale x 2 x i8> @test_vloxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv
; CHECK-LABEL: test_vloxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 3)
@@ -776,8 +776,8 @@ define <vscale x 2 x i8> @test_vloxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3
; CHECK-LABEL: test_vloxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -792,8 +792,8 @@ define <vscale x 2 x i8> @test_vloxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv
; CHECK-LABEL: test_vloxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 3)
@@ -805,8 +805,8 @@ define <vscale x 2 x i8> @test_vloxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3
; CHECK-LABEL: test_vloxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -850,8 +850,8 @@ define <vscale x 4 x i8> @test_vloxseg3_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv
; CHECK-LABEL: test_vloxseg3_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 3)
@@ -863,8 +863,8 @@ define <vscale x 4 x i8> @test_vloxseg3_mask_nxv4i8_triscv.vector.tuple_nxv4i8_3
; CHECK-LABEL: test_vloxseg3_mask_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -879,8 +879,8 @@ define <vscale x 4 x i8> @test_vloxseg3_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv
; CHECK-LABEL: test_vloxseg3_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 3)
@@ -892,8 +892,8 @@ define <vscale x 4 x i8> @test_vloxseg3_mask_nxv4i8_triscv.vector.tuple_nxv4i8_3
; CHECK-LABEL: test_vloxseg3_mask_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -966,8 +966,8 @@ define <vscale x 8 x i8> @test_vloxseg3_nxv8i8_triscv.vector.tuple_nxv8i8_3t_nxv
; CHECK-LABEL: test_vloxseg3_nxv8i8_triscv.vector.tuple_nxv8i8_3t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 8 x i8> %index, i64 %vl, i64 3)
@@ -979,8 +979,8 @@ define <vscale x 8 x i8> @test_vloxseg3_mask_nxv8i8_triscv.vector.tuple_nxv8i8_3
; CHECK-LABEL: test_vloxseg3_mask_nxv8i8_triscv.vector.tuple_nxv8i8_3t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1082,8 +1082,8 @@ define <vscale x 16 x i8> @test_vloxseg3_nxv16i8_triscv.vector.tuple_nxv16i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv16i8_triscv.vector.tuple_nxv16i8_3t_nxv16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei8.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv16i8_3t.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 16 x i8> %index, i64 %vl, i64 3)
@@ -1095,8 +1095,8 @@ define <vscale x 16 x i8> @test_vloxseg3_mask_nxv16i8_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vloxseg3_mask_nxv16i8_triscv.vector.tuple_nxv16i8_3t_nxv16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei8.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv16i1.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 16 x i8> %index, <vscale x 16 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1169,8 +1169,8 @@ define <vscale x 1 x i8> @test_vloxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv
; CHECK-LABEL: test_vloxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv1i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 3)
@@ -1182,8 +1182,8 @@ define <vscale x 1 x i8> @test_vloxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4
; CHECK-LABEL: test_vloxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1198,8 +1198,8 @@ define <vscale x 1 x i8> @test_vloxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv
; CHECK-LABEL: test_vloxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv1i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 3)
@@ -1211,8 +1211,8 @@ define <vscale x 1 x i8> @test_vloxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4
; CHECK-LABEL: test_vloxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1227,8 +1227,8 @@ define <vscale x 1 x i8> @test_vloxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv
; CHECK-LABEL: test_vloxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv1i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 3)
@@ -1240,8 +1240,8 @@ define <vscale x 1 x i8> @test_vloxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4
; CHECK-LABEL: test_vloxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1256,8 +1256,8 @@ define <vscale x 1 x i8> @test_vloxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv
; CHECK-LABEL: test_vloxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei64.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv1i8_4t.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 3)
@@ -1269,8 +1269,8 @@ define <vscale x 1 x i8> @test_vloxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4
; CHECK-LABEL: test_vloxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei64.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1285,8 +1285,8 @@ define <vscale x 2 x i8> @test_vloxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv
; CHECK-LABEL: test_vloxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 3)
@@ -1298,8 +1298,8 @@ define <vscale x 2 x i8> @test_vloxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4
; CHECK-LABEL: test_vloxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1314,8 +1314,8 @@ define <vscale x 2 x i8> @test_vloxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv
; CHECK-LABEL: test_vloxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 3)
@@ -1327,8 +1327,8 @@ define <vscale x 2 x i8> @test_vloxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4
; CHECK-LABEL: test_vloxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1343,8 +1343,8 @@ define <vscale x 2 x i8> @test_vloxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv
; CHECK-LABEL: test_vloxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 3)
@@ -1356,8 +1356,8 @@ define <vscale x 2 x i8> @test_vloxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4
; CHECK-LABEL: test_vloxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1401,8 +1401,8 @@ define <vscale x 4 x i8> @test_vloxseg4_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv
; CHECK-LABEL: test_vloxseg4_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 3)
@@ -1414,8 +1414,8 @@ define <vscale x 4 x i8> @test_vloxseg4_mask_nxv4i8_triscv.vector.tuple_nxv4i8_4
; CHECK-LABEL: test_vloxseg4_mask_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1430,8 +1430,8 @@ define <vscale x 4 x i8> @test_vloxseg4_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv
; CHECK-LABEL: test_vloxseg4_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 3)
@@ -1443,8 +1443,8 @@ define <vscale x 4 x i8> @test_vloxseg4_mask_nxv4i8_triscv.vector.tuple_nxv4i8_4
; CHECK-LABEL: test_vloxseg4_mask_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1517,8 +1517,8 @@ define <vscale x 8 x i8> @test_vloxseg4_nxv8i8_triscv.vector.tuple_nxv8i8_4t_nxv
; CHECK-LABEL: test_vloxseg4_nxv8i8_triscv.vector.tuple_nxv8i8_4t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 8 x i8> %index, i64 %vl, i64 3)
@@ -1530,8 +1530,8 @@ define <vscale x 8 x i8> @test_vloxseg4_mask_nxv8i8_triscv.vector.tuple_nxv8i8_4
; CHECK-LABEL: test_vloxseg4_mask_nxv8i8_triscv.vector.tuple_nxv8i8_4t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1633,8 +1633,8 @@ define <vscale x 16 x i8> @test_vloxseg4_nxv16i8_triscv.vector.tuple_nxv16i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv16i8_triscv.vector.tuple_nxv16i8_4t_nxv16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei8.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv16i8_4t.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 16 x i8> %index, i64 %vl, i64 3)
@@ -1646,8 +1646,8 @@ define <vscale x 16 x i8> @test_vloxseg4_mask_nxv16i8_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vloxseg4_mask_nxv16i8_triscv.vector.tuple_nxv16i8_4t_nxv16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei8.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv16i1.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 16 x i8> %index, <vscale x 16 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1720,8 +1720,8 @@ define <vscale x 1 x i8> @test_vloxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv1i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 3)
@@ -1733,8 +1733,8 @@ define <vscale x 1 x i8> @test_vloxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1749,8 +1749,8 @@ define <vscale x 1 x i8> @test_vloxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv1i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 3)
@@ -1762,8 +1762,8 @@ define <vscale x 1 x i8> @test_vloxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1778,8 +1778,8 @@ define <vscale x 1 x i8> @test_vloxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv1i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 3)
@@ -1791,8 +1791,8 @@ define <vscale x 1 x i8> @test_vloxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1807,8 +1807,8 @@ define <vscale x 1 x i8> @test_vloxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv1i8_5t.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 3)
@@ -1820,8 +1820,8 @@ define <vscale x 1 x i8> @test_vloxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1836,8 +1836,8 @@ define <vscale x 2 x i8> @test_vloxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 3)
@@ -1849,8 +1849,8 @@ define <vscale x 2 x i8> @test_vloxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1865,8 +1865,8 @@ define <vscale x 2 x i8> @test_vloxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 3)
@@ -1878,8 +1878,8 @@ define <vscale x 2 x i8> @test_vloxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1894,8 +1894,8 @@ define <vscale x 2 x i8> @test_vloxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 3)
@@ -1907,8 +1907,8 @@ define <vscale x 2 x i8> @test_vloxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1923,8 +1923,8 @@ define <vscale x 2 x i8> @test_vloxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv2i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 3)
@@ -1936,8 +1936,8 @@ define <vscale x 2 x i8> @test_vloxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1952,8 +1952,8 @@ define <vscale x 4 x i8> @test_vloxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 3)
@@ -1965,8 +1965,8 @@ define <vscale x 4 x i8> @test_vloxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1981,8 +1981,8 @@ define <vscale x 4 x i8> @test_vloxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 3)
@@ -1994,8 +1994,8 @@ define <vscale x 4 x i8> @test_vloxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2010,8 +2010,8 @@ define <vscale x 4 x i8> @test_vloxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 3)
@@ -2023,8 +2023,8 @@ define <vscale x 4 x i8> @test_vloxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2068,8 +2068,8 @@ define <vscale x 8 x i8> @test_vloxseg5_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 8 x i8> %index, i64 %vl, i64 3)
@@ -2081,8 +2081,8 @@ define <vscale x 8 x i8> @test_vloxseg5_mask_nxv8i8_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2097,8 +2097,8 @@ define <vscale x 8 x i8> @test_vloxseg5_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv
; CHECK-LABEL: test_vloxseg5_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 3)
@@ -2110,8 +2110,8 @@ define <vscale x 8 x i8> @test_vloxseg5_mask_nxv8i8_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vloxseg5_mask_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2184,8 +2184,8 @@ define <vscale x 1 x i8> @test_vloxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv1i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 3)
@@ -2197,8 +2197,8 @@ define <vscale x 1 x i8> @test_vloxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2213,8 +2213,8 @@ define <vscale x 1 x i8> @test_vloxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv1i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 3)
@@ -2226,8 +2226,8 @@ define <vscale x 1 x i8> @test_vloxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2242,8 +2242,8 @@ define <vscale x 1 x i8> @test_vloxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv1i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 3)
@@ -2255,8 +2255,8 @@ define <vscale x 1 x i8> @test_vloxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2271,8 +2271,8 @@ define <vscale x 1 x i8> @test_vloxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv1i8_6t.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 3)
@@ -2284,8 +2284,8 @@ define <vscale x 1 x i8> @test_vloxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2300,8 +2300,8 @@ define <vscale x 2 x i8> @test_vloxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 3)
@@ -2313,8 +2313,8 @@ define <vscale x 2 x i8> @test_vloxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2329,8 +2329,8 @@ define <vscale x 2 x i8> @test_vloxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 3)
@@ -2342,8 +2342,8 @@ define <vscale x 2 x i8> @test_vloxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2358,8 +2358,8 @@ define <vscale x 2 x i8> @test_vloxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 3)
@@ -2371,8 +2371,8 @@ define <vscale x 2 x i8> @test_vloxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2387,8 +2387,8 @@ define <vscale x 2 x i8> @test_vloxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv2i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 3)
@@ -2400,8 +2400,8 @@ define <vscale x 2 x i8> @test_vloxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2416,8 +2416,8 @@ define <vscale x 4 x i8> @test_vloxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 3)
@@ -2429,8 +2429,8 @@ define <vscale x 4 x i8> @test_vloxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2445,8 +2445,8 @@ define <vscale x 4 x i8> @test_vloxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 3)
@@ -2458,8 +2458,8 @@ define <vscale x 4 x i8> @test_vloxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2474,8 +2474,8 @@ define <vscale x 4 x i8> @test_vloxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 3)
@@ -2487,8 +2487,8 @@ define <vscale x 4 x i8> @test_vloxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2532,8 +2532,8 @@ define <vscale x 8 x i8> @test_vloxseg6_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 8 x i8> %index, i64 %vl, i64 3)
@@ -2545,8 +2545,8 @@ define <vscale x 8 x i8> @test_vloxseg6_mask_nxv8i8_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2561,8 +2561,8 @@ define <vscale x 8 x i8> @test_vloxseg6_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv
; CHECK-LABEL: test_vloxseg6_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 3)
@@ -2574,8 +2574,8 @@ define <vscale x 8 x i8> @test_vloxseg6_mask_nxv8i8_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vloxseg6_mask_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2648,8 +2648,8 @@ define <vscale x 1 x i8> @test_vloxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv1i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 3)
@@ -2661,8 +2661,8 @@ define <vscale x 1 x i8> @test_vloxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2677,8 +2677,8 @@ define <vscale x 1 x i8> @test_vloxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv1i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 3)
@@ -2690,8 +2690,8 @@ define <vscale x 1 x i8> @test_vloxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2706,8 +2706,8 @@ define <vscale x 1 x i8> @test_vloxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv1i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 3)
@@ -2719,8 +2719,8 @@ define <vscale x 1 x i8> @test_vloxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2735,8 +2735,8 @@ define <vscale x 1 x i8> @test_vloxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv1i8_7t.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 3)
@@ -2748,8 +2748,8 @@ define <vscale x 1 x i8> @test_vloxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2764,8 +2764,8 @@ define <vscale x 2 x i8> @test_vloxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 3)
@@ -2777,8 +2777,8 @@ define <vscale x 2 x i8> @test_vloxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2793,8 +2793,8 @@ define <vscale x 2 x i8> @test_vloxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 3)
@@ -2806,8 +2806,8 @@ define <vscale x 2 x i8> @test_vloxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2822,8 +2822,8 @@ define <vscale x 2 x i8> @test_vloxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 3)
@@ -2835,8 +2835,8 @@ define <vscale x 2 x i8> @test_vloxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2851,8 +2851,8 @@ define <vscale x 2 x i8> @test_vloxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv2i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 3)
@@ -2864,8 +2864,8 @@ define <vscale x 2 x i8> @test_vloxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2880,8 +2880,8 @@ define <vscale x 4 x i8> @test_vloxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 3)
@@ -2893,8 +2893,8 @@ define <vscale x 4 x i8> @test_vloxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2909,8 +2909,8 @@ define <vscale x 4 x i8> @test_vloxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 3)
@@ -2922,8 +2922,8 @@ define <vscale x 4 x i8> @test_vloxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2938,8 +2938,8 @@ define <vscale x 4 x i8> @test_vloxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 3)
@@ -2951,8 +2951,8 @@ define <vscale x 4 x i8> @test_vloxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2996,8 +2996,8 @@ define <vscale x 8 x i8> @test_vloxseg7_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 8 x i8> %index, i64 %vl, i64 3)
@@ -3009,8 +3009,8 @@ define <vscale x 8 x i8> @test_vloxseg7_mask_nxv8i8_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3025,8 +3025,8 @@ define <vscale x 8 x i8> @test_vloxseg7_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv
; CHECK-LABEL: test_vloxseg7_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 3)
@@ -3038,8 +3038,8 @@ define <vscale x 8 x i8> @test_vloxseg7_mask_nxv8i8_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vloxseg7_mask_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3112,8 +3112,8 @@ define <vscale x 1 x i8> @test_vloxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv1i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 3)
@@ -3125,8 +3125,8 @@ define <vscale x 1 x i8> @test_vloxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3141,8 +3141,8 @@ define <vscale x 1 x i8> @test_vloxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv1i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 3)
@@ -3154,8 +3154,8 @@ define <vscale x 1 x i8> @test_vloxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3170,8 +3170,8 @@ define <vscale x 1 x i8> @test_vloxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv1i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 3)
@@ -3183,8 +3183,8 @@ define <vscale x 1 x i8> @test_vloxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3199,8 +3199,8 @@ define <vscale x 1 x i8> @test_vloxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv1i8_8t.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 3)
@@ -3212,8 +3212,8 @@ define <vscale x 1 x i8> @test_vloxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3228,8 +3228,8 @@ define <vscale x 2 x i8> @test_vloxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 3)
@@ -3241,8 +3241,8 @@ define <vscale x 2 x i8> @test_vloxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3257,8 +3257,8 @@ define <vscale x 2 x i8> @test_vloxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 3)
@@ -3270,8 +3270,8 @@ define <vscale x 2 x i8> @test_vloxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3286,8 +3286,8 @@ define <vscale x 2 x i8> @test_vloxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 3)
@@ -3299,8 +3299,8 @@ define <vscale x 2 x i8> @test_vloxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3315,8 +3315,8 @@ define <vscale x 2 x i8> @test_vloxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv2i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 3)
@@ -3328,8 +3328,8 @@ define <vscale x 2 x i8> @test_vloxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3344,8 +3344,8 @@ define <vscale x 4 x i8> @test_vloxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 3)
@@ -3357,8 +3357,8 @@ define <vscale x 4 x i8> @test_vloxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3373,8 +3373,8 @@ define <vscale x 4 x i8> @test_vloxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 3)
@@ -3386,8 +3386,8 @@ define <vscale x 4 x i8> @test_vloxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3402,8 +3402,8 @@ define <vscale x 4 x i8> @test_vloxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 3)
@@ -3415,8 +3415,8 @@ define <vscale x 4 x i8> @test_vloxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3460,8 +3460,8 @@ define <vscale x 8 x i8> @test_vloxseg8_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 8 x i8> %index, i64 %vl, i64 3)
@@ -3473,8 +3473,8 @@ define <vscale x 8 x i8> @test_vloxseg8_mask_nxv8i8_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3489,8 +3489,8 @@ define <vscale x 8 x i8> @test_vloxseg8_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv
; CHECK-LABEL: test_vloxseg8_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 3)
@@ -3502,8 +3502,8 @@ define <vscale x 8 x i8> @test_vloxseg8_mask_nxv8i8_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vloxseg8_mask_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3576,8 +3576,8 @@ define <vscale x 1 x i16> @test_vloxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -3589,8 +3589,8 @@ define <vscale x 1 x i16> @test_vloxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -3605,8 +3605,8 @@ define <vscale x 1 x i16> @test_vloxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -3618,8 +3618,8 @@ define <vscale x 1 x i16> @test_vloxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -3634,8 +3634,8 @@ define <vscale x 1 x i16> @test_vloxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -3647,8 +3647,8 @@ define <vscale x 1 x i16> @test_vloxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -3663,8 +3663,8 @@ define <vscale x 1 x i16> @test_vloxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei64.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -3676,8 +3676,8 @@ define <vscale x 1 x i16> @test_vloxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei64.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -3692,8 +3692,8 @@ define <vscale x 2 x i16> @test_vloxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -3705,8 +3705,8 @@ define <vscale x 2 x i16> @test_vloxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -3721,8 +3721,8 @@ define <vscale x 2 x i16> @test_vloxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -3734,8 +3734,8 @@ define <vscale x 2 x i16> @test_vloxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -3750,8 +3750,8 @@ define <vscale x 2 x i16> @test_vloxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -3763,8 +3763,8 @@ define <vscale x 2 x i16> @test_vloxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -3808,8 +3808,8 @@ define <vscale x 4 x i16> @test_vloxseg2_nxv4i16_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv4i16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -3821,8 +3821,8 @@ define <vscale x 4 x i16> @test_vloxseg2_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg2_mask_nxv4i16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -3837,8 +3837,8 @@ define <vscale x 4 x i16> @test_vloxseg2_nxv4i16_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv4i16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -3850,8 +3850,8 @@ define <vscale x 4 x i16> @test_vloxseg2_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg2_mask_nxv4i16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4127,8 +4127,8 @@ define <vscale x 1 x i16> @test_vloxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -4140,8 +4140,8 @@ define <vscale x 1 x i16> @test_vloxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4156,8 +4156,8 @@ define <vscale x 1 x i16> @test_vloxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -4169,8 +4169,8 @@ define <vscale x 1 x i16> @test_vloxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4185,8 +4185,8 @@ define <vscale x 1 x i16> @test_vloxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -4198,8 +4198,8 @@ define <vscale x 1 x i16> @test_vloxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4214,8 +4214,8 @@ define <vscale x 1 x i16> @test_vloxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei64.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -4227,8 +4227,8 @@ define <vscale x 1 x i16> @test_vloxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei64.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4243,8 +4243,8 @@ define <vscale x 2 x i16> @test_vloxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -4256,8 +4256,8 @@ define <vscale x 2 x i16> @test_vloxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4272,8 +4272,8 @@ define <vscale x 2 x i16> @test_vloxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -4285,8 +4285,8 @@ define <vscale x 2 x i16> @test_vloxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4301,8 +4301,8 @@ define <vscale x 2 x i16> @test_vloxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -4314,8 +4314,8 @@ define <vscale x 2 x i16> @test_vloxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4359,8 +4359,8 @@ define <vscale x 4 x i16> @test_vloxseg3_nxv4i16_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv4i16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -4372,8 +4372,8 @@ define <vscale x 4 x i16> @test_vloxseg3_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg3_mask_nxv4i16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4388,8 +4388,8 @@ define <vscale x 4 x i16> @test_vloxseg3_nxv4i16_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv4i16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -4401,8 +4401,8 @@ define <vscale x 4 x i16> @test_vloxseg3_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg3_mask_nxv4i16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4504,8 +4504,8 @@ define <vscale x 8 x i16> @test_vloxseg3_nxv8i16_triscv.vector.tuple_nxv16i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv8i16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei16.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv16i8_3t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 4)
@@ -4517,8 +4517,8 @@ define <vscale x 8 x i16> @test_vloxseg3_mask_nxv8i16_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vloxseg3_mask_nxv8i16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei16.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4591,8 +4591,8 @@ define <vscale x 1 x i16> @test_vloxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -4604,8 +4604,8 @@ define <vscale x 1 x i16> @test_vloxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4620,8 +4620,8 @@ define <vscale x 1 x i16> @test_vloxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -4633,8 +4633,8 @@ define <vscale x 1 x i16> @test_vloxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4649,8 +4649,8 @@ define <vscale x 1 x i16> @test_vloxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -4662,8 +4662,8 @@ define <vscale x 1 x i16> @test_vloxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4678,8 +4678,8 @@ define <vscale x 1 x i16> @test_vloxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei64.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -4691,8 +4691,8 @@ define <vscale x 1 x i16> @test_vloxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei64.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4707,8 +4707,8 @@ define <vscale x 2 x i16> @test_vloxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -4720,8 +4720,8 @@ define <vscale x 2 x i16> @test_vloxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4736,8 +4736,8 @@ define <vscale x 2 x i16> @test_vloxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -4749,8 +4749,8 @@ define <vscale x 2 x i16> @test_vloxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4765,8 +4765,8 @@ define <vscale x 2 x i16> @test_vloxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -4778,8 +4778,8 @@ define <vscale x 2 x i16> @test_vloxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4823,8 +4823,8 @@ define <vscale x 4 x i16> @test_vloxseg4_nxv4i16_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv4i16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -4836,8 +4836,8 @@ define <vscale x 4 x i16> @test_vloxseg4_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg4_mask_nxv4i16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4852,8 +4852,8 @@ define <vscale x 4 x i16> @test_vloxseg4_nxv4i16_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv4i16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -4865,8 +4865,8 @@ define <vscale x 4 x i16> @test_vloxseg4_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg4_mask_nxv4i16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4968,8 +4968,8 @@ define <vscale x 8 x i16> @test_vloxseg4_nxv8i16_triscv.vector.tuple_nxv16i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv8i16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei16.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv16i8_4t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 4)
@@ -4981,8 +4981,8 @@ define <vscale x 8 x i16> @test_vloxseg4_mask_nxv8i16_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vloxseg4_mask_nxv8i16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei16.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5055,8 +5055,8 @@ define <vscale x 1 x i16> @test_vloxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -5068,8 +5068,8 @@ define <vscale x 1 x i16> @test_vloxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5084,8 +5084,8 @@ define <vscale x 1 x i16> @test_vloxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -5097,8 +5097,8 @@ define <vscale x 1 x i16> @test_vloxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5113,8 +5113,8 @@ define <vscale x 1 x i16> @test_vloxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -5126,8 +5126,8 @@ define <vscale x 1 x i16> @test_vloxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5142,8 +5142,8 @@ define <vscale x 1 x i16> @test_vloxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -5155,8 +5155,8 @@ define <vscale x 1 x i16> @test_vloxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5171,8 +5171,8 @@ define <vscale x 2 x i16> @test_vloxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -5184,8 +5184,8 @@ define <vscale x 2 x i16> @test_vloxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5200,8 +5200,8 @@ define <vscale x 2 x i16> @test_vloxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -5213,8 +5213,8 @@ define <vscale x 2 x i16> @test_vloxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5229,8 +5229,8 @@ define <vscale x 2 x i16> @test_vloxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -5242,8 +5242,8 @@ define <vscale x 2 x i16> @test_vloxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5258,8 +5258,8 @@ define <vscale x 2 x i16> @test_vloxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -5271,8 +5271,8 @@ define <vscale x 2 x i16> @test_vloxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5287,8 +5287,8 @@ define <vscale x 4 x i16> @test_vloxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -5300,8 +5300,8 @@ define <vscale x 4 x i16> @test_vloxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5316,8 +5316,8 @@ define <vscale x 4 x i16> @test_vloxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -5329,8 +5329,8 @@ define <vscale x 4 x i16> @test_vloxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5345,8 +5345,8 @@ define <vscale x 4 x i16> @test_vloxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -5358,8 +5358,8 @@ define <vscale x 4 x i16> @test_vloxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5403,8 +5403,8 @@ define <vscale x 1 x i16> @test_vloxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -5416,8 +5416,8 @@ define <vscale x 1 x i16> @test_vloxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5432,8 +5432,8 @@ define <vscale x 1 x i16> @test_vloxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -5445,8 +5445,8 @@ define <vscale x 1 x i16> @test_vloxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5461,8 +5461,8 @@ define <vscale x 1 x i16> @test_vloxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -5474,8 +5474,8 @@ define <vscale x 1 x i16> @test_vloxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5490,8 +5490,8 @@ define <vscale x 1 x i16> @test_vloxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -5503,8 +5503,8 @@ define <vscale x 1 x i16> @test_vloxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5519,8 +5519,8 @@ define <vscale x 2 x i16> @test_vloxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -5532,8 +5532,8 @@ define <vscale x 2 x i16> @test_vloxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5548,8 +5548,8 @@ define <vscale x 2 x i16> @test_vloxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -5561,8 +5561,8 @@ define <vscale x 2 x i16> @test_vloxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5577,8 +5577,8 @@ define <vscale x 2 x i16> @test_vloxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -5590,8 +5590,8 @@ define <vscale x 2 x i16> @test_vloxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5606,8 +5606,8 @@ define <vscale x 2 x i16> @test_vloxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -5619,8 +5619,8 @@ define <vscale x 2 x i16> @test_vloxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5635,8 +5635,8 @@ define <vscale x 4 x i16> @test_vloxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -5648,8 +5648,8 @@ define <vscale x 4 x i16> @test_vloxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5664,8 +5664,8 @@ define <vscale x 4 x i16> @test_vloxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -5677,8 +5677,8 @@ define <vscale x 4 x i16> @test_vloxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5693,8 +5693,8 @@ define <vscale x 4 x i16> @test_vloxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -5706,8 +5706,8 @@ define <vscale x 4 x i16> @test_vloxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5751,8 +5751,8 @@ define <vscale x 1 x i16> @test_vloxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -5764,8 +5764,8 @@ define <vscale x 1 x i16> @test_vloxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5780,8 +5780,8 @@ define <vscale x 1 x i16> @test_vloxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -5793,8 +5793,8 @@ define <vscale x 1 x i16> @test_vloxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5809,8 +5809,8 @@ define <vscale x 1 x i16> @test_vloxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -5822,8 +5822,8 @@ define <vscale x 1 x i16> @test_vloxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5838,8 +5838,8 @@ define <vscale x 1 x i16> @test_vloxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -5851,8 +5851,8 @@ define <vscale x 1 x i16> @test_vloxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5867,8 +5867,8 @@ define <vscale x 2 x i16> @test_vloxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -5880,8 +5880,8 @@ define <vscale x 2 x i16> @test_vloxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5896,8 +5896,8 @@ define <vscale x 2 x i16> @test_vloxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -5909,8 +5909,8 @@ define <vscale x 2 x i16> @test_vloxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5925,8 +5925,8 @@ define <vscale x 2 x i16> @test_vloxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -5938,8 +5938,8 @@ define <vscale x 2 x i16> @test_vloxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5954,8 +5954,8 @@ define <vscale x 2 x i16> @test_vloxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -5967,8 +5967,8 @@ define <vscale x 2 x i16> @test_vloxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5983,8 +5983,8 @@ define <vscale x 4 x i16> @test_vloxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -5996,8 +5996,8 @@ define <vscale x 4 x i16> @test_vloxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6012,8 +6012,8 @@ define <vscale x 4 x i16> @test_vloxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -6025,8 +6025,8 @@ define <vscale x 4 x i16> @test_vloxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6041,8 +6041,8 @@ define <vscale x 4 x i16> @test_vloxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -6054,8 +6054,8 @@ define <vscale x 4 x i16> @test_vloxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6099,8 +6099,8 @@ define <vscale x 1 x i16> @test_vloxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -6112,8 +6112,8 @@ define <vscale x 1 x i16> @test_vloxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6128,8 +6128,8 @@ define <vscale x 1 x i16> @test_vloxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -6141,8 +6141,8 @@ define <vscale x 1 x i16> @test_vloxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6157,8 +6157,8 @@ define <vscale x 1 x i16> @test_vloxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -6170,8 +6170,8 @@ define <vscale x 1 x i16> @test_vloxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6186,8 +6186,8 @@ define <vscale x 1 x i16> @test_vloxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -6199,8 +6199,8 @@ define <vscale x 1 x i16> @test_vloxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6215,8 +6215,8 @@ define <vscale x 2 x i16> @test_vloxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -6228,8 +6228,8 @@ define <vscale x 2 x i16> @test_vloxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6244,8 +6244,8 @@ define <vscale x 2 x i16> @test_vloxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -6257,8 +6257,8 @@ define <vscale x 2 x i16> @test_vloxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6273,8 +6273,8 @@ define <vscale x 2 x i16> @test_vloxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -6286,8 +6286,8 @@ define <vscale x 2 x i16> @test_vloxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6302,8 +6302,8 @@ define <vscale x 2 x i16> @test_vloxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -6315,8 +6315,8 @@ define <vscale x 2 x i16> @test_vloxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6331,8 +6331,8 @@ define <vscale x 4 x i16> @test_vloxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -6344,8 +6344,8 @@ define <vscale x 4 x i16> @test_vloxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6360,8 +6360,8 @@ define <vscale x 4 x i16> @test_vloxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -6373,8 +6373,8 @@ define <vscale x 4 x i16> @test_vloxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6389,8 +6389,8 @@ define <vscale x 4 x i16> @test_vloxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -6402,8 +6402,8 @@ define <vscale x 4 x i16> @test_vloxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6447,8 +6447,8 @@ define <vscale x 1 x i32> @test_vloxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -6460,8 +6460,8 @@ define <vscale x 1 x i32> @test_vloxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -6476,8 +6476,8 @@ define <vscale x 1 x i32> @test_vloxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -6489,8 +6489,8 @@ define <vscale x 1 x i32> @test_vloxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -6505,8 +6505,8 @@ define <vscale x 1 x i32> @test_vloxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -6518,8 +6518,8 @@ define <vscale x 1 x i32> @test_vloxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -6534,8 +6534,8 @@ define <vscale x 1 x i32> @test_vloxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei64.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -6547,8 +6547,8 @@ define <vscale x 1 x i32> @test_vloxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei64.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -6563,8 +6563,8 @@ define <vscale x 2 x i32> @test_vloxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -6576,8 +6576,8 @@ define <vscale x 2 x i32> @test_vloxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -6592,8 +6592,8 @@ define <vscale x 2 x i32> @test_vloxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -6605,8 +6605,8 @@ define <vscale x 2 x i32> @test_vloxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -6621,8 +6621,8 @@ define <vscale x 2 x i32> @test_vloxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -6634,8 +6634,8 @@ define <vscale x 2 x i32> @test_vloxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -6911,8 +6911,8 @@ define <vscale x 1 x i32> @test_vloxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -6924,8 +6924,8 @@ define <vscale x 1 x i32> @test_vloxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -6940,8 +6940,8 @@ define <vscale x 1 x i32> @test_vloxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -6953,8 +6953,8 @@ define <vscale x 1 x i32> @test_vloxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -6969,8 +6969,8 @@ define <vscale x 1 x i32> @test_vloxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -6982,8 +6982,8 @@ define <vscale x 1 x i32> @test_vloxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -6998,8 +6998,8 @@ define <vscale x 1 x i32> @test_vloxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei64.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -7011,8 +7011,8 @@ define <vscale x 1 x i32> @test_vloxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei64.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7027,8 +7027,8 @@ define <vscale x 2 x i32> @test_vloxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -7040,8 +7040,8 @@ define <vscale x 2 x i32> @test_vloxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7056,8 +7056,8 @@ define <vscale x 2 x i32> @test_vloxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -7069,8 +7069,8 @@ define <vscale x 2 x i32> @test_vloxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7085,8 +7085,8 @@ define <vscale x 2 x i32> @test_vloxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -7098,8 +7098,8 @@ define <vscale x 2 x i32> @test_vloxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7201,8 +7201,8 @@ define <vscale x 4 x i32> @test_vloxseg3_nxv4i32_triscv.vector.tuple_nxv16i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv4i32_triscv.vector.tuple_nxv16i8_3t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei32.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv16i8_3t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 5)
@@ -7214,8 +7214,8 @@ define <vscale x 4 x i32> @test_vloxseg3_mask_nxv4i32_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vloxseg3_mask_nxv4i32_triscv.vector.tuple_nxv16i8_3t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei32.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7259,8 +7259,8 @@ define <vscale x 1 x i32> @test_vloxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -7272,8 +7272,8 @@ define <vscale x 1 x i32> @test_vloxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7288,8 +7288,8 @@ define <vscale x 1 x i32> @test_vloxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -7301,8 +7301,8 @@ define <vscale x 1 x i32> @test_vloxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7317,8 +7317,8 @@ define <vscale x 1 x i32> @test_vloxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -7330,8 +7330,8 @@ define <vscale x 1 x i32> @test_vloxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7346,8 +7346,8 @@ define <vscale x 1 x i32> @test_vloxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei64.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -7359,8 +7359,8 @@ define <vscale x 1 x i32> @test_vloxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei64.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7375,8 +7375,8 @@ define <vscale x 2 x i32> @test_vloxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -7388,8 +7388,8 @@ define <vscale x 2 x i32> @test_vloxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7404,8 +7404,8 @@ define <vscale x 2 x i32> @test_vloxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -7417,8 +7417,8 @@ define <vscale x 2 x i32> @test_vloxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7433,8 +7433,8 @@ define <vscale x 2 x i32> @test_vloxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -7446,8 +7446,8 @@ define <vscale x 2 x i32> @test_vloxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7549,8 +7549,8 @@ define <vscale x 4 x i32> @test_vloxseg4_nxv4i32_triscv.vector.tuple_nxv16i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv4i32_triscv.vector.tuple_nxv16i8_4t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei32.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv16i8_4t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 5)
@@ -7562,8 +7562,8 @@ define <vscale x 4 x i32> @test_vloxseg4_mask_nxv4i32_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vloxseg4_mask_nxv4i32_triscv.vector.tuple_nxv16i8_4t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei32.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7607,8 +7607,8 @@ define <vscale x 1 x i32> @test_vloxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -7620,8 +7620,8 @@ define <vscale x 1 x i32> @test_vloxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7636,8 +7636,8 @@ define <vscale x 1 x i32> @test_vloxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -7649,8 +7649,8 @@ define <vscale x 1 x i32> @test_vloxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7665,8 +7665,8 @@ define <vscale x 1 x i32> @test_vloxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -7678,8 +7678,8 @@ define <vscale x 1 x i32> @test_vloxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7694,8 +7694,8 @@ define <vscale x 1 x i32> @test_vloxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -7707,8 +7707,8 @@ define <vscale x 1 x i32> @test_vloxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7723,8 +7723,8 @@ define <vscale x 2 x i32> @test_vloxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -7736,8 +7736,8 @@ define <vscale x 2 x i32> @test_vloxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7752,8 +7752,8 @@ define <vscale x 2 x i32> @test_vloxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -7765,8 +7765,8 @@ define <vscale x 2 x i32> @test_vloxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7781,8 +7781,8 @@ define <vscale x 2 x i32> @test_vloxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -7794,8 +7794,8 @@ define <vscale x 2 x i32> @test_vloxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7810,8 +7810,8 @@ define <vscale x 2 x i32> @test_vloxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 5)
@@ -7823,8 +7823,8 @@ define <vscale x 2 x i32> @test_vloxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7839,8 +7839,8 @@ define <vscale x 1 x i32> @test_vloxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -7852,8 +7852,8 @@ define <vscale x 1 x i32> @test_vloxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7868,8 +7868,8 @@ define <vscale x 1 x i32> @test_vloxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -7881,8 +7881,8 @@ define <vscale x 1 x i32> @test_vloxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7897,8 +7897,8 @@ define <vscale x 1 x i32> @test_vloxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -7910,8 +7910,8 @@ define <vscale x 1 x i32> @test_vloxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7926,8 +7926,8 @@ define <vscale x 1 x i32> @test_vloxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -7939,8 +7939,8 @@ define <vscale x 1 x i32> @test_vloxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7955,8 +7955,8 @@ define <vscale x 2 x i32> @test_vloxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -7968,8 +7968,8 @@ define <vscale x 2 x i32> @test_vloxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7984,8 +7984,8 @@ define <vscale x 2 x i32> @test_vloxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -7997,8 +7997,8 @@ define <vscale x 2 x i32> @test_vloxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8013,8 +8013,8 @@ define <vscale x 2 x i32> @test_vloxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -8026,8 +8026,8 @@ define <vscale x 2 x i32> @test_vloxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8042,8 +8042,8 @@ define <vscale x 2 x i32> @test_vloxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 5)
@@ -8055,8 +8055,8 @@ define <vscale x 2 x i32> @test_vloxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8071,8 +8071,8 @@ define <vscale x 1 x i32> @test_vloxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -8084,8 +8084,8 @@ define <vscale x 1 x i32> @test_vloxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8100,8 +8100,8 @@ define <vscale x 1 x i32> @test_vloxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -8113,8 +8113,8 @@ define <vscale x 1 x i32> @test_vloxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8129,8 +8129,8 @@ define <vscale x 1 x i32> @test_vloxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -8142,8 +8142,8 @@ define <vscale x 1 x i32> @test_vloxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8158,8 +8158,8 @@ define <vscale x 1 x i32> @test_vloxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -8171,8 +8171,8 @@ define <vscale x 1 x i32> @test_vloxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8187,8 +8187,8 @@ define <vscale x 2 x i32> @test_vloxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -8200,8 +8200,8 @@ define <vscale x 2 x i32> @test_vloxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8216,8 +8216,8 @@ define <vscale x 2 x i32> @test_vloxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -8229,8 +8229,8 @@ define <vscale x 2 x i32> @test_vloxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8245,8 +8245,8 @@ define <vscale x 2 x i32> @test_vloxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -8258,8 +8258,8 @@ define <vscale x 2 x i32> @test_vloxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8274,8 +8274,8 @@ define <vscale x 2 x i32> @test_vloxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 5)
@@ -8287,8 +8287,8 @@ define <vscale x 2 x i32> @test_vloxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8303,8 +8303,8 @@ define <vscale x 1 x i32> @test_vloxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -8316,8 +8316,8 @@ define <vscale x 1 x i32> @test_vloxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8332,8 +8332,8 @@ define <vscale x 1 x i32> @test_vloxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -8345,8 +8345,8 @@ define <vscale x 1 x i32> @test_vloxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8361,8 +8361,8 @@ define <vscale x 1 x i32> @test_vloxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -8374,8 +8374,8 @@ define <vscale x 1 x i32> @test_vloxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8390,8 +8390,8 @@ define <vscale x 1 x i32> @test_vloxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -8403,8 +8403,8 @@ define <vscale x 1 x i32> @test_vloxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8419,8 +8419,8 @@ define <vscale x 2 x i32> @test_vloxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -8432,8 +8432,8 @@ define <vscale x 2 x i32> @test_vloxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8448,8 +8448,8 @@ define <vscale x 2 x i32> @test_vloxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -8461,8 +8461,8 @@ define <vscale x 2 x i32> @test_vloxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8477,8 +8477,8 @@ define <vscale x 2 x i32> @test_vloxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -8490,8 +8490,8 @@ define <vscale x 2 x i32> @test_vloxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8506,8 +8506,8 @@ define <vscale x 2 x i32> @test_vloxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 5)
@@ -8519,8 +8519,8 @@ define <vscale x 2 x i32> @test_vloxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8535,8 +8535,8 @@ define <vscale x 1 x i64> @test_vloxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -8548,8 +8548,8 @@ define <vscale x 1 x i64> @test_vloxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -8564,8 +8564,8 @@ define <vscale x 1 x i64> @test_vloxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -8577,8 +8577,8 @@ define <vscale x 1 x i64> @test_vloxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -8593,8 +8593,8 @@ define <vscale x 1 x i64> @test_vloxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -8606,8 +8606,8 @@ define <vscale x 1 x i64> @test_vloxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -8622,8 +8622,8 @@ define <vscale x 1 x i64> @test_vloxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vloxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei64.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -8635,8 +8635,8 @@ define <vscale x 1 x i64> @test_vloxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei64.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -8883,8 +8883,8 @@ define <vscale x 1 x i64> @test_vloxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -8896,8 +8896,8 @@ define <vscale x 1 x i64> @test_vloxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -8912,8 +8912,8 @@ define <vscale x 1 x i64> @test_vloxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -8925,8 +8925,8 @@ define <vscale x 1 x i64> @test_vloxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -8941,8 +8941,8 @@ define <vscale x 1 x i64> @test_vloxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -8954,8 +8954,8 @@ define <vscale x 1 x i64> @test_vloxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -8970,8 +8970,8 @@ define <vscale x 1 x i64> @test_vloxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vloxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei64.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -8983,8 +8983,8 @@ define <vscale x 1 x i64> @test_vloxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei64.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9086,8 +9086,8 @@ define <vscale x 2 x i64> @test_vloxseg3_nxv2i64_triscv.vector.tuple_nxv16i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv2i64_triscv.vector.tuple_nxv16i8_3t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei64.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv16i8_3t.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 6)
@@ -9099,8 +9099,8 @@ define <vscale x 2 x i64> @test_vloxseg3_mask_nxv2i64_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vloxseg3_mask_nxv2i64_triscv.vector.tuple_nxv16i8_3t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei64.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9115,8 +9115,8 @@ define <vscale x 1 x i64> @test_vloxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -9128,8 +9128,8 @@ define <vscale x 1 x i64> @test_vloxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9144,8 +9144,8 @@ define <vscale x 1 x i64> @test_vloxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -9157,8 +9157,8 @@ define <vscale x 1 x i64> @test_vloxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9173,8 +9173,8 @@ define <vscale x 1 x i64> @test_vloxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -9186,8 +9186,8 @@ define <vscale x 1 x i64> @test_vloxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9202,8 +9202,8 @@ define <vscale x 1 x i64> @test_vloxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vloxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei64.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -9215,8 +9215,8 @@ define <vscale x 1 x i64> @test_vloxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei64.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9318,8 +9318,8 @@ define <vscale x 2 x i64> @test_vloxseg4_nxv2i64_triscv.vector.tuple_nxv16i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv2i64_triscv.vector.tuple_nxv16i8_4t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei64.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv16i8_4t.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 6)
@@ -9331,8 +9331,8 @@ define <vscale x 2 x i64> @test_vloxseg4_mask_nxv2i64_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vloxseg4_mask_nxv2i64_triscv.vector.tuple_nxv16i8_4t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei64.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9347,8 +9347,8 @@ define <vscale x 1 x i64> @test_vloxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -9360,8 +9360,8 @@ define <vscale x 1 x i64> @test_vloxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9376,8 +9376,8 @@ define <vscale x 1 x i64> @test_vloxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -9389,8 +9389,8 @@ define <vscale x 1 x i64> @test_vloxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9405,8 +9405,8 @@ define <vscale x 1 x i64> @test_vloxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -9418,8 +9418,8 @@ define <vscale x 1 x i64> @test_vloxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9434,8 +9434,8 @@ define <vscale x 1 x i64> @test_vloxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vloxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -9447,8 +9447,8 @@ define <vscale x 1 x i64> @test_vloxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9463,8 +9463,8 @@ define <vscale x 1 x i64> @test_vloxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -9476,8 +9476,8 @@ define <vscale x 1 x i64> @test_vloxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9492,8 +9492,8 @@ define <vscale x 1 x i64> @test_vloxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -9505,8 +9505,8 @@ define <vscale x 1 x i64> @test_vloxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9521,8 +9521,8 @@ define <vscale x 1 x i64> @test_vloxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -9534,8 +9534,8 @@ define <vscale x 1 x i64> @test_vloxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9550,8 +9550,8 @@ define <vscale x 1 x i64> @test_vloxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vloxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -9563,8 +9563,8 @@ define <vscale x 1 x i64> @test_vloxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9579,8 +9579,8 @@ define <vscale x 1 x i64> @test_vloxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -9592,8 +9592,8 @@ define <vscale x 1 x i64> @test_vloxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9608,8 +9608,8 @@ define <vscale x 1 x i64> @test_vloxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -9621,8 +9621,8 @@ define <vscale x 1 x i64> @test_vloxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9637,8 +9637,8 @@ define <vscale x 1 x i64> @test_vloxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -9650,8 +9650,8 @@ define <vscale x 1 x i64> @test_vloxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9666,8 +9666,8 @@ define <vscale x 1 x i64> @test_vloxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vloxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -9679,8 +9679,8 @@ define <vscale x 1 x i64> @test_vloxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9695,8 +9695,8 @@ define <vscale x 1 x i64> @test_vloxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -9708,8 +9708,8 @@ define <vscale x 1 x i64> @test_vloxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9724,8 +9724,8 @@ define <vscale x 1 x i64> @test_vloxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -9737,8 +9737,8 @@ define <vscale x 1 x i64> @test_vloxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9753,8 +9753,8 @@ define <vscale x 1 x i64> @test_vloxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -9766,8 +9766,8 @@ define <vscale x 1 x i64> @test_vloxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9782,8 +9782,8 @@ define <vscale x 1 x i64> @test_vloxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vloxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -9795,8 +9795,8 @@ define <vscale x 1 x i64> @test_vloxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vloxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9809,8 +9809,8 @@ define <vscale x 1 x half> @test_vloxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_
; CHECK-LABEL: test_vloxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -9822,8 +9822,8 @@ define <vscale x 1 x half> @test_vloxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -9836,8 +9836,8 @@ define <vscale x 1 x half> @test_vloxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_
; CHECK-LABEL: test_vloxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -9849,8 +9849,8 @@ define <vscale x 1 x half> @test_vloxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -9863,8 +9863,8 @@ define <vscale x 1 x half> @test_vloxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_
; CHECK-LABEL: test_vloxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -9876,8 +9876,8 @@ define <vscale x 1 x half> @test_vloxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -9890,8 +9890,8 @@ define <vscale x 1 x half> @test_vloxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_
; CHECK-LABEL: test_vloxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei64.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -9903,8 +9903,8 @@ define <vscale x 1 x half> @test_vloxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei64.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -9917,8 +9917,8 @@ define <vscale x 2 x half> @test_vloxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_
; CHECK-LABEL: test_vloxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -9930,8 +9930,8 @@ define <vscale x 2 x half> @test_vloxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -9944,8 +9944,8 @@ define <vscale x 2 x half> @test_vloxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_
; CHECK-LABEL: test_vloxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -9957,8 +9957,8 @@ define <vscale x 2 x half> @test_vloxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -9971,8 +9971,8 @@ define <vscale x 2 x half> @test_vloxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_
; CHECK-LABEL: test_vloxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -9984,8 +9984,8 @@ define <vscale x 2 x half> @test_vloxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10025,8 +10025,8 @@ define <vscale x 4 x half> @test_vloxseg2_nxv4f16_triscv.vector.tuple_nxv8i8_2t_
; CHECK-LABEL: test_vloxseg2_nxv4f16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -10038,8 +10038,8 @@ define <vscale x 4 x half> @test_vloxseg2_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg2_mask_nxv4f16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10052,8 +10052,8 @@ define <vscale x 4 x half> @test_vloxseg2_nxv4f16_triscv.vector.tuple_nxv8i8_2t_
; CHECK-LABEL: test_vloxseg2_nxv4f16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -10065,8 +10065,8 @@ define <vscale x 4 x half> @test_vloxseg2_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg2_mask_nxv4f16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10322,8 +10322,8 @@ define <vscale x 1 x half> @test_vloxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -10335,8 +10335,8 @@ define <vscale x 1 x half> @test_vloxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10349,8 +10349,8 @@ define <vscale x 1 x half> @test_vloxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -10362,8 +10362,8 @@ define <vscale x 1 x half> @test_vloxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10376,8 +10376,8 @@ define <vscale x 1 x half> @test_vloxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -10389,8 +10389,8 @@ define <vscale x 1 x half> @test_vloxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10403,8 +10403,8 @@ define <vscale x 1 x half> @test_vloxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei64.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -10416,8 +10416,8 @@ define <vscale x 1 x half> @test_vloxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei64.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10430,8 +10430,8 @@ define <vscale x 2 x half> @test_vloxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -10443,8 +10443,8 @@ define <vscale x 2 x half> @test_vloxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10457,8 +10457,8 @@ define <vscale x 2 x half> @test_vloxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -10470,8 +10470,8 @@ define <vscale x 2 x half> @test_vloxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10484,8 +10484,8 @@ define <vscale x 2 x half> @test_vloxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -10497,8 +10497,8 @@ define <vscale x 2 x half> @test_vloxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10538,8 +10538,8 @@ define <vscale x 4 x half> @test_vloxseg3_nxv4f16_triscv.vector.tuple_nxv8i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv4f16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -10551,8 +10551,8 @@ define <vscale x 4 x half> @test_vloxseg3_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg3_mask_nxv4f16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10565,8 +10565,8 @@ define <vscale x 4 x half> @test_vloxseg3_nxv4f16_triscv.vector.tuple_nxv8i8_3t_
; CHECK-LABEL: test_vloxseg3_nxv4f16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -10578,8 +10578,8 @@ define <vscale x 4 x half> @test_vloxseg3_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg3_mask_nxv4f16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10673,8 +10673,8 @@ define <vscale x 8 x half> @test_vloxseg3_nxv8f16_triscv.vector.tuple_nxv16i8_3t
; CHECK-LABEL: test_vloxseg3_nxv8f16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei16.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv16i8_3t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 4)
@@ -10686,8 +10686,8 @@ define <vscale x 8 x half> @test_vloxseg3_mask_nxv8f16_triscv.vector.tuple_nxv16
; CHECK-LABEL: test_vloxseg3_mask_nxv8f16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei16.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10754,8 +10754,8 @@ define <vscale x 1 x half> @test_vloxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -10767,8 +10767,8 @@ define <vscale x 1 x half> @test_vloxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10781,8 +10781,8 @@ define <vscale x 1 x half> @test_vloxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -10794,8 +10794,8 @@ define <vscale x 1 x half> @test_vloxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10808,8 +10808,8 @@ define <vscale x 1 x half> @test_vloxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -10821,8 +10821,8 @@ define <vscale x 1 x half> @test_vloxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10835,8 +10835,8 @@ define <vscale x 1 x half> @test_vloxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei64.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -10848,8 +10848,8 @@ define <vscale x 1 x half> @test_vloxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei64.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10862,8 +10862,8 @@ define <vscale x 2 x half> @test_vloxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -10875,8 +10875,8 @@ define <vscale x 2 x half> @test_vloxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10889,8 +10889,8 @@ define <vscale x 2 x half> @test_vloxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -10902,8 +10902,8 @@ define <vscale x 2 x half> @test_vloxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10916,8 +10916,8 @@ define <vscale x 2 x half> @test_vloxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -10929,8 +10929,8 @@ define <vscale x 2 x half> @test_vloxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10970,8 +10970,8 @@ define <vscale x 4 x half> @test_vloxseg4_nxv4f16_triscv.vector.tuple_nxv8i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv4f16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -10983,8 +10983,8 @@ define <vscale x 4 x half> @test_vloxseg4_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg4_mask_nxv4f16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10997,8 +10997,8 @@ define <vscale x 4 x half> @test_vloxseg4_nxv4f16_triscv.vector.tuple_nxv8i8_4t_
; CHECK-LABEL: test_vloxseg4_nxv4f16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -11010,8 +11010,8 @@ define <vscale x 4 x half> @test_vloxseg4_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg4_mask_nxv4f16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11105,8 +11105,8 @@ define <vscale x 8 x half> @test_vloxseg4_nxv8f16_triscv.vector.tuple_nxv16i8_4t
; CHECK-LABEL: test_vloxseg4_nxv8f16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei16.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv16i8_4t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 4)
@@ -11118,8 +11118,8 @@ define <vscale x 8 x half> @test_vloxseg4_mask_nxv8f16_triscv.vector.tuple_nxv16
; CHECK-LABEL: test_vloxseg4_mask_nxv8f16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei16.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11186,8 +11186,8 @@ define <vscale x 1 x half> @test_vloxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -11199,8 +11199,8 @@ define <vscale x 1 x half> @test_vloxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11213,8 +11213,8 @@ define <vscale x 1 x half> @test_vloxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -11226,8 +11226,8 @@ define <vscale x 1 x half> @test_vloxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11240,8 +11240,8 @@ define <vscale x 1 x half> @test_vloxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -11253,8 +11253,8 @@ define <vscale x 1 x half> @test_vloxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11267,8 +11267,8 @@ define <vscale x 1 x half> @test_vloxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -11280,8 +11280,8 @@ define <vscale x 1 x half> @test_vloxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11294,8 +11294,8 @@ define <vscale x 2 x half> @test_vloxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -11307,8 +11307,8 @@ define <vscale x 2 x half> @test_vloxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11321,8 +11321,8 @@ define <vscale x 2 x half> @test_vloxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -11334,8 +11334,8 @@ define <vscale x 2 x half> @test_vloxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11348,8 +11348,8 @@ define <vscale x 2 x half> @test_vloxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -11361,8 +11361,8 @@ define <vscale x 2 x half> @test_vloxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11375,8 +11375,8 @@ define <vscale x 2 x half> @test_vloxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -11388,8 +11388,8 @@ define <vscale x 2 x half> @test_vloxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11402,8 +11402,8 @@ define <vscale x 4 x half> @test_vloxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -11415,8 +11415,8 @@ define <vscale x 4 x half> @test_vloxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11429,8 +11429,8 @@ define <vscale x 4 x half> @test_vloxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -11442,8 +11442,8 @@ define <vscale x 4 x half> @test_vloxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11456,8 +11456,8 @@ define <vscale x 4 x half> @test_vloxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_
; CHECK-LABEL: test_vloxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -11469,8 +11469,8 @@ define <vscale x 4 x half> @test_vloxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11510,8 +11510,8 @@ define <vscale x 1 x half> @test_vloxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -11523,8 +11523,8 @@ define <vscale x 1 x half> @test_vloxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11537,8 +11537,8 @@ define <vscale x 1 x half> @test_vloxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -11550,8 +11550,8 @@ define <vscale x 1 x half> @test_vloxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11564,8 +11564,8 @@ define <vscale x 1 x half> @test_vloxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -11577,8 +11577,8 @@ define <vscale x 1 x half> @test_vloxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11591,8 +11591,8 @@ define <vscale x 1 x half> @test_vloxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -11604,8 +11604,8 @@ define <vscale x 1 x half> @test_vloxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11618,8 +11618,8 @@ define <vscale x 2 x half> @test_vloxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -11631,8 +11631,8 @@ define <vscale x 2 x half> @test_vloxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11645,8 +11645,8 @@ define <vscale x 2 x half> @test_vloxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -11658,8 +11658,8 @@ define <vscale x 2 x half> @test_vloxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11672,8 +11672,8 @@ define <vscale x 2 x half> @test_vloxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -11685,8 +11685,8 @@ define <vscale x 2 x half> @test_vloxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11699,8 +11699,8 @@ define <vscale x 2 x half> @test_vloxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -11712,8 +11712,8 @@ define <vscale x 2 x half> @test_vloxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11726,8 +11726,8 @@ define <vscale x 4 x half> @test_vloxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -11739,8 +11739,8 @@ define <vscale x 4 x half> @test_vloxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11753,8 +11753,8 @@ define <vscale x 4 x half> @test_vloxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -11766,8 +11766,8 @@ define <vscale x 4 x half> @test_vloxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11780,8 +11780,8 @@ define <vscale x 4 x half> @test_vloxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_
; CHECK-LABEL: test_vloxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -11793,8 +11793,8 @@ define <vscale x 4 x half> @test_vloxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11834,8 +11834,8 @@ define <vscale x 1 x half> @test_vloxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -11847,8 +11847,8 @@ define <vscale x 1 x half> @test_vloxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11861,8 +11861,8 @@ define <vscale x 1 x half> @test_vloxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -11874,8 +11874,8 @@ define <vscale x 1 x half> @test_vloxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11888,8 +11888,8 @@ define <vscale x 1 x half> @test_vloxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -11901,8 +11901,8 @@ define <vscale x 1 x half> @test_vloxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11915,8 +11915,8 @@ define <vscale x 1 x half> @test_vloxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -11928,8 +11928,8 @@ define <vscale x 1 x half> @test_vloxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11942,8 +11942,8 @@ define <vscale x 2 x half> @test_vloxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -11955,8 +11955,8 @@ define <vscale x 2 x half> @test_vloxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11969,8 +11969,8 @@ define <vscale x 2 x half> @test_vloxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -11982,8 +11982,8 @@ define <vscale x 2 x half> @test_vloxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11996,8 +11996,8 @@ define <vscale x 2 x half> @test_vloxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -12009,8 +12009,8 @@ define <vscale x 2 x half> @test_vloxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12023,8 +12023,8 @@ define <vscale x 2 x half> @test_vloxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -12036,8 +12036,8 @@ define <vscale x 2 x half> @test_vloxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12050,8 +12050,8 @@ define <vscale x 4 x half> @test_vloxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -12063,8 +12063,8 @@ define <vscale x 4 x half> @test_vloxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12077,8 +12077,8 @@ define <vscale x 4 x half> @test_vloxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -12090,8 +12090,8 @@ define <vscale x 4 x half> @test_vloxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12104,8 +12104,8 @@ define <vscale x 4 x half> @test_vloxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_
; CHECK-LABEL: test_vloxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -12117,8 +12117,8 @@ define <vscale x 4 x half> @test_vloxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12158,8 +12158,8 @@ define <vscale x 1 x half> @test_vloxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -12171,8 +12171,8 @@ define <vscale x 1 x half> @test_vloxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12185,8 +12185,8 @@ define <vscale x 1 x half> @test_vloxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -12198,8 +12198,8 @@ define <vscale x 1 x half> @test_vloxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12212,8 +12212,8 @@ define <vscale x 1 x half> @test_vloxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -12225,8 +12225,8 @@ define <vscale x 1 x half> @test_vloxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12239,8 +12239,8 @@ define <vscale x 1 x half> @test_vloxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -12252,8 +12252,8 @@ define <vscale x 1 x half> @test_vloxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vloxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12266,8 +12266,8 @@ define <vscale x 2 x half> @test_vloxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -12279,8 +12279,8 @@ define <vscale x 2 x half> @test_vloxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12293,8 +12293,8 @@ define <vscale x 2 x half> @test_vloxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -12306,8 +12306,8 @@ define <vscale x 2 x half> @test_vloxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12320,8 +12320,8 @@ define <vscale x 2 x half> @test_vloxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -12333,8 +12333,8 @@ define <vscale x 2 x half> @test_vloxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12347,8 +12347,8 @@ define <vscale x 2 x half> @test_vloxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -12360,8 +12360,8 @@ define <vscale x 2 x half> @test_vloxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vloxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12374,8 +12374,8 @@ define <vscale x 4 x half> @test_vloxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -12387,8 +12387,8 @@ define <vscale x 4 x half> @test_vloxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12401,8 +12401,8 @@ define <vscale x 4 x half> @test_vloxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -12414,8 +12414,8 @@ define <vscale x 4 x half> @test_vloxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12428,8 +12428,8 @@ define <vscale x 4 x half> @test_vloxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_
; CHECK-LABEL: test_vloxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -12441,8 +12441,8 @@ define <vscale x 4 x half> @test_vloxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vloxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12482,8 +12482,8 @@ define <vscale x 1 x float> @test_vloxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t
; CHECK-LABEL: test_vloxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -12495,8 +12495,8 @@ define <vscale x 1 x float> @test_vloxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -12509,8 +12509,8 @@ define <vscale x 1 x float> @test_vloxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t
; CHECK-LABEL: test_vloxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -12522,8 +12522,8 @@ define <vscale x 1 x float> @test_vloxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -12536,8 +12536,8 @@ define <vscale x 1 x float> @test_vloxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t
; CHECK-LABEL: test_vloxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -12549,8 +12549,8 @@ define <vscale x 1 x float> @test_vloxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -12563,8 +12563,8 @@ define <vscale x 1 x float> @test_vloxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t
; CHECK-LABEL: test_vloxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei64.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -12576,8 +12576,8 @@ define <vscale x 1 x float> @test_vloxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei64.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -12590,8 +12590,8 @@ define <vscale x 2 x float> @test_vloxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t
; CHECK-LABEL: test_vloxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -12603,8 +12603,8 @@ define <vscale x 2 x float> @test_vloxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -12617,8 +12617,8 @@ define <vscale x 2 x float> @test_vloxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t
; CHECK-LABEL: test_vloxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -12630,8 +12630,8 @@ define <vscale x 2 x float> @test_vloxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -12644,8 +12644,8 @@ define <vscale x 2 x float> @test_vloxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t
; CHECK-LABEL: test_vloxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -12657,8 +12657,8 @@ define <vscale x 2 x float> @test_vloxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -12914,8 +12914,8 @@ define <vscale x 1 x float> @test_vloxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t
; CHECK-LABEL: test_vloxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -12927,8 +12927,8 @@ define <vscale x 1 x float> @test_vloxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -12941,8 +12941,8 @@ define <vscale x 1 x float> @test_vloxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t
; CHECK-LABEL: test_vloxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -12954,8 +12954,8 @@ define <vscale x 1 x float> @test_vloxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -12968,8 +12968,8 @@ define <vscale x 1 x float> @test_vloxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t
; CHECK-LABEL: test_vloxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -12981,8 +12981,8 @@ define <vscale x 1 x float> @test_vloxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -12995,8 +12995,8 @@ define <vscale x 1 x float> @test_vloxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t
; CHECK-LABEL: test_vloxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei64.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -13008,8 +13008,8 @@ define <vscale x 1 x float> @test_vloxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei64.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13022,8 +13022,8 @@ define <vscale x 2 x float> @test_vloxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t
; CHECK-LABEL: test_vloxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -13035,8 +13035,8 @@ define <vscale x 2 x float> @test_vloxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13049,8 +13049,8 @@ define <vscale x 2 x float> @test_vloxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t
; CHECK-LABEL: test_vloxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -13062,8 +13062,8 @@ define <vscale x 2 x float> @test_vloxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13076,8 +13076,8 @@ define <vscale x 2 x float> @test_vloxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t
; CHECK-LABEL: test_vloxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -13089,8 +13089,8 @@ define <vscale x 2 x float> @test_vloxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13184,8 +13184,8 @@ define <vscale x 4 x float> @test_vloxseg3_nxv4f32_triscv.vector.tuple_nxv16i8_3
; CHECK-LABEL: test_vloxseg3_nxv4f32_triscv.vector.tuple_nxv16i8_3t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei32.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv16i8_3t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 5)
@@ -13197,8 +13197,8 @@ define <vscale x 4 x float> @test_vloxseg3_mask_nxv4f32_triscv.vector.tuple_nxv1
; CHECK-LABEL: test_vloxseg3_mask_nxv4f32_triscv.vector.tuple_nxv16i8_3t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei32.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13238,8 +13238,8 @@ define <vscale x 1 x float> @test_vloxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t
; CHECK-LABEL: test_vloxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -13251,8 +13251,8 @@ define <vscale x 1 x float> @test_vloxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13265,8 +13265,8 @@ define <vscale x 1 x float> @test_vloxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t
; CHECK-LABEL: test_vloxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -13278,8 +13278,8 @@ define <vscale x 1 x float> @test_vloxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13292,8 +13292,8 @@ define <vscale x 1 x float> @test_vloxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t
; CHECK-LABEL: test_vloxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -13305,8 +13305,8 @@ define <vscale x 1 x float> @test_vloxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13319,8 +13319,8 @@ define <vscale x 1 x float> @test_vloxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t
; CHECK-LABEL: test_vloxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei64.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -13332,8 +13332,8 @@ define <vscale x 1 x float> @test_vloxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei64.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13346,8 +13346,8 @@ define <vscale x 2 x float> @test_vloxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t
; CHECK-LABEL: test_vloxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -13359,8 +13359,8 @@ define <vscale x 2 x float> @test_vloxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13373,8 +13373,8 @@ define <vscale x 2 x float> @test_vloxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t
; CHECK-LABEL: test_vloxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -13386,8 +13386,8 @@ define <vscale x 2 x float> @test_vloxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13400,8 +13400,8 @@ define <vscale x 2 x float> @test_vloxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t
; CHECK-LABEL: test_vloxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -13413,8 +13413,8 @@ define <vscale x 2 x float> @test_vloxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13508,8 +13508,8 @@ define <vscale x 4 x float> @test_vloxseg4_nxv4f32_triscv.vector.tuple_nxv16i8_4
; CHECK-LABEL: test_vloxseg4_nxv4f32_triscv.vector.tuple_nxv16i8_4t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei32.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv16i8_4t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 5)
@@ -13521,8 +13521,8 @@ define <vscale x 4 x float> @test_vloxseg4_mask_nxv4f32_triscv.vector.tuple_nxv1
; CHECK-LABEL: test_vloxseg4_mask_nxv4f32_triscv.vector.tuple_nxv16i8_4t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei32.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13562,8 +13562,8 @@ define <vscale x 1 x float> @test_vloxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t
; CHECK-LABEL: test_vloxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -13575,8 +13575,8 @@ define <vscale x 1 x float> @test_vloxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13589,8 +13589,8 @@ define <vscale x 1 x float> @test_vloxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t
; CHECK-LABEL: test_vloxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -13602,8 +13602,8 @@ define <vscale x 1 x float> @test_vloxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13616,8 +13616,8 @@ define <vscale x 1 x float> @test_vloxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t
; CHECK-LABEL: test_vloxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -13629,8 +13629,8 @@ define <vscale x 1 x float> @test_vloxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13643,8 +13643,8 @@ define <vscale x 1 x float> @test_vloxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t
; CHECK-LABEL: test_vloxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -13656,8 +13656,8 @@ define <vscale x 1 x float> @test_vloxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13670,8 +13670,8 @@ define <vscale x 2 x float> @test_vloxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t
; CHECK-LABEL: test_vloxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -13683,8 +13683,8 @@ define <vscale x 2 x float> @test_vloxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13697,8 +13697,8 @@ define <vscale x 2 x float> @test_vloxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t
; CHECK-LABEL: test_vloxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -13710,8 +13710,8 @@ define <vscale x 2 x float> @test_vloxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13724,8 +13724,8 @@ define <vscale x 2 x float> @test_vloxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t
; CHECK-LABEL: test_vloxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -13737,8 +13737,8 @@ define <vscale x 2 x float> @test_vloxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13751,8 +13751,8 @@ define <vscale x 2 x float> @test_vloxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t
; CHECK-LABEL: test_vloxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 5)
@@ -13764,8 +13764,8 @@ define <vscale x 2 x float> @test_vloxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13778,8 +13778,8 @@ define <vscale x 1 x float> @test_vloxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t
; CHECK-LABEL: test_vloxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -13791,8 +13791,8 @@ define <vscale x 1 x float> @test_vloxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13805,8 +13805,8 @@ define <vscale x 1 x float> @test_vloxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t
; CHECK-LABEL: test_vloxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -13818,8 +13818,8 @@ define <vscale x 1 x float> @test_vloxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13832,8 +13832,8 @@ define <vscale x 1 x float> @test_vloxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t
; CHECK-LABEL: test_vloxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -13845,8 +13845,8 @@ define <vscale x 1 x float> @test_vloxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13859,8 +13859,8 @@ define <vscale x 1 x float> @test_vloxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t
; CHECK-LABEL: test_vloxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -13872,8 +13872,8 @@ define <vscale x 1 x float> @test_vloxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13886,8 +13886,8 @@ define <vscale x 2 x float> @test_vloxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t
; CHECK-LABEL: test_vloxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -13899,8 +13899,8 @@ define <vscale x 2 x float> @test_vloxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13913,8 +13913,8 @@ define <vscale x 2 x float> @test_vloxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t
; CHECK-LABEL: test_vloxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -13926,8 +13926,8 @@ define <vscale x 2 x float> @test_vloxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13940,8 +13940,8 @@ define <vscale x 2 x float> @test_vloxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t
; CHECK-LABEL: test_vloxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -13953,8 +13953,8 @@ define <vscale x 2 x float> @test_vloxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13967,8 +13967,8 @@ define <vscale x 2 x float> @test_vloxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t
; CHECK-LABEL: test_vloxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 5)
@@ -13980,8 +13980,8 @@ define <vscale x 2 x float> @test_vloxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13994,8 +13994,8 @@ define <vscale x 1 x float> @test_vloxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t
; CHECK-LABEL: test_vloxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -14007,8 +14007,8 @@ define <vscale x 1 x float> @test_vloxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14021,8 +14021,8 @@ define <vscale x 1 x float> @test_vloxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t
; CHECK-LABEL: test_vloxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -14034,8 +14034,8 @@ define <vscale x 1 x float> @test_vloxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14048,8 +14048,8 @@ define <vscale x 1 x float> @test_vloxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t
; CHECK-LABEL: test_vloxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -14061,8 +14061,8 @@ define <vscale x 1 x float> @test_vloxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14075,8 +14075,8 @@ define <vscale x 1 x float> @test_vloxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t
; CHECK-LABEL: test_vloxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -14088,8 +14088,8 @@ define <vscale x 1 x float> @test_vloxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14102,8 +14102,8 @@ define <vscale x 2 x float> @test_vloxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t
; CHECK-LABEL: test_vloxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -14115,8 +14115,8 @@ define <vscale x 2 x float> @test_vloxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14129,8 +14129,8 @@ define <vscale x 2 x float> @test_vloxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t
; CHECK-LABEL: test_vloxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -14142,8 +14142,8 @@ define <vscale x 2 x float> @test_vloxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14156,8 +14156,8 @@ define <vscale x 2 x float> @test_vloxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t
; CHECK-LABEL: test_vloxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -14169,8 +14169,8 @@ define <vscale x 2 x float> @test_vloxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14183,8 +14183,8 @@ define <vscale x 2 x float> @test_vloxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t
; CHECK-LABEL: test_vloxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 5)
@@ -14196,8 +14196,8 @@ define <vscale x 2 x float> @test_vloxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14210,8 +14210,8 @@ define <vscale x 1 x float> @test_vloxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t
; CHECK-LABEL: test_vloxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -14223,8 +14223,8 @@ define <vscale x 1 x float> @test_vloxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14237,8 +14237,8 @@ define <vscale x 1 x float> @test_vloxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t
; CHECK-LABEL: test_vloxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -14250,8 +14250,8 @@ define <vscale x 1 x float> @test_vloxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14264,8 +14264,8 @@ define <vscale x 1 x float> @test_vloxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t
; CHECK-LABEL: test_vloxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -14277,8 +14277,8 @@ define <vscale x 1 x float> @test_vloxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14291,8 +14291,8 @@ define <vscale x 1 x float> @test_vloxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t
; CHECK-LABEL: test_vloxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -14304,8 +14304,8 @@ define <vscale x 1 x float> @test_vloxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vloxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14318,8 +14318,8 @@ define <vscale x 2 x float> @test_vloxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t
; CHECK-LABEL: test_vloxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -14331,8 +14331,8 @@ define <vscale x 2 x float> @test_vloxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14345,8 +14345,8 @@ define <vscale x 2 x float> @test_vloxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t
; CHECK-LABEL: test_vloxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -14358,8 +14358,8 @@ define <vscale x 2 x float> @test_vloxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14372,8 +14372,8 @@ define <vscale x 2 x float> @test_vloxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t
; CHECK-LABEL: test_vloxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -14385,8 +14385,8 @@ define <vscale x 2 x float> @test_vloxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14399,8 +14399,8 @@ define <vscale x 2 x float> @test_vloxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t
; CHECK-LABEL: test_vloxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 5)
@@ -14412,8 +14412,8 @@ define <vscale x 2 x float> @test_vloxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vloxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14426,8 +14426,8 @@ define <vscale x 1 x double> @test_vloxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2
; CHECK-LABEL: test_vloxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -14439,8 +14439,8 @@ define <vscale x 1 x double> @test_vloxseg2_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg2_mask_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -14453,8 +14453,8 @@ define <vscale x 1 x double> @test_vloxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2
; CHECK-LABEL: test_vloxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -14466,8 +14466,8 @@ define <vscale x 1 x double> @test_vloxseg2_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg2_mask_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -14480,8 +14480,8 @@ define <vscale x 1 x double> @test_vloxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2
; CHECK-LABEL: test_vloxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -14493,8 +14493,8 @@ define <vscale x 1 x double> @test_vloxseg2_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg2_mask_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -14507,8 +14507,8 @@ define <vscale x 1 x double> @test_vloxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2
; CHECK-LABEL: test_vloxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei64.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -14520,8 +14520,8 @@ define <vscale x 1 x double> @test_vloxseg2_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg2_mask_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei64.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -14750,8 +14750,8 @@ define <vscale x 1 x double> @test_vloxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3
; CHECK-LABEL: test_vloxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -14763,8 +14763,8 @@ define <vscale x 1 x double> @test_vloxseg3_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg3_mask_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -14777,8 +14777,8 @@ define <vscale x 1 x double> @test_vloxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3
; CHECK-LABEL: test_vloxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -14790,8 +14790,8 @@ define <vscale x 1 x double> @test_vloxseg3_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg3_mask_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -14804,8 +14804,8 @@ define <vscale x 1 x double> @test_vloxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3
; CHECK-LABEL: test_vloxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -14817,8 +14817,8 @@ define <vscale x 1 x double> @test_vloxseg3_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg3_mask_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -14831,8 +14831,8 @@ define <vscale x 1 x double> @test_vloxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3
; CHECK-LABEL: test_vloxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei64.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -14844,8 +14844,8 @@ define <vscale x 1 x double> @test_vloxseg3_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg3_mask_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei64.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -14939,8 +14939,8 @@ define <vscale x 2 x double> @test_vloxseg3_nxv2f64_triscv.vector.tuple_nxv16i8_
; CHECK-LABEL: test_vloxseg3_nxv2f64_triscv.vector.tuple_nxv16i8_3t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei64.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv16i8_3t.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 6)
@@ -14952,8 +14952,8 @@ define <vscale x 2 x double> @test_vloxseg3_mask_nxv2f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg3_mask_nxv2f64_triscv.vector.tuple_nxv16i8_3t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei64.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -14966,8 +14966,8 @@ define <vscale x 1 x double> @test_vloxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4
; CHECK-LABEL: test_vloxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -14979,8 +14979,8 @@ define <vscale x 1 x double> @test_vloxseg4_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg4_mask_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -14993,8 +14993,8 @@ define <vscale x 1 x double> @test_vloxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4
; CHECK-LABEL: test_vloxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -15006,8 +15006,8 @@ define <vscale x 1 x double> @test_vloxseg4_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg4_mask_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15020,8 +15020,8 @@ define <vscale x 1 x double> @test_vloxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4
; CHECK-LABEL: test_vloxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -15033,8 +15033,8 @@ define <vscale x 1 x double> @test_vloxseg4_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg4_mask_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15047,8 +15047,8 @@ define <vscale x 1 x double> @test_vloxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4
; CHECK-LABEL: test_vloxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei64.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -15060,8 +15060,8 @@ define <vscale x 1 x double> @test_vloxseg4_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg4_mask_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei64.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15155,8 +15155,8 @@ define <vscale x 2 x double> @test_vloxseg4_nxv2f64_triscv.vector.tuple_nxv16i8_
; CHECK-LABEL: test_vloxseg4_nxv2f64_triscv.vector.tuple_nxv16i8_4t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei64.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv16i8_4t.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 6)
@@ -15168,8 +15168,8 @@ define <vscale x 2 x double> @test_vloxseg4_mask_nxv2f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg4_mask_nxv2f64_triscv.vector.tuple_nxv16i8_4t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei64.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15182,8 +15182,8 @@ define <vscale x 1 x double> @test_vloxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vloxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -15195,8 +15195,8 @@ define <vscale x 1 x double> @test_vloxseg5_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg5_mask_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15209,8 +15209,8 @@ define <vscale x 1 x double> @test_vloxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vloxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -15222,8 +15222,8 @@ define <vscale x 1 x double> @test_vloxseg5_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg5_mask_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15236,8 +15236,8 @@ define <vscale x 1 x double> @test_vloxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vloxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -15249,8 +15249,8 @@ define <vscale x 1 x double> @test_vloxseg5_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg5_mask_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15263,8 +15263,8 @@ define <vscale x 1 x double> @test_vloxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vloxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -15276,8 +15276,8 @@ define <vscale x 1 x double> @test_vloxseg5_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg5_mask_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15290,8 +15290,8 @@ define <vscale x 1 x double> @test_vloxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vloxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -15303,8 +15303,8 @@ define <vscale x 1 x double> @test_vloxseg6_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg6_mask_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15317,8 +15317,8 @@ define <vscale x 1 x double> @test_vloxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vloxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -15330,8 +15330,8 @@ define <vscale x 1 x double> @test_vloxseg6_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg6_mask_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15344,8 +15344,8 @@ define <vscale x 1 x double> @test_vloxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vloxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -15357,8 +15357,8 @@ define <vscale x 1 x double> @test_vloxseg6_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg6_mask_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15371,8 +15371,8 @@ define <vscale x 1 x double> @test_vloxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vloxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -15384,8 +15384,8 @@ define <vscale x 1 x double> @test_vloxseg6_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg6_mask_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15398,8 +15398,8 @@ define <vscale x 1 x double> @test_vloxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vloxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -15411,8 +15411,8 @@ define <vscale x 1 x double> @test_vloxseg7_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg7_mask_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15425,8 +15425,8 @@ define <vscale x 1 x double> @test_vloxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vloxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -15438,8 +15438,8 @@ define <vscale x 1 x double> @test_vloxseg7_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg7_mask_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15452,8 +15452,8 @@ define <vscale x 1 x double> @test_vloxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vloxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -15465,8 +15465,8 @@ define <vscale x 1 x double> @test_vloxseg7_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg7_mask_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15479,8 +15479,8 @@ define <vscale x 1 x double> @test_vloxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vloxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -15492,8 +15492,8 @@ define <vscale x 1 x double> @test_vloxseg7_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg7_mask_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15506,8 +15506,8 @@ define <vscale x 1 x double> @test_vloxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vloxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -15519,8 +15519,8 @@ define <vscale x 1 x double> @test_vloxseg8_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg8_mask_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15533,8 +15533,8 @@ define <vscale x 1 x double> @test_vloxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vloxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -15546,8 +15546,8 @@ define <vscale x 1 x double> @test_vloxseg8_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg8_mask_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15560,8 +15560,8 @@ define <vscale x 1 x double> @test_vloxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vloxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -15573,8 +15573,8 @@ define <vscale x 1 x double> @test_vloxseg8_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg8_mask_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15587,8 +15587,8 @@ define <vscale x 1 x double> @test_vloxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vloxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -15600,8 +15600,8 @@ define <vscale x 1 x double> @test_vloxseg8_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vloxseg8_mask_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15614,8 +15614,8 @@ define <vscale x 1 x bfloat> @test_vloxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -15627,8 +15627,8 @@ define <vscale x 1 x bfloat> @test_vloxseg2_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg2_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -15641,8 +15641,8 @@ define <vscale x 1 x bfloat> @test_vloxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -15654,8 +15654,8 @@ define <vscale x 1 x bfloat> @test_vloxseg2_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg2_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -15668,8 +15668,8 @@ define <vscale x 1 x bfloat> @test_vloxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -15681,8 +15681,8 @@ define <vscale x 1 x bfloat> @test_vloxseg2_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg2_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -15695,8 +15695,8 @@ define <vscale x 1 x bfloat> @test_vloxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei64.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -15708,8 +15708,8 @@ define <vscale x 1 x bfloat> @test_vloxseg2_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg2_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg2ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei64.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -15722,8 +15722,8 @@ define <vscale x 2 x bfloat> @test_vloxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -15735,8 +15735,8 @@ define <vscale x 2 x bfloat> @test_vloxseg2_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg2_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -15749,8 +15749,8 @@ define <vscale x 2 x bfloat> @test_vloxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -15762,8 +15762,8 @@ define <vscale x 2 x bfloat> @test_vloxseg2_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg2_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -15776,8 +15776,8 @@ define <vscale x 2 x bfloat> @test_vloxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -15789,8 +15789,8 @@ define <vscale x 2 x bfloat> @test_vloxseg2_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg2_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -15830,8 +15830,8 @@ define <vscale x 4 x bfloat> @test_vloxseg2_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg2_nxv4bf16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -15843,8 +15843,8 @@ define <vscale x 4 x bfloat> @test_vloxseg2_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg2_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -15857,8 +15857,8 @@ define <vscale x 4 x bfloat> @test_vloxseg2_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg2_nxv4bf16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -15870,8 +15870,8 @@ define <vscale x 4 x bfloat> @test_vloxseg2_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg2_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vloxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vloxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16127,8 +16127,8 @@ define <vscale x 1 x bfloat> @test_vloxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -16140,8 +16140,8 @@ define <vscale x 1 x bfloat> @test_vloxseg3_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg3_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16154,8 +16154,8 @@ define <vscale x 1 x bfloat> @test_vloxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -16167,8 +16167,8 @@ define <vscale x 1 x bfloat> @test_vloxseg3_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg3_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16181,8 +16181,8 @@ define <vscale x 1 x bfloat> @test_vloxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -16194,8 +16194,8 @@ define <vscale x 1 x bfloat> @test_vloxseg3_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg3_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16208,8 +16208,8 @@ define <vscale x 1 x bfloat> @test_vloxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei64.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -16221,8 +16221,8 @@ define <vscale x 1 x bfloat> @test_vloxseg3_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg3_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg3ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei64.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16235,8 +16235,8 @@ define <vscale x 2 x bfloat> @test_vloxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -16248,8 +16248,8 @@ define <vscale x 2 x bfloat> @test_vloxseg3_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg3_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16262,8 +16262,8 @@ define <vscale x 2 x bfloat> @test_vloxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -16275,8 +16275,8 @@ define <vscale x 2 x bfloat> @test_vloxseg3_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg3_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16289,8 +16289,8 @@ define <vscale x 2 x bfloat> @test_vloxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -16302,8 +16302,8 @@ define <vscale x 2 x bfloat> @test_vloxseg3_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg3_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16343,8 +16343,8 @@ define <vscale x 4 x bfloat> @test_vloxseg3_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg3_nxv4bf16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -16356,8 +16356,8 @@ define <vscale x 4 x bfloat> @test_vloxseg3_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg3_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16370,8 +16370,8 @@ define <vscale x 4 x bfloat> @test_vloxseg3_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg3_nxv4bf16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -16383,8 +16383,8 @@ define <vscale x 4 x bfloat> @test_vloxseg3_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg3_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vloxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16478,8 +16478,8 @@ define <vscale x 8 x bfloat> @test_vloxseg3_nxv8bf16_triscv.vector.tuple_nxv16i8
; CHECK-LABEL: test_vloxseg3_nxv8bf16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei16.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.triscv.vector.tuple_nxv16i8_3t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 4)
@@ -16491,8 +16491,8 @@ define <vscale x 8 x bfloat> @test_vloxseg3_mask_nxv8bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg3_mask_nxv8bf16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg3ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg3ei16.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vloxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16559,8 +16559,8 @@ define <vscale x 1 x bfloat> @test_vloxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -16572,8 +16572,8 @@ define <vscale x 1 x bfloat> @test_vloxseg4_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg4_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16586,8 +16586,8 @@ define <vscale x 1 x bfloat> @test_vloxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -16599,8 +16599,8 @@ define <vscale x 1 x bfloat> @test_vloxseg4_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg4_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16613,8 +16613,8 @@ define <vscale x 1 x bfloat> @test_vloxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -16626,8 +16626,8 @@ define <vscale x 1 x bfloat> @test_vloxseg4_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg4_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16640,8 +16640,8 @@ define <vscale x 1 x bfloat> @test_vloxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei64.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -16653,8 +16653,8 @@ define <vscale x 1 x bfloat> @test_vloxseg4_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg4_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg4ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei64.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16667,8 +16667,8 @@ define <vscale x 2 x bfloat> @test_vloxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -16680,8 +16680,8 @@ define <vscale x 2 x bfloat> @test_vloxseg4_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg4_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16694,8 +16694,8 @@ define <vscale x 2 x bfloat> @test_vloxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -16707,8 +16707,8 @@ define <vscale x 2 x bfloat> @test_vloxseg4_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg4_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16721,8 +16721,8 @@ define <vscale x 2 x bfloat> @test_vloxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -16734,8 +16734,8 @@ define <vscale x 2 x bfloat> @test_vloxseg4_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg4_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16775,8 +16775,8 @@ define <vscale x 4 x bfloat> @test_vloxseg4_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg4_nxv4bf16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -16788,8 +16788,8 @@ define <vscale x 4 x bfloat> @test_vloxseg4_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg4_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16802,8 +16802,8 @@ define <vscale x 4 x bfloat> @test_vloxseg4_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg4_nxv4bf16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -16815,8 +16815,8 @@ define <vscale x 4 x bfloat> @test_vloxseg4_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg4_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vloxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16910,8 +16910,8 @@ define <vscale x 8 x bfloat> @test_vloxseg4_nxv8bf16_triscv.vector.tuple_nxv16i8
; CHECK-LABEL: test_vloxseg4_nxv8bf16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei16.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv16i8_4t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 4)
@@ -16923,8 +16923,8 @@ define <vscale x 8 x bfloat> @test_vloxseg4_mask_nxv8bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg4_mask_nxv8bf16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vloxseg4ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg4ei16.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16991,8 +16991,8 @@ define <vscale x 1 x bfloat> @test_vloxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -17004,8 +17004,8 @@ define <vscale x 1 x bfloat> @test_vloxseg5_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17018,8 +17018,8 @@ define <vscale x 1 x bfloat> @test_vloxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -17031,8 +17031,8 @@ define <vscale x 1 x bfloat> @test_vloxseg5_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17045,8 +17045,8 @@ define <vscale x 1 x bfloat> @test_vloxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -17058,8 +17058,8 @@ define <vscale x 1 x bfloat> @test_vloxseg5_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17072,8 +17072,8 @@ define <vscale x 1 x bfloat> @test_vloxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -17085,8 +17085,8 @@ define <vscale x 1 x bfloat> @test_vloxseg5_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17099,8 +17099,8 @@ define <vscale x 2 x bfloat> @test_vloxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -17112,8 +17112,8 @@ define <vscale x 2 x bfloat> @test_vloxseg5_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17126,8 +17126,8 @@ define <vscale x 2 x bfloat> @test_vloxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -17139,8 +17139,8 @@ define <vscale x 2 x bfloat> @test_vloxseg5_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17153,8 +17153,8 @@ define <vscale x 2 x bfloat> @test_vloxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -17166,8 +17166,8 @@ define <vscale x 2 x bfloat> @test_vloxseg5_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17180,8 +17180,8 @@ define <vscale x 2 x bfloat> @test_vloxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -17193,8 +17193,8 @@ define <vscale x 2 x bfloat> @test_vloxseg5_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg5ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17207,8 +17207,8 @@ define <vscale x 4 x bfloat> @test_vloxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -17220,8 +17220,8 @@ define <vscale x 4 x bfloat> @test_vloxseg5_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17234,8 +17234,8 @@ define <vscale x 4 x bfloat> @test_vloxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -17247,8 +17247,8 @@ define <vscale x 4 x bfloat> @test_vloxseg5_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vloxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17261,8 +17261,8 @@ define <vscale x 4 x bfloat> @test_vloxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -17274,8 +17274,8 @@ define <vscale x 4 x bfloat> @test_vloxseg5_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg5_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg5ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vloxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vloxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17315,8 +17315,8 @@ define <vscale x 1 x bfloat> @test_vloxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -17328,8 +17328,8 @@ define <vscale x 1 x bfloat> @test_vloxseg6_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17342,8 +17342,8 @@ define <vscale x 1 x bfloat> @test_vloxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -17355,8 +17355,8 @@ define <vscale x 1 x bfloat> @test_vloxseg6_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17369,8 +17369,8 @@ define <vscale x 1 x bfloat> @test_vloxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -17382,8 +17382,8 @@ define <vscale x 1 x bfloat> @test_vloxseg6_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17396,8 +17396,8 @@ define <vscale x 1 x bfloat> @test_vloxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -17409,8 +17409,8 @@ define <vscale x 1 x bfloat> @test_vloxseg6_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17423,8 +17423,8 @@ define <vscale x 2 x bfloat> @test_vloxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -17436,8 +17436,8 @@ define <vscale x 2 x bfloat> @test_vloxseg6_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17450,8 +17450,8 @@ define <vscale x 2 x bfloat> @test_vloxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -17463,8 +17463,8 @@ define <vscale x 2 x bfloat> @test_vloxseg6_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17477,8 +17477,8 @@ define <vscale x 2 x bfloat> @test_vloxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -17490,8 +17490,8 @@ define <vscale x 2 x bfloat> @test_vloxseg6_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17504,8 +17504,8 @@ define <vscale x 2 x bfloat> @test_vloxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -17517,8 +17517,8 @@ define <vscale x 2 x bfloat> @test_vloxseg6_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg6ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17531,8 +17531,8 @@ define <vscale x 4 x bfloat> @test_vloxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -17544,8 +17544,8 @@ define <vscale x 4 x bfloat> @test_vloxseg6_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17558,8 +17558,8 @@ define <vscale x 4 x bfloat> @test_vloxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -17571,8 +17571,8 @@ define <vscale x 4 x bfloat> @test_vloxseg6_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vloxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17585,8 +17585,8 @@ define <vscale x 4 x bfloat> @test_vloxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -17598,8 +17598,8 @@ define <vscale x 4 x bfloat> @test_vloxseg6_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg6_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg6ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg6ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vloxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17639,8 +17639,8 @@ define <vscale x 1 x bfloat> @test_vloxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -17652,8 +17652,8 @@ define <vscale x 1 x bfloat> @test_vloxseg7_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17666,8 +17666,8 @@ define <vscale x 1 x bfloat> @test_vloxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -17679,8 +17679,8 @@ define <vscale x 1 x bfloat> @test_vloxseg7_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17693,8 +17693,8 @@ define <vscale x 1 x bfloat> @test_vloxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -17706,8 +17706,8 @@ define <vscale x 1 x bfloat> @test_vloxseg7_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17720,8 +17720,8 @@ define <vscale x 1 x bfloat> @test_vloxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -17733,8 +17733,8 @@ define <vscale x 1 x bfloat> @test_vloxseg7_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17747,8 +17747,8 @@ define <vscale x 2 x bfloat> @test_vloxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -17760,8 +17760,8 @@ define <vscale x 2 x bfloat> @test_vloxseg7_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17774,8 +17774,8 @@ define <vscale x 2 x bfloat> @test_vloxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -17787,8 +17787,8 @@ define <vscale x 2 x bfloat> @test_vloxseg7_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17801,8 +17801,8 @@ define <vscale x 2 x bfloat> @test_vloxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -17814,8 +17814,8 @@ define <vscale x 2 x bfloat> @test_vloxseg7_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17828,8 +17828,8 @@ define <vscale x 2 x bfloat> @test_vloxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -17841,8 +17841,8 @@ define <vscale x 2 x bfloat> @test_vloxseg7_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg7ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17855,8 +17855,8 @@ define <vscale x 4 x bfloat> @test_vloxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -17868,8 +17868,8 @@ define <vscale x 4 x bfloat> @test_vloxseg7_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17882,8 +17882,8 @@ define <vscale x 4 x bfloat> @test_vloxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -17895,8 +17895,8 @@ define <vscale x 4 x bfloat> @test_vloxseg7_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vloxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17909,8 +17909,8 @@ define <vscale x 4 x bfloat> @test_vloxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -17922,8 +17922,8 @@ define <vscale x 4 x bfloat> @test_vloxseg7_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg7_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg7ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vloxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vloxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17963,8 +17963,8 @@ define <vscale x 1 x bfloat> @test_vloxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -17976,8 +17976,8 @@ define <vscale x 1 x bfloat> @test_vloxseg8_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17990,8 +17990,8 @@ define <vscale x 1 x bfloat> @test_vloxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -18003,8 +18003,8 @@ define <vscale x 1 x bfloat> @test_vloxseg8_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18017,8 +18017,8 @@ define <vscale x 1 x bfloat> @test_vloxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -18030,8 +18030,8 @@ define <vscale x 1 x bfloat> @test_vloxseg8_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18044,8 +18044,8 @@ define <vscale x 1 x bfloat> @test_vloxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vloxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -18057,8 +18057,8 @@ define <vscale x 1 x bfloat> @test_vloxseg8_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18071,8 +18071,8 @@ define <vscale x 2 x bfloat> @test_vloxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -18084,8 +18084,8 @@ define <vscale x 2 x bfloat> @test_vloxseg8_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18098,8 +18098,8 @@ define <vscale x 2 x bfloat> @test_vloxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -18111,8 +18111,8 @@ define <vscale x 2 x bfloat> @test_vloxseg8_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18125,8 +18125,8 @@ define <vscale x 2 x bfloat> @test_vloxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -18138,8 +18138,8 @@ define <vscale x 2 x bfloat> @test_vloxseg8_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18152,8 +18152,8 @@ define <vscale x 2 x bfloat> @test_vloxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vloxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -18165,8 +18165,8 @@ define <vscale x 2 x bfloat> @test_vloxseg8_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vloxseg8ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei64.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18179,8 +18179,8 @@ define <vscale x 4 x bfloat> @test_vloxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -18192,8 +18192,8 @@ define <vscale x 4 x bfloat> @test_vloxseg8_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18206,8 +18206,8 @@ define <vscale x 4 x bfloat> @test_vloxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -18219,8 +18219,8 @@ define <vscale x 4 x bfloat> @test_vloxseg8_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vloxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18233,8 +18233,8 @@ define <vscale x 4 x bfloat> @test_vloxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vloxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -18246,8 +18246,8 @@ define <vscale x 4 x bfloat> @test_vloxseg8_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vloxseg8_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vloxseg8ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vloxseg8ei32.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vloxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
diff --git a/llvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll b/llvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll
index 782b9d50dcebd..0c9aa28d3b137 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll
@@ -9,8 +9,8 @@ define <vscale x 1 x i8> @test_vluxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv
; CHECK-LABEL: test_vluxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv1i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 3)
@@ -22,8 +22,8 @@ define <vscale x 1 x i8> @test_vluxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2
; CHECK-LABEL: test_vluxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -38,8 +38,8 @@ define <vscale x 1 x i8> @test_vluxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv
; CHECK-LABEL: test_vluxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv1i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 3)
@@ -51,8 +51,8 @@ define <vscale x 1 x i8> @test_vluxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2
; CHECK-LABEL: test_vluxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -67,8 +67,8 @@ define <vscale x 1 x i8> @test_vluxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv
; CHECK-LABEL: test_vluxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv1i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 3)
@@ -80,8 +80,8 @@ define <vscale x 1 x i8> @test_vluxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2
; CHECK-LABEL: test_vluxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -96,8 +96,8 @@ define <vscale x 2 x i8> @test_vluxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv
; CHECK-LABEL: test_vluxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 3)
@@ -109,8 +109,8 @@ define <vscale x 2 x i8> @test_vluxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2
; CHECK-LABEL: test_vluxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -125,8 +125,8 @@ define <vscale x 2 x i8> @test_vluxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv
; CHECK-LABEL: test_vluxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 3)
@@ -138,8 +138,8 @@ define <vscale x 2 x i8> @test_vluxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2
; CHECK-LABEL: test_vluxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -154,8 +154,8 @@ define <vscale x 2 x i8> @test_vluxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv
; CHECK-LABEL: test_vluxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 3)
@@ -167,8 +167,8 @@ define <vscale x 2 x i8> @test_vluxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2
; CHECK-LABEL: test_vluxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -183,8 +183,8 @@ define <vscale x 4 x i8> @test_vluxseg2_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv
; CHECK-LABEL: test_vluxseg2_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 3)
@@ -196,8 +196,8 @@ define <vscale x 4 x i8> @test_vluxseg2_mask_nxv4i8_triscv.vector.tuple_nxv4i8_2
; CHECK-LABEL: test_vluxseg2_mask_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -212,8 +212,8 @@ define <vscale x 4 x i8> @test_vluxseg2_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv
; CHECK-LABEL: test_vluxseg2_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 3)
@@ -225,8 +225,8 @@ define <vscale x 4 x i8> @test_vluxseg2_mask_nxv4i8_triscv.vector.tuple_nxv4i8_2
; CHECK-LABEL: test_vluxseg2_mask_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -270,8 +270,8 @@ define <vscale x 8 x i8> @test_vluxseg2_nxv8i8_triscv.vector.tuple_nxv8i8_2t_nxv
; CHECK-LABEL: test_vluxseg2_nxv8i8_triscv.vector.tuple_nxv8i8_2t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 8 x i8> %index, i32 %vl, i32 3)
@@ -283,8 +283,8 @@ define <vscale x 8 x i8> @test_vluxseg2_mask_nxv8i8_triscv.vector.tuple_nxv8i8_2
; CHECK-LABEL: test_vluxseg2_mask_nxv8i8_triscv.vector.tuple_nxv8i8_2t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -502,8 +502,8 @@ define <vscale x 1 x i8> @test_vluxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv
; CHECK-LABEL: test_vluxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv1i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 3)
@@ -515,8 +515,8 @@ define <vscale x 1 x i8> @test_vluxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3
; CHECK-LABEL: test_vluxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv1i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -531,8 +531,8 @@ define <vscale x 1 x i8> @test_vluxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv
; CHECK-LABEL: test_vluxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv1i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 3)
@@ -544,8 +544,8 @@ define <vscale x 1 x i8> @test_vluxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3
; CHECK-LABEL: test_vluxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv1i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -560,8 +560,8 @@ define <vscale x 1 x i8> @test_vluxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv
; CHECK-LABEL: test_vluxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv1i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 3)
@@ -573,8 +573,8 @@ define <vscale x 1 x i8> @test_vluxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3
; CHECK-LABEL: test_vluxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv1i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -589,8 +589,8 @@ define <vscale x 2 x i8> @test_vluxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv
; CHECK-LABEL: test_vluxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 3)
@@ -602,8 +602,8 @@ define <vscale x 2 x i8> @test_vluxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3
; CHECK-LABEL: test_vluxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -618,8 +618,8 @@ define <vscale x 2 x i8> @test_vluxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv
; CHECK-LABEL: test_vluxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 3)
@@ -631,8 +631,8 @@ define <vscale x 2 x i8> @test_vluxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3
; CHECK-LABEL: test_vluxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -647,8 +647,8 @@ define <vscale x 2 x i8> @test_vluxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv
; CHECK-LABEL: test_vluxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 3)
@@ -660,8 +660,8 @@ define <vscale x 2 x i8> @test_vluxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3
; CHECK-LABEL: test_vluxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -676,8 +676,8 @@ define <vscale x 4 x i8> @test_vluxseg3_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv
; CHECK-LABEL: test_vluxseg3_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 3)
@@ -689,8 +689,8 @@ define <vscale x 4 x i8> @test_vluxseg3_mask_nxv4i8_triscv.vector.tuple_nxv4i8_3
; CHECK-LABEL: test_vluxseg3_mask_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -705,8 +705,8 @@ define <vscale x 4 x i8> @test_vluxseg3_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv
; CHECK-LABEL: test_vluxseg3_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 3)
@@ -718,8 +718,8 @@ define <vscale x 4 x i8> @test_vluxseg3_mask_nxv4i8_triscv.vector.tuple_nxv4i8_3
; CHECK-LABEL: test_vluxseg3_mask_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -763,8 +763,8 @@ define <vscale x 8 x i8> @test_vluxseg3_nxv8i8_triscv.vector.tuple_nxv8i8_3t_nxv
; CHECK-LABEL: test_vluxseg3_nxv8i8_triscv.vector.tuple_nxv8i8_3t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 8 x i8> %index, i32 %vl, i32 3)
@@ -776,8 +776,8 @@ define <vscale x 8 x i8> @test_vluxseg3_mask_nxv8i8_triscv.vector.tuple_nxv8i8_3
; CHECK-LABEL: test_vluxseg3_mask_nxv8i8_triscv.vector.tuple_nxv8i8_3t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -850,8 +850,8 @@ define <vscale x 16 x i8> @test_vluxseg3_nxv16i8_triscv.vector.tuple_nxv16i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv16i8_triscv.vector.tuple_nxv16i8_3t_nxv16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei8.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv16i8_3t.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 16 x i8> %index, i32 %vl, i32 3)
@@ -863,8 +863,8 @@ define <vscale x 16 x i8> @test_vluxseg3_mask_nxv16i8_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vluxseg3_mask_nxv16i8_triscv.vector.tuple_nxv16i8_3t_nxv16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei8.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv16i1.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 16 x i8> %index, <vscale x 16 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -937,8 +937,8 @@ define <vscale x 1 x i8> @test_vluxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv
; CHECK-LABEL: test_vluxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv1i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 3)
@@ -950,8 +950,8 @@ define <vscale x 1 x i8> @test_vluxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4
; CHECK-LABEL: test_vluxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -966,8 +966,8 @@ define <vscale x 1 x i8> @test_vluxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv
; CHECK-LABEL: test_vluxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv1i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 3)
@@ -979,8 +979,8 @@ define <vscale x 1 x i8> @test_vluxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4
; CHECK-LABEL: test_vluxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -995,8 +995,8 @@ define <vscale x 1 x i8> @test_vluxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv
; CHECK-LABEL: test_vluxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv1i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 3)
@@ -1008,8 +1008,8 @@ define <vscale x 1 x i8> @test_vluxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4
; CHECK-LABEL: test_vluxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1024,8 +1024,8 @@ define <vscale x 2 x i8> @test_vluxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv
; CHECK-LABEL: test_vluxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 3)
@@ -1037,8 +1037,8 @@ define <vscale x 2 x i8> @test_vluxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4
; CHECK-LABEL: test_vluxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1053,8 +1053,8 @@ define <vscale x 2 x i8> @test_vluxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv
; CHECK-LABEL: test_vluxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 3)
@@ -1066,8 +1066,8 @@ define <vscale x 2 x i8> @test_vluxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4
; CHECK-LABEL: test_vluxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1082,8 +1082,8 @@ define <vscale x 2 x i8> @test_vluxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv
; CHECK-LABEL: test_vluxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 3)
@@ -1095,8 +1095,8 @@ define <vscale x 2 x i8> @test_vluxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4
; CHECK-LABEL: test_vluxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1111,8 +1111,8 @@ define <vscale x 4 x i8> @test_vluxseg4_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv
; CHECK-LABEL: test_vluxseg4_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 3)
@@ -1124,8 +1124,8 @@ define <vscale x 4 x i8> @test_vluxseg4_mask_nxv4i8_triscv.vector.tuple_nxv4i8_4
; CHECK-LABEL: test_vluxseg4_mask_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1140,8 +1140,8 @@ define <vscale x 4 x i8> @test_vluxseg4_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv
; CHECK-LABEL: test_vluxseg4_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 3)
@@ -1153,8 +1153,8 @@ define <vscale x 4 x i8> @test_vluxseg4_mask_nxv4i8_triscv.vector.tuple_nxv4i8_4
; CHECK-LABEL: test_vluxseg4_mask_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1198,8 +1198,8 @@ define <vscale x 8 x i8> @test_vluxseg4_nxv8i8_triscv.vector.tuple_nxv8i8_4t_nxv
; CHECK-LABEL: test_vluxseg4_nxv8i8_triscv.vector.tuple_nxv8i8_4t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 8 x i8> %index, i32 %vl, i32 3)
@@ -1211,8 +1211,8 @@ define <vscale x 8 x i8> @test_vluxseg4_mask_nxv8i8_triscv.vector.tuple_nxv8i8_4
; CHECK-LABEL: test_vluxseg4_mask_nxv8i8_triscv.vector.tuple_nxv8i8_4t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1285,8 +1285,8 @@ define <vscale x 16 x i8> @test_vluxseg4_nxv16i8_triscv.vector.tuple_nxv16i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv16i8_triscv.vector.tuple_nxv16i8_4t_nxv16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei8.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv16i8_4t.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 16 x i8> %index, i32 %vl, i32 3)
@@ -1298,8 +1298,8 @@ define <vscale x 16 x i8> @test_vluxseg4_mask_nxv16i8_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vluxseg4_mask_nxv16i8_triscv.vector.tuple_nxv16i8_4t_nxv16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei8.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv16i1.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 16 x i8> %index, <vscale x 16 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1372,8 +1372,8 @@ define <vscale x 1 x i8> @test_vluxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv1i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 3)
@@ -1385,8 +1385,8 @@ define <vscale x 1 x i8> @test_vluxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1401,8 +1401,8 @@ define <vscale x 1 x i8> @test_vluxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv1i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 3)
@@ -1414,8 +1414,8 @@ define <vscale x 1 x i8> @test_vluxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1430,8 +1430,8 @@ define <vscale x 1 x i8> @test_vluxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv1i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 3)
@@ -1443,8 +1443,8 @@ define <vscale x 1 x i8> @test_vluxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1459,8 +1459,8 @@ define <vscale x 2 x i8> @test_vluxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 3)
@@ -1472,8 +1472,8 @@ define <vscale x 2 x i8> @test_vluxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1488,8 +1488,8 @@ define <vscale x 2 x i8> @test_vluxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 3)
@@ -1501,8 +1501,8 @@ define <vscale x 2 x i8> @test_vluxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1517,8 +1517,8 @@ define <vscale x 2 x i8> @test_vluxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 3)
@@ -1530,8 +1530,8 @@ define <vscale x 2 x i8> @test_vluxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1546,8 +1546,8 @@ define <vscale x 4 x i8> @test_vluxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 3)
@@ -1559,8 +1559,8 @@ define <vscale x 4 x i8> @test_vluxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1575,8 +1575,8 @@ define <vscale x 4 x i8> @test_vluxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 3)
@@ -1588,8 +1588,8 @@ define <vscale x 4 x i8> @test_vluxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1604,8 +1604,8 @@ define <vscale x 4 x i8> @test_vluxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 3)
@@ -1617,8 +1617,8 @@ define <vscale x 4 x i8> @test_vluxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1633,8 +1633,8 @@ define <vscale x 8 x i8> @test_vluxseg5_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 8 x i8> %index, i32 %vl, i32 3)
@@ -1646,8 +1646,8 @@ define <vscale x 8 x i8> @test_vluxseg5_mask_nxv8i8_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1662,8 +1662,8 @@ define <vscale x 8 x i8> @test_vluxseg5_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 3)
@@ -1675,8 +1675,8 @@ define <vscale x 8 x i8> @test_vluxseg5_mask_nxv8i8_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1720,8 +1720,8 @@ define <vscale x 1 x i8> @test_vluxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv1i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 3)
@@ -1733,8 +1733,8 @@ define <vscale x 1 x i8> @test_vluxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1749,8 +1749,8 @@ define <vscale x 1 x i8> @test_vluxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv1i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 3)
@@ -1762,8 +1762,8 @@ define <vscale x 1 x i8> @test_vluxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1778,8 +1778,8 @@ define <vscale x 1 x i8> @test_vluxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv1i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 3)
@@ -1791,8 +1791,8 @@ define <vscale x 1 x i8> @test_vluxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1807,8 +1807,8 @@ define <vscale x 2 x i8> @test_vluxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 3)
@@ -1820,8 +1820,8 @@ define <vscale x 2 x i8> @test_vluxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1836,8 +1836,8 @@ define <vscale x 2 x i8> @test_vluxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 3)
@@ -1849,8 +1849,8 @@ define <vscale x 2 x i8> @test_vluxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1865,8 +1865,8 @@ define <vscale x 2 x i8> @test_vluxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 3)
@@ -1878,8 +1878,8 @@ define <vscale x 2 x i8> @test_vluxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1894,8 +1894,8 @@ define <vscale x 4 x i8> @test_vluxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 3)
@@ -1907,8 +1907,8 @@ define <vscale x 4 x i8> @test_vluxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1923,8 +1923,8 @@ define <vscale x 4 x i8> @test_vluxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 3)
@@ -1936,8 +1936,8 @@ define <vscale x 4 x i8> @test_vluxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1952,8 +1952,8 @@ define <vscale x 4 x i8> @test_vluxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 3)
@@ -1965,8 +1965,8 @@ define <vscale x 4 x i8> @test_vluxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -1981,8 +1981,8 @@ define <vscale x 8 x i8> @test_vluxseg6_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 8 x i8> %index, i32 %vl, i32 3)
@@ -1994,8 +1994,8 @@ define <vscale x 8 x i8> @test_vluxseg6_mask_nxv8i8_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2010,8 +2010,8 @@ define <vscale x 8 x i8> @test_vluxseg6_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 3)
@@ -2023,8 +2023,8 @@ define <vscale x 8 x i8> @test_vluxseg6_mask_nxv8i8_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2068,8 +2068,8 @@ define <vscale x 1 x i8> @test_vluxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv1i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 3)
@@ -2081,8 +2081,8 @@ define <vscale x 1 x i8> @test_vluxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2097,8 +2097,8 @@ define <vscale x 1 x i8> @test_vluxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv1i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 3)
@@ -2110,8 +2110,8 @@ define <vscale x 1 x i8> @test_vluxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2126,8 +2126,8 @@ define <vscale x 1 x i8> @test_vluxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv1i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 3)
@@ -2139,8 +2139,8 @@ define <vscale x 1 x i8> @test_vluxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2155,8 +2155,8 @@ define <vscale x 2 x i8> @test_vluxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 3)
@@ -2168,8 +2168,8 @@ define <vscale x 2 x i8> @test_vluxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2184,8 +2184,8 @@ define <vscale x 2 x i8> @test_vluxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 3)
@@ -2197,8 +2197,8 @@ define <vscale x 2 x i8> @test_vluxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2213,8 +2213,8 @@ define <vscale x 2 x i8> @test_vluxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 3)
@@ -2226,8 +2226,8 @@ define <vscale x 2 x i8> @test_vluxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2242,8 +2242,8 @@ define <vscale x 4 x i8> @test_vluxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 3)
@@ -2255,8 +2255,8 @@ define <vscale x 4 x i8> @test_vluxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2271,8 +2271,8 @@ define <vscale x 4 x i8> @test_vluxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 3)
@@ -2284,8 +2284,8 @@ define <vscale x 4 x i8> @test_vluxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2300,8 +2300,8 @@ define <vscale x 4 x i8> @test_vluxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 3)
@@ -2313,8 +2313,8 @@ define <vscale x 4 x i8> @test_vluxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2329,8 +2329,8 @@ define <vscale x 8 x i8> @test_vluxseg7_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 8 x i8> %index, i32 %vl, i32 3)
@@ -2342,8 +2342,8 @@ define <vscale x 8 x i8> @test_vluxseg7_mask_nxv8i8_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2358,8 +2358,8 @@ define <vscale x 8 x i8> @test_vluxseg7_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 3)
@@ -2371,8 +2371,8 @@ define <vscale x 8 x i8> @test_vluxseg7_mask_nxv8i8_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2416,8 +2416,8 @@ define <vscale x 1 x i8> @test_vluxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv1i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 3)
@@ -2429,8 +2429,8 @@ define <vscale x 1 x i8> @test_vluxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2445,8 +2445,8 @@ define <vscale x 1 x i8> @test_vluxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv1i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 3)
@@ -2458,8 +2458,8 @@ define <vscale x 1 x i8> @test_vluxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2474,8 +2474,8 @@ define <vscale x 1 x i8> @test_vluxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv1i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 3)
@@ -2487,8 +2487,8 @@ define <vscale x 1 x i8> @test_vluxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2503,8 +2503,8 @@ define <vscale x 2 x i8> @test_vluxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 3)
@@ -2516,8 +2516,8 @@ define <vscale x 2 x i8> @test_vluxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2532,8 +2532,8 @@ define <vscale x 2 x i8> @test_vluxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 3)
@@ -2545,8 +2545,8 @@ define <vscale x 2 x i8> @test_vluxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2561,8 +2561,8 @@ define <vscale x 2 x i8> @test_vluxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 3)
@@ -2574,8 +2574,8 @@ define <vscale x 2 x i8> @test_vluxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2590,8 +2590,8 @@ define <vscale x 4 x i8> @test_vluxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 3)
@@ -2603,8 +2603,8 @@ define <vscale x 4 x i8> @test_vluxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2619,8 +2619,8 @@ define <vscale x 4 x i8> @test_vluxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 3)
@@ -2632,8 +2632,8 @@ define <vscale x 4 x i8> @test_vluxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2648,8 +2648,8 @@ define <vscale x 4 x i8> @test_vluxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 3)
@@ -2661,8 +2661,8 @@ define <vscale x 4 x i8> @test_vluxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2677,8 +2677,8 @@ define <vscale x 8 x i8> @test_vluxseg8_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 8 x i8> %index, i32 %vl, i32 3)
@@ -2690,8 +2690,8 @@ define <vscale x 8 x i8> @test_vluxseg8_mask_nxv8i8_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2706,8 +2706,8 @@ define <vscale x 8 x i8> @test_vluxseg8_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 3)
@@ -2719,8 +2719,8 @@ define <vscale x 8 x i8> @test_vluxseg8_mask_nxv8i8_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 3)
@@ -2764,8 +2764,8 @@ define <vscale x 1 x i16> @test_vluxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -2777,8 +2777,8 @@ define <vscale x 1 x i16> @test_vluxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -2793,8 +2793,8 @@ define <vscale x 1 x i16> @test_vluxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -2806,8 +2806,8 @@ define <vscale x 1 x i16> @test_vluxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -2822,8 +2822,8 @@ define <vscale x 1 x i16> @test_vluxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -2835,8 +2835,8 @@ define <vscale x 1 x i16> @test_vluxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -2851,8 +2851,8 @@ define <vscale x 2 x i16> @test_vluxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -2864,8 +2864,8 @@ define <vscale x 2 x i16> @test_vluxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -2880,8 +2880,8 @@ define <vscale x 2 x i16> @test_vluxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -2893,8 +2893,8 @@ define <vscale x 2 x i16> @test_vluxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -2909,8 +2909,8 @@ define <vscale x 2 x i16> @test_vluxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -2922,8 +2922,8 @@ define <vscale x 2 x i16> @test_vluxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -2938,8 +2938,8 @@ define <vscale x 4 x i16> @test_vluxseg2_nxv4i16_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv4i16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -2951,8 +2951,8 @@ define <vscale x 4 x i16> @test_vluxseg2_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg2_mask_nxv4i16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -2967,8 +2967,8 @@ define <vscale x 4 x i16> @test_vluxseg2_nxv4i16_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv4i16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -2980,8 +2980,8 @@ define <vscale x 4 x i16> @test_vluxseg2_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg2_mask_nxv4i16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3199,8 +3199,8 @@ define <vscale x 1 x i16> @test_vluxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -3212,8 +3212,8 @@ define <vscale x 1 x i16> @test_vluxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3228,8 +3228,8 @@ define <vscale x 1 x i16> @test_vluxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -3241,8 +3241,8 @@ define <vscale x 1 x i16> @test_vluxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3257,8 +3257,8 @@ define <vscale x 1 x i16> @test_vluxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -3270,8 +3270,8 @@ define <vscale x 1 x i16> @test_vluxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3286,8 +3286,8 @@ define <vscale x 2 x i16> @test_vluxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -3299,8 +3299,8 @@ define <vscale x 2 x i16> @test_vluxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3315,8 +3315,8 @@ define <vscale x 2 x i16> @test_vluxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -3328,8 +3328,8 @@ define <vscale x 2 x i16> @test_vluxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3344,8 +3344,8 @@ define <vscale x 2 x i16> @test_vluxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -3357,8 +3357,8 @@ define <vscale x 2 x i16> @test_vluxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3373,8 +3373,8 @@ define <vscale x 4 x i16> @test_vluxseg3_nxv4i16_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv4i16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -3386,8 +3386,8 @@ define <vscale x 4 x i16> @test_vluxseg3_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg3_mask_nxv4i16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3402,8 +3402,8 @@ define <vscale x 4 x i16> @test_vluxseg3_nxv4i16_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv4i16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -3415,8 +3415,8 @@ define <vscale x 4 x i16> @test_vluxseg3_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg3_mask_nxv4i16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3489,8 +3489,8 @@ define <vscale x 8 x i16> @test_vluxseg3_nxv8i16_triscv.vector.tuple_nxv16i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv8i16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei16.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv16i8_3t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 4)
@@ -3502,8 +3502,8 @@ define <vscale x 8 x i16> @test_vluxseg3_mask_nxv8i16_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vluxseg3_mask_nxv8i16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei16.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3547,8 +3547,8 @@ define <vscale x 1 x i16> @test_vluxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -3560,8 +3560,8 @@ define <vscale x 1 x i16> @test_vluxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3576,8 +3576,8 @@ define <vscale x 1 x i16> @test_vluxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -3589,8 +3589,8 @@ define <vscale x 1 x i16> @test_vluxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3605,8 +3605,8 @@ define <vscale x 1 x i16> @test_vluxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -3618,8 +3618,8 @@ define <vscale x 1 x i16> @test_vluxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3634,8 +3634,8 @@ define <vscale x 2 x i16> @test_vluxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -3647,8 +3647,8 @@ define <vscale x 2 x i16> @test_vluxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3663,8 +3663,8 @@ define <vscale x 2 x i16> @test_vluxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -3676,8 +3676,8 @@ define <vscale x 2 x i16> @test_vluxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3692,8 +3692,8 @@ define <vscale x 2 x i16> @test_vluxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -3705,8 +3705,8 @@ define <vscale x 2 x i16> @test_vluxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3721,8 +3721,8 @@ define <vscale x 4 x i16> @test_vluxseg4_nxv4i16_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv4i16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -3734,8 +3734,8 @@ define <vscale x 4 x i16> @test_vluxseg4_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg4_mask_nxv4i16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3750,8 +3750,8 @@ define <vscale x 4 x i16> @test_vluxseg4_nxv4i16_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv4i16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -3763,8 +3763,8 @@ define <vscale x 4 x i16> @test_vluxseg4_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg4_mask_nxv4i16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3837,8 +3837,8 @@ define <vscale x 8 x i16> @test_vluxseg4_nxv8i16_triscv.vector.tuple_nxv16i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv8i16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei16.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv16i8_4t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 4)
@@ -3850,8 +3850,8 @@ define <vscale x 8 x i16> @test_vluxseg4_mask_nxv8i16_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vluxseg4_mask_nxv8i16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei16.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3895,8 +3895,8 @@ define <vscale x 1 x i16> @test_vluxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -3908,8 +3908,8 @@ define <vscale x 1 x i16> @test_vluxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3924,8 +3924,8 @@ define <vscale x 1 x i16> @test_vluxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -3937,8 +3937,8 @@ define <vscale x 1 x i16> @test_vluxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3953,8 +3953,8 @@ define <vscale x 1 x i16> @test_vluxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -3966,8 +3966,8 @@ define <vscale x 1 x i16> @test_vluxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -3982,8 +3982,8 @@ define <vscale x 2 x i16> @test_vluxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -3995,8 +3995,8 @@ define <vscale x 2 x i16> @test_vluxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4011,8 +4011,8 @@ define <vscale x 2 x i16> @test_vluxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -4024,8 +4024,8 @@ define <vscale x 2 x i16> @test_vluxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4040,8 +4040,8 @@ define <vscale x 2 x i16> @test_vluxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -4053,8 +4053,8 @@ define <vscale x 2 x i16> @test_vluxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4069,8 +4069,8 @@ define <vscale x 4 x i16> @test_vluxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -4082,8 +4082,8 @@ define <vscale x 4 x i16> @test_vluxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4098,8 +4098,8 @@ define <vscale x 4 x i16> @test_vluxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -4111,8 +4111,8 @@ define <vscale x 4 x i16> @test_vluxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4127,8 +4127,8 @@ define <vscale x 4 x i16> @test_vluxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -4140,8 +4140,8 @@ define <vscale x 4 x i16> @test_vluxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4156,8 +4156,8 @@ define <vscale x 1 x i16> @test_vluxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -4169,8 +4169,8 @@ define <vscale x 1 x i16> @test_vluxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4185,8 +4185,8 @@ define <vscale x 1 x i16> @test_vluxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -4198,8 +4198,8 @@ define <vscale x 1 x i16> @test_vluxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4214,8 +4214,8 @@ define <vscale x 1 x i16> @test_vluxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -4227,8 +4227,8 @@ define <vscale x 1 x i16> @test_vluxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4243,8 +4243,8 @@ define <vscale x 2 x i16> @test_vluxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -4256,8 +4256,8 @@ define <vscale x 2 x i16> @test_vluxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4272,8 +4272,8 @@ define <vscale x 2 x i16> @test_vluxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -4285,8 +4285,8 @@ define <vscale x 2 x i16> @test_vluxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4301,8 +4301,8 @@ define <vscale x 2 x i16> @test_vluxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -4314,8 +4314,8 @@ define <vscale x 2 x i16> @test_vluxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4330,8 +4330,8 @@ define <vscale x 4 x i16> @test_vluxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -4343,8 +4343,8 @@ define <vscale x 4 x i16> @test_vluxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4359,8 +4359,8 @@ define <vscale x 4 x i16> @test_vluxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -4372,8 +4372,8 @@ define <vscale x 4 x i16> @test_vluxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4388,8 +4388,8 @@ define <vscale x 4 x i16> @test_vluxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -4401,8 +4401,8 @@ define <vscale x 4 x i16> @test_vluxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4417,8 +4417,8 @@ define <vscale x 1 x i16> @test_vluxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -4430,8 +4430,8 @@ define <vscale x 1 x i16> @test_vluxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4446,8 +4446,8 @@ define <vscale x 1 x i16> @test_vluxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -4459,8 +4459,8 @@ define <vscale x 1 x i16> @test_vluxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4475,8 +4475,8 @@ define <vscale x 1 x i16> @test_vluxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -4488,8 +4488,8 @@ define <vscale x 1 x i16> @test_vluxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4504,8 +4504,8 @@ define <vscale x 2 x i16> @test_vluxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -4517,8 +4517,8 @@ define <vscale x 2 x i16> @test_vluxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4533,8 +4533,8 @@ define <vscale x 2 x i16> @test_vluxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -4546,8 +4546,8 @@ define <vscale x 2 x i16> @test_vluxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4562,8 +4562,8 @@ define <vscale x 2 x i16> @test_vluxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -4575,8 +4575,8 @@ define <vscale x 2 x i16> @test_vluxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4591,8 +4591,8 @@ define <vscale x 4 x i16> @test_vluxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -4604,8 +4604,8 @@ define <vscale x 4 x i16> @test_vluxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4620,8 +4620,8 @@ define <vscale x 4 x i16> @test_vluxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -4633,8 +4633,8 @@ define <vscale x 4 x i16> @test_vluxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4649,8 +4649,8 @@ define <vscale x 4 x i16> @test_vluxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -4662,8 +4662,8 @@ define <vscale x 4 x i16> @test_vluxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4678,8 +4678,8 @@ define <vscale x 1 x i16> @test_vluxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -4691,8 +4691,8 @@ define <vscale x 1 x i16> @test_vluxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4707,8 +4707,8 @@ define <vscale x 1 x i16> @test_vluxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -4720,8 +4720,8 @@ define <vscale x 1 x i16> @test_vluxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4736,8 +4736,8 @@ define <vscale x 1 x i16> @test_vluxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -4749,8 +4749,8 @@ define <vscale x 1 x i16> @test_vluxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4765,8 +4765,8 @@ define <vscale x 2 x i16> @test_vluxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -4778,8 +4778,8 @@ define <vscale x 2 x i16> @test_vluxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4794,8 +4794,8 @@ define <vscale x 2 x i16> @test_vluxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -4807,8 +4807,8 @@ define <vscale x 2 x i16> @test_vluxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4823,8 +4823,8 @@ define <vscale x 2 x i16> @test_vluxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -4836,8 +4836,8 @@ define <vscale x 2 x i16> @test_vluxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4852,8 +4852,8 @@ define <vscale x 4 x i16> @test_vluxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -4865,8 +4865,8 @@ define <vscale x 4 x i16> @test_vluxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4881,8 +4881,8 @@ define <vscale x 4 x i16> @test_vluxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -4894,8 +4894,8 @@ define <vscale x 4 x i16> @test_vluxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4910,8 +4910,8 @@ define <vscale x 4 x i16> @test_vluxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -4923,8 +4923,8 @@ define <vscale x 4 x i16> @test_vluxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -4939,8 +4939,8 @@ define <vscale x 1 x i32> @test_vluxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -4952,8 +4952,8 @@ define <vscale x 1 x i32> @test_vluxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -4968,8 +4968,8 @@ define <vscale x 1 x i32> @test_vluxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -4981,8 +4981,8 @@ define <vscale x 1 x i32> @test_vluxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -4997,8 +4997,8 @@ define <vscale x 1 x i32> @test_vluxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -5010,8 +5010,8 @@ define <vscale x 1 x i32> @test_vluxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5026,8 +5026,8 @@ define <vscale x 2 x i32> @test_vluxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -5039,8 +5039,8 @@ define <vscale x 2 x i32> @test_vluxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5055,8 +5055,8 @@ define <vscale x 2 x i32> @test_vluxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -5068,8 +5068,8 @@ define <vscale x 2 x i32> @test_vluxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5084,8 +5084,8 @@ define <vscale x 2 x i32> @test_vluxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -5097,8 +5097,8 @@ define <vscale x 2 x i32> @test_vluxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5287,8 +5287,8 @@ define <vscale x 1 x i32> @test_vluxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -5300,8 +5300,8 @@ define <vscale x 1 x i32> @test_vluxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5316,8 +5316,8 @@ define <vscale x 1 x i32> @test_vluxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -5329,8 +5329,8 @@ define <vscale x 1 x i32> @test_vluxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5345,8 +5345,8 @@ define <vscale x 1 x i32> @test_vluxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -5358,8 +5358,8 @@ define <vscale x 1 x i32> @test_vluxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5374,8 +5374,8 @@ define <vscale x 2 x i32> @test_vluxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -5387,8 +5387,8 @@ define <vscale x 2 x i32> @test_vluxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5403,8 +5403,8 @@ define <vscale x 2 x i32> @test_vluxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -5416,8 +5416,8 @@ define <vscale x 2 x i32> @test_vluxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5432,8 +5432,8 @@ define <vscale x 2 x i32> @test_vluxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -5445,8 +5445,8 @@ define <vscale x 2 x i32> @test_vluxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5519,8 +5519,8 @@ define <vscale x 4 x i32> @test_vluxseg3_nxv4i32_triscv.vector.tuple_nxv16i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv4i32_triscv.vector.tuple_nxv16i8_3t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei32.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv16i8_3t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 5)
@@ -5532,8 +5532,8 @@ define <vscale x 4 x i32> @test_vluxseg3_mask_nxv4i32_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vluxseg3_mask_nxv4i32_triscv.vector.tuple_nxv16i8_3t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei32.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5548,8 +5548,8 @@ define <vscale x 1 x i32> @test_vluxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -5561,8 +5561,8 @@ define <vscale x 1 x i32> @test_vluxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5577,8 +5577,8 @@ define <vscale x 1 x i32> @test_vluxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -5590,8 +5590,8 @@ define <vscale x 1 x i32> @test_vluxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5606,8 +5606,8 @@ define <vscale x 1 x i32> @test_vluxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -5619,8 +5619,8 @@ define <vscale x 1 x i32> @test_vluxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5635,8 +5635,8 @@ define <vscale x 2 x i32> @test_vluxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -5648,8 +5648,8 @@ define <vscale x 2 x i32> @test_vluxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5664,8 +5664,8 @@ define <vscale x 2 x i32> @test_vluxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -5677,8 +5677,8 @@ define <vscale x 2 x i32> @test_vluxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5693,8 +5693,8 @@ define <vscale x 2 x i32> @test_vluxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -5706,8 +5706,8 @@ define <vscale x 2 x i32> @test_vluxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5780,8 +5780,8 @@ define <vscale x 4 x i32> @test_vluxseg4_nxv4i32_triscv.vector.tuple_nxv16i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv4i32_triscv.vector.tuple_nxv16i8_4t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei32.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv16i8_4t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 5)
@@ -5793,8 +5793,8 @@ define <vscale x 4 x i32> @test_vluxseg4_mask_nxv4i32_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vluxseg4_mask_nxv4i32_triscv.vector.tuple_nxv16i8_4t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei32.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5809,8 +5809,8 @@ define <vscale x 1 x i32> @test_vluxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -5822,8 +5822,8 @@ define <vscale x 1 x i32> @test_vluxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5838,8 +5838,8 @@ define <vscale x 1 x i32> @test_vluxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -5851,8 +5851,8 @@ define <vscale x 1 x i32> @test_vluxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5867,8 +5867,8 @@ define <vscale x 1 x i32> @test_vluxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -5880,8 +5880,8 @@ define <vscale x 1 x i32> @test_vluxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5896,8 +5896,8 @@ define <vscale x 2 x i32> @test_vluxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -5909,8 +5909,8 @@ define <vscale x 2 x i32> @test_vluxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5925,8 +5925,8 @@ define <vscale x 2 x i32> @test_vluxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -5938,8 +5938,8 @@ define <vscale x 2 x i32> @test_vluxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5954,8 +5954,8 @@ define <vscale x 2 x i32> @test_vluxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -5967,8 +5967,8 @@ define <vscale x 2 x i32> @test_vluxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -5983,8 +5983,8 @@ define <vscale x 1 x i32> @test_vluxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -5996,8 +5996,8 @@ define <vscale x 1 x i32> @test_vluxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6012,8 +6012,8 @@ define <vscale x 1 x i32> @test_vluxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -6025,8 +6025,8 @@ define <vscale x 1 x i32> @test_vluxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6041,8 +6041,8 @@ define <vscale x 1 x i32> @test_vluxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -6054,8 +6054,8 @@ define <vscale x 1 x i32> @test_vluxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6070,8 +6070,8 @@ define <vscale x 2 x i32> @test_vluxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -6083,8 +6083,8 @@ define <vscale x 2 x i32> @test_vluxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6099,8 +6099,8 @@ define <vscale x 2 x i32> @test_vluxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -6112,8 +6112,8 @@ define <vscale x 2 x i32> @test_vluxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6128,8 +6128,8 @@ define <vscale x 2 x i32> @test_vluxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -6141,8 +6141,8 @@ define <vscale x 2 x i32> @test_vluxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6157,8 +6157,8 @@ define <vscale x 1 x i32> @test_vluxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -6170,8 +6170,8 @@ define <vscale x 1 x i32> @test_vluxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6186,8 +6186,8 @@ define <vscale x 1 x i32> @test_vluxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -6199,8 +6199,8 @@ define <vscale x 1 x i32> @test_vluxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6215,8 +6215,8 @@ define <vscale x 1 x i32> @test_vluxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -6228,8 +6228,8 @@ define <vscale x 1 x i32> @test_vluxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6244,8 +6244,8 @@ define <vscale x 2 x i32> @test_vluxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -6257,8 +6257,8 @@ define <vscale x 2 x i32> @test_vluxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6273,8 +6273,8 @@ define <vscale x 2 x i32> @test_vluxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -6286,8 +6286,8 @@ define <vscale x 2 x i32> @test_vluxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6302,8 +6302,8 @@ define <vscale x 2 x i32> @test_vluxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -6315,8 +6315,8 @@ define <vscale x 2 x i32> @test_vluxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6331,8 +6331,8 @@ define <vscale x 1 x i32> @test_vluxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -6344,8 +6344,8 @@ define <vscale x 1 x i32> @test_vluxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6360,8 +6360,8 @@ define <vscale x 1 x i32> @test_vluxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -6373,8 +6373,8 @@ define <vscale x 1 x i32> @test_vluxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6389,8 +6389,8 @@ define <vscale x 1 x i32> @test_vluxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -6402,8 +6402,8 @@ define <vscale x 1 x i32> @test_vluxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6418,8 +6418,8 @@ define <vscale x 2 x i32> @test_vluxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -6431,8 +6431,8 @@ define <vscale x 2 x i32> @test_vluxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6447,8 +6447,8 @@ define <vscale x 2 x i32> @test_vluxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -6460,8 +6460,8 @@ define <vscale x 2 x i32> @test_vluxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6476,8 +6476,8 @@ define <vscale x 2 x i32> @test_vluxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -6489,8 +6489,8 @@ define <vscale x 2 x i32> @test_vluxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -6505,8 +6505,8 @@ define <vscale x 1 x i64> @test_vluxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -6518,8 +6518,8 @@ define <vscale x 1 x i64> @test_vluxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -6534,8 +6534,8 @@ define <vscale x 1 x i64> @test_vluxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -6547,8 +6547,8 @@ define <vscale x 1 x i64> @test_vluxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -6563,8 +6563,8 @@ define <vscale x 1 x i64> @test_vluxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -6576,8 +6576,8 @@ define <vscale x 1 x i64> @test_vluxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -6766,8 +6766,8 @@ define <vscale x 1 x i64> @test_vluxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -6779,8 +6779,8 @@ define <vscale x 1 x i64> @test_vluxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -6795,8 +6795,8 @@ define <vscale x 1 x i64> @test_vluxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -6808,8 +6808,8 @@ define <vscale x 1 x i64> @test_vluxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -6824,8 +6824,8 @@ define <vscale x 1 x i64> @test_vluxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -6837,8 +6837,8 @@ define <vscale x 1 x i64> @test_vluxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -6940,8 +6940,8 @@ define <vscale x 1 x i64> @test_vluxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -6953,8 +6953,8 @@ define <vscale x 1 x i64> @test_vluxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -6969,8 +6969,8 @@ define <vscale x 1 x i64> @test_vluxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -6982,8 +6982,8 @@ define <vscale x 1 x i64> @test_vluxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -6998,8 +6998,8 @@ define <vscale x 1 x i64> @test_vluxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -7011,8 +7011,8 @@ define <vscale x 1 x i64> @test_vluxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7114,8 +7114,8 @@ define <vscale x 1 x i64> @test_vluxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -7127,8 +7127,8 @@ define <vscale x 1 x i64> @test_vluxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7143,8 +7143,8 @@ define <vscale x 1 x i64> @test_vluxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -7156,8 +7156,8 @@ define <vscale x 1 x i64> @test_vluxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7172,8 +7172,8 @@ define <vscale x 1 x i64> @test_vluxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -7185,8 +7185,8 @@ define <vscale x 1 x i64> @test_vluxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7201,8 +7201,8 @@ define <vscale x 1 x i64> @test_vluxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -7214,8 +7214,8 @@ define <vscale x 1 x i64> @test_vluxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7230,8 +7230,8 @@ define <vscale x 1 x i64> @test_vluxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -7243,8 +7243,8 @@ define <vscale x 1 x i64> @test_vluxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7259,8 +7259,8 @@ define <vscale x 1 x i64> @test_vluxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -7272,8 +7272,8 @@ define <vscale x 1 x i64> @test_vluxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7288,8 +7288,8 @@ define <vscale x 1 x i64> @test_vluxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -7301,8 +7301,8 @@ define <vscale x 1 x i64> @test_vluxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7317,8 +7317,8 @@ define <vscale x 1 x i64> @test_vluxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -7330,8 +7330,8 @@ define <vscale x 1 x i64> @test_vluxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7346,8 +7346,8 @@ define <vscale x 1 x i64> @test_vluxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -7359,8 +7359,8 @@ define <vscale x 1 x i64> @test_vluxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7375,8 +7375,8 @@ define <vscale x 1 x i64> @test_vluxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -7388,8 +7388,8 @@ define <vscale x 1 x i64> @test_vluxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7404,8 +7404,8 @@ define <vscale x 1 x i64> @test_vluxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -7417,8 +7417,8 @@ define <vscale x 1 x i64> @test_vluxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7433,8 +7433,8 @@ define <vscale x 1 x i64> @test_vluxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -7446,8 +7446,8 @@ define <vscale x 1 x i64> @test_vluxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -7460,8 +7460,8 @@ define <vscale x 1 x half> @test_vluxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_
; CHECK-LABEL: test_vluxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -7473,8 +7473,8 @@ define <vscale x 1 x half> @test_vluxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7487,8 +7487,8 @@ define <vscale x 1 x half> @test_vluxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_
; CHECK-LABEL: test_vluxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -7500,8 +7500,8 @@ define <vscale x 1 x half> @test_vluxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7514,8 +7514,8 @@ define <vscale x 1 x half> @test_vluxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_
; CHECK-LABEL: test_vluxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -7527,8 +7527,8 @@ define <vscale x 1 x half> @test_vluxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7541,8 +7541,8 @@ define <vscale x 2 x half> @test_vluxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_
; CHECK-LABEL: test_vluxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -7554,8 +7554,8 @@ define <vscale x 2 x half> @test_vluxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7568,8 +7568,8 @@ define <vscale x 2 x half> @test_vluxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_
; CHECK-LABEL: test_vluxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -7581,8 +7581,8 @@ define <vscale x 2 x half> @test_vluxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7595,8 +7595,8 @@ define <vscale x 2 x half> @test_vluxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_
; CHECK-LABEL: test_vluxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -7608,8 +7608,8 @@ define <vscale x 2 x half> @test_vluxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7622,8 +7622,8 @@ define <vscale x 4 x half> @test_vluxseg2_nxv4f16_triscv.vector.tuple_nxv8i8_2t_
; CHECK-LABEL: test_vluxseg2_nxv4f16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -7635,8 +7635,8 @@ define <vscale x 4 x half> @test_vluxseg2_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg2_mask_nxv4f16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7649,8 +7649,8 @@ define <vscale x 4 x half> @test_vluxseg2_nxv4f16_triscv.vector.tuple_nxv8i8_2t_
; CHECK-LABEL: test_vluxseg2_nxv4f16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -7662,8 +7662,8 @@ define <vscale x 4 x half> @test_vluxseg2_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg2_mask_nxv4f16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7865,8 +7865,8 @@ define <vscale x 1 x half> @test_vluxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -7878,8 +7878,8 @@ define <vscale x 1 x half> @test_vluxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7892,8 +7892,8 @@ define <vscale x 1 x half> @test_vluxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -7905,8 +7905,8 @@ define <vscale x 1 x half> @test_vluxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7919,8 +7919,8 @@ define <vscale x 1 x half> @test_vluxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -7932,8 +7932,8 @@ define <vscale x 1 x half> @test_vluxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7946,8 +7946,8 @@ define <vscale x 2 x half> @test_vluxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -7959,8 +7959,8 @@ define <vscale x 2 x half> @test_vluxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -7973,8 +7973,8 @@ define <vscale x 2 x half> @test_vluxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -7986,8 +7986,8 @@ define <vscale x 2 x half> @test_vluxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8000,8 +8000,8 @@ define <vscale x 2 x half> @test_vluxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -8013,8 +8013,8 @@ define <vscale x 2 x half> @test_vluxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8027,8 +8027,8 @@ define <vscale x 4 x half> @test_vluxseg3_nxv4f16_triscv.vector.tuple_nxv8i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv4f16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -8040,8 +8040,8 @@ define <vscale x 4 x half> @test_vluxseg3_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg3_mask_nxv4f16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8054,8 +8054,8 @@ define <vscale x 4 x half> @test_vluxseg3_nxv4f16_triscv.vector.tuple_nxv8i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv4f16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -8067,8 +8067,8 @@ define <vscale x 4 x half> @test_vluxseg3_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg3_mask_nxv4f16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8135,8 +8135,8 @@ define <vscale x 8 x half> @test_vluxseg3_nxv8f16_triscv.vector.tuple_nxv16i8_3t
; CHECK-LABEL: test_vluxseg3_nxv8f16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei16.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv16i8_3t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 4)
@@ -8148,8 +8148,8 @@ define <vscale x 8 x half> @test_vluxseg3_mask_nxv8f16_triscv.vector.tuple_nxv16
; CHECK-LABEL: test_vluxseg3_mask_nxv8f16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei16.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8189,8 +8189,8 @@ define <vscale x 1 x half> @test_vluxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -8202,8 +8202,8 @@ define <vscale x 1 x half> @test_vluxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8216,8 +8216,8 @@ define <vscale x 1 x half> @test_vluxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -8229,8 +8229,8 @@ define <vscale x 1 x half> @test_vluxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8243,8 +8243,8 @@ define <vscale x 1 x half> @test_vluxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -8256,8 +8256,8 @@ define <vscale x 1 x half> @test_vluxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8270,8 +8270,8 @@ define <vscale x 2 x half> @test_vluxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -8283,8 +8283,8 @@ define <vscale x 2 x half> @test_vluxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8297,8 +8297,8 @@ define <vscale x 2 x half> @test_vluxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -8310,8 +8310,8 @@ define <vscale x 2 x half> @test_vluxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8324,8 +8324,8 @@ define <vscale x 2 x half> @test_vluxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -8337,8 +8337,8 @@ define <vscale x 2 x half> @test_vluxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8351,8 +8351,8 @@ define <vscale x 4 x half> @test_vluxseg4_nxv4f16_triscv.vector.tuple_nxv8i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv4f16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -8364,8 +8364,8 @@ define <vscale x 4 x half> @test_vluxseg4_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg4_mask_nxv4f16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8378,8 +8378,8 @@ define <vscale x 4 x half> @test_vluxseg4_nxv4f16_triscv.vector.tuple_nxv8i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv4f16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -8391,8 +8391,8 @@ define <vscale x 4 x half> @test_vluxseg4_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg4_mask_nxv4f16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8459,8 +8459,8 @@ define <vscale x 8 x half> @test_vluxseg4_nxv8f16_triscv.vector.tuple_nxv16i8_4t
; CHECK-LABEL: test_vluxseg4_nxv8f16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei16.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv16i8_4t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 4)
@@ -8472,8 +8472,8 @@ define <vscale x 8 x half> @test_vluxseg4_mask_nxv8f16_triscv.vector.tuple_nxv16
; CHECK-LABEL: test_vluxseg4_mask_nxv8f16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei16.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8513,8 +8513,8 @@ define <vscale x 1 x half> @test_vluxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -8526,8 +8526,8 @@ define <vscale x 1 x half> @test_vluxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8540,8 +8540,8 @@ define <vscale x 1 x half> @test_vluxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -8553,8 +8553,8 @@ define <vscale x 1 x half> @test_vluxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8567,8 +8567,8 @@ define <vscale x 1 x half> @test_vluxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -8580,8 +8580,8 @@ define <vscale x 1 x half> @test_vluxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8594,8 +8594,8 @@ define <vscale x 2 x half> @test_vluxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -8607,8 +8607,8 @@ define <vscale x 2 x half> @test_vluxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8621,8 +8621,8 @@ define <vscale x 2 x half> @test_vluxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -8634,8 +8634,8 @@ define <vscale x 2 x half> @test_vluxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8648,8 +8648,8 @@ define <vscale x 2 x half> @test_vluxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -8661,8 +8661,8 @@ define <vscale x 2 x half> @test_vluxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8675,8 +8675,8 @@ define <vscale x 4 x half> @test_vluxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -8688,8 +8688,8 @@ define <vscale x 4 x half> @test_vluxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8702,8 +8702,8 @@ define <vscale x 4 x half> @test_vluxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -8715,8 +8715,8 @@ define <vscale x 4 x half> @test_vluxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8729,8 +8729,8 @@ define <vscale x 4 x half> @test_vluxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -8742,8 +8742,8 @@ define <vscale x 4 x half> @test_vluxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8756,8 +8756,8 @@ define <vscale x 1 x half> @test_vluxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -8769,8 +8769,8 @@ define <vscale x 1 x half> @test_vluxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8783,8 +8783,8 @@ define <vscale x 1 x half> @test_vluxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -8796,8 +8796,8 @@ define <vscale x 1 x half> @test_vluxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8810,8 +8810,8 @@ define <vscale x 1 x half> @test_vluxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -8823,8 +8823,8 @@ define <vscale x 1 x half> @test_vluxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8837,8 +8837,8 @@ define <vscale x 2 x half> @test_vluxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -8850,8 +8850,8 @@ define <vscale x 2 x half> @test_vluxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8864,8 +8864,8 @@ define <vscale x 2 x half> @test_vluxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -8877,8 +8877,8 @@ define <vscale x 2 x half> @test_vluxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8891,8 +8891,8 @@ define <vscale x 2 x half> @test_vluxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -8904,8 +8904,8 @@ define <vscale x 2 x half> @test_vluxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8918,8 +8918,8 @@ define <vscale x 4 x half> @test_vluxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -8931,8 +8931,8 @@ define <vscale x 4 x half> @test_vluxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8945,8 +8945,8 @@ define <vscale x 4 x half> @test_vluxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -8958,8 +8958,8 @@ define <vscale x 4 x half> @test_vluxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8972,8 +8972,8 @@ define <vscale x 4 x half> @test_vluxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -8985,8 +8985,8 @@ define <vscale x 4 x half> @test_vluxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -8999,8 +8999,8 @@ define <vscale x 1 x half> @test_vluxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -9012,8 +9012,8 @@ define <vscale x 1 x half> @test_vluxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9026,8 +9026,8 @@ define <vscale x 1 x half> @test_vluxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -9039,8 +9039,8 @@ define <vscale x 1 x half> @test_vluxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9053,8 +9053,8 @@ define <vscale x 1 x half> @test_vluxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -9066,8 +9066,8 @@ define <vscale x 1 x half> @test_vluxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9080,8 +9080,8 @@ define <vscale x 2 x half> @test_vluxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -9093,8 +9093,8 @@ define <vscale x 2 x half> @test_vluxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9107,8 +9107,8 @@ define <vscale x 2 x half> @test_vluxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -9120,8 +9120,8 @@ define <vscale x 2 x half> @test_vluxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9134,8 +9134,8 @@ define <vscale x 2 x half> @test_vluxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -9147,8 +9147,8 @@ define <vscale x 2 x half> @test_vluxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9161,8 +9161,8 @@ define <vscale x 4 x half> @test_vluxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -9174,8 +9174,8 @@ define <vscale x 4 x half> @test_vluxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9188,8 +9188,8 @@ define <vscale x 4 x half> @test_vluxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -9201,8 +9201,8 @@ define <vscale x 4 x half> @test_vluxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9215,8 +9215,8 @@ define <vscale x 4 x half> @test_vluxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -9228,8 +9228,8 @@ define <vscale x 4 x half> @test_vluxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9242,8 +9242,8 @@ define <vscale x 1 x half> @test_vluxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -9255,8 +9255,8 @@ define <vscale x 1 x half> @test_vluxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9269,8 +9269,8 @@ define <vscale x 1 x half> @test_vluxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -9282,8 +9282,8 @@ define <vscale x 1 x half> @test_vluxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9296,8 +9296,8 @@ define <vscale x 1 x half> @test_vluxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -9309,8 +9309,8 @@ define <vscale x 1 x half> @test_vluxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9323,8 +9323,8 @@ define <vscale x 2 x half> @test_vluxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -9336,8 +9336,8 @@ define <vscale x 2 x half> @test_vluxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9350,8 +9350,8 @@ define <vscale x 2 x half> @test_vluxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -9363,8 +9363,8 @@ define <vscale x 2 x half> @test_vluxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9377,8 +9377,8 @@ define <vscale x 2 x half> @test_vluxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -9390,8 +9390,8 @@ define <vscale x 2 x half> @test_vluxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9404,8 +9404,8 @@ define <vscale x 4 x half> @test_vluxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -9417,8 +9417,8 @@ define <vscale x 4 x half> @test_vluxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9431,8 +9431,8 @@ define <vscale x 4 x half> @test_vluxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -9444,8 +9444,8 @@ define <vscale x 4 x half> @test_vluxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9458,8 +9458,8 @@ define <vscale x 4 x half> @test_vluxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -9471,8 +9471,8 @@ define <vscale x 4 x half> @test_vluxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -9485,8 +9485,8 @@ define <vscale x 1 x float> @test_vluxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t
; CHECK-LABEL: test_vluxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -9498,8 +9498,8 @@ define <vscale x 1 x float> @test_vluxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9512,8 +9512,8 @@ define <vscale x 1 x float> @test_vluxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t
; CHECK-LABEL: test_vluxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -9525,8 +9525,8 @@ define <vscale x 1 x float> @test_vluxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9539,8 +9539,8 @@ define <vscale x 1 x float> @test_vluxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t
; CHECK-LABEL: test_vluxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -9552,8 +9552,8 @@ define <vscale x 1 x float> @test_vluxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9566,8 +9566,8 @@ define <vscale x 2 x float> @test_vluxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t
; CHECK-LABEL: test_vluxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -9579,8 +9579,8 @@ define <vscale x 2 x float> @test_vluxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9593,8 +9593,8 @@ define <vscale x 2 x float> @test_vluxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t
; CHECK-LABEL: test_vluxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -9606,8 +9606,8 @@ define <vscale x 2 x float> @test_vluxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9620,8 +9620,8 @@ define <vscale x 2 x float> @test_vluxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t
; CHECK-LABEL: test_vluxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -9633,8 +9633,8 @@ define <vscale x 2 x float> @test_vluxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9809,8 +9809,8 @@ define <vscale x 1 x float> @test_vluxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t
; CHECK-LABEL: test_vluxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -9822,8 +9822,8 @@ define <vscale x 1 x float> @test_vluxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9836,8 +9836,8 @@ define <vscale x 1 x float> @test_vluxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t
; CHECK-LABEL: test_vluxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -9849,8 +9849,8 @@ define <vscale x 1 x float> @test_vluxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9863,8 +9863,8 @@ define <vscale x 1 x float> @test_vluxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t
; CHECK-LABEL: test_vluxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -9876,8 +9876,8 @@ define <vscale x 1 x float> @test_vluxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9890,8 +9890,8 @@ define <vscale x 2 x float> @test_vluxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t
; CHECK-LABEL: test_vluxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -9903,8 +9903,8 @@ define <vscale x 2 x float> @test_vluxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9917,8 +9917,8 @@ define <vscale x 2 x float> @test_vluxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t
; CHECK-LABEL: test_vluxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -9930,8 +9930,8 @@ define <vscale x 2 x float> @test_vluxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -9944,8 +9944,8 @@ define <vscale x 2 x float> @test_vluxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t
; CHECK-LABEL: test_vluxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -9957,8 +9957,8 @@ define <vscale x 2 x float> @test_vluxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10025,8 +10025,8 @@ define <vscale x 4 x float> @test_vluxseg3_nxv4f32_triscv.vector.tuple_nxv16i8_3
; CHECK-LABEL: test_vluxseg3_nxv4f32_triscv.vector.tuple_nxv16i8_3t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei32.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv16i8_3t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 5)
@@ -10038,8 +10038,8 @@ define <vscale x 4 x float> @test_vluxseg3_mask_nxv4f32_triscv.vector.tuple_nxv1
; CHECK-LABEL: test_vluxseg3_mask_nxv4f32_triscv.vector.tuple_nxv16i8_3t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei32.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10052,8 +10052,8 @@ define <vscale x 1 x float> @test_vluxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t
; CHECK-LABEL: test_vluxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -10065,8 +10065,8 @@ define <vscale x 1 x float> @test_vluxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10079,8 +10079,8 @@ define <vscale x 1 x float> @test_vluxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t
; CHECK-LABEL: test_vluxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -10092,8 +10092,8 @@ define <vscale x 1 x float> @test_vluxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10106,8 +10106,8 @@ define <vscale x 1 x float> @test_vluxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t
; CHECK-LABEL: test_vluxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -10119,8 +10119,8 @@ define <vscale x 1 x float> @test_vluxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10133,8 +10133,8 @@ define <vscale x 2 x float> @test_vluxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t
; CHECK-LABEL: test_vluxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -10146,8 +10146,8 @@ define <vscale x 2 x float> @test_vluxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10160,8 +10160,8 @@ define <vscale x 2 x float> @test_vluxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t
; CHECK-LABEL: test_vluxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -10173,8 +10173,8 @@ define <vscale x 2 x float> @test_vluxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10187,8 +10187,8 @@ define <vscale x 2 x float> @test_vluxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t
; CHECK-LABEL: test_vluxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -10200,8 +10200,8 @@ define <vscale x 2 x float> @test_vluxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10268,8 +10268,8 @@ define <vscale x 4 x float> @test_vluxseg4_nxv4f32_triscv.vector.tuple_nxv16i8_4
; CHECK-LABEL: test_vluxseg4_nxv4f32_triscv.vector.tuple_nxv16i8_4t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei32.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv16i8_4t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 5)
@@ -10281,8 +10281,8 @@ define <vscale x 4 x float> @test_vluxseg4_mask_nxv4f32_triscv.vector.tuple_nxv1
; CHECK-LABEL: test_vluxseg4_mask_nxv4f32_triscv.vector.tuple_nxv16i8_4t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei32.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10295,8 +10295,8 @@ define <vscale x 1 x float> @test_vluxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t
; CHECK-LABEL: test_vluxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -10308,8 +10308,8 @@ define <vscale x 1 x float> @test_vluxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10322,8 +10322,8 @@ define <vscale x 1 x float> @test_vluxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t
; CHECK-LABEL: test_vluxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -10335,8 +10335,8 @@ define <vscale x 1 x float> @test_vluxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10349,8 +10349,8 @@ define <vscale x 1 x float> @test_vluxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t
; CHECK-LABEL: test_vluxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -10362,8 +10362,8 @@ define <vscale x 1 x float> @test_vluxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10376,8 +10376,8 @@ define <vscale x 2 x float> @test_vluxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t
; CHECK-LABEL: test_vluxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -10389,8 +10389,8 @@ define <vscale x 2 x float> @test_vluxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10403,8 +10403,8 @@ define <vscale x 2 x float> @test_vluxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t
; CHECK-LABEL: test_vluxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -10416,8 +10416,8 @@ define <vscale x 2 x float> @test_vluxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10430,8 +10430,8 @@ define <vscale x 2 x float> @test_vluxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t
; CHECK-LABEL: test_vluxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -10443,8 +10443,8 @@ define <vscale x 2 x float> @test_vluxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10457,8 +10457,8 @@ define <vscale x 1 x float> @test_vluxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t
; CHECK-LABEL: test_vluxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -10470,8 +10470,8 @@ define <vscale x 1 x float> @test_vluxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10484,8 +10484,8 @@ define <vscale x 1 x float> @test_vluxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t
; CHECK-LABEL: test_vluxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -10497,8 +10497,8 @@ define <vscale x 1 x float> @test_vluxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10511,8 +10511,8 @@ define <vscale x 1 x float> @test_vluxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t
; CHECK-LABEL: test_vluxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -10524,8 +10524,8 @@ define <vscale x 1 x float> @test_vluxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10538,8 +10538,8 @@ define <vscale x 2 x float> @test_vluxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t
; CHECK-LABEL: test_vluxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -10551,8 +10551,8 @@ define <vscale x 2 x float> @test_vluxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10565,8 +10565,8 @@ define <vscale x 2 x float> @test_vluxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t
; CHECK-LABEL: test_vluxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -10578,8 +10578,8 @@ define <vscale x 2 x float> @test_vluxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10592,8 +10592,8 @@ define <vscale x 2 x float> @test_vluxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t
; CHECK-LABEL: test_vluxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -10605,8 +10605,8 @@ define <vscale x 2 x float> @test_vluxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10619,8 +10619,8 @@ define <vscale x 1 x float> @test_vluxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t
; CHECK-LABEL: test_vluxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -10632,8 +10632,8 @@ define <vscale x 1 x float> @test_vluxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10646,8 +10646,8 @@ define <vscale x 1 x float> @test_vluxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t
; CHECK-LABEL: test_vluxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -10659,8 +10659,8 @@ define <vscale x 1 x float> @test_vluxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10673,8 +10673,8 @@ define <vscale x 1 x float> @test_vluxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t
; CHECK-LABEL: test_vluxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -10686,8 +10686,8 @@ define <vscale x 1 x float> @test_vluxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10700,8 +10700,8 @@ define <vscale x 2 x float> @test_vluxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t
; CHECK-LABEL: test_vluxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -10713,8 +10713,8 @@ define <vscale x 2 x float> @test_vluxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10727,8 +10727,8 @@ define <vscale x 2 x float> @test_vluxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t
; CHECK-LABEL: test_vluxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -10740,8 +10740,8 @@ define <vscale x 2 x float> @test_vluxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10754,8 +10754,8 @@ define <vscale x 2 x float> @test_vluxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t
; CHECK-LABEL: test_vluxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -10767,8 +10767,8 @@ define <vscale x 2 x float> @test_vluxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10781,8 +10781,8 @@ define <vscale x 1 x float> @test_vluxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t
; CHECK-LABEL: test_vluxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 5)
@@ -10794,8 +10794,8 @@ define <vscale x 1 x float> @test_vluxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10808,8 +10808,8 @@ define <vscale x 1 x float> @test_vluxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t
; CHECK-LABEL: test_vluxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 5)
@@ -10821,8 +10821,8 @@ define <vscale x 1 x float> @test_vluxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10835,8 +10835,8 @@ define <vscale x 1 x float> @test_vluxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t
; CHECK-LABEL: test_vluxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 5)
@@ -10848,8 +10848,8 @@ define <vscale x 1 x float> @test_vluxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10862,8 +10862,8 @@ define <vscale x 2 x float> @test_vluxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t
; CHECK-LABEL: test_vluxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 5)
@@ -10875,8 +10875,8 @@ define <vscale x 2 x float> @test_vluxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10889,8 +10889,8 @@ define <vscale x 2 x float> @test_vluxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t
; CHECK-LABEL: test_vluxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 5)
@@ -10902,8 +10902,8 @@ define <vscale x 2 x float> @test_vluxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10916,8 +10916,8 @@ define <vscale x 2 x float> @test_vluxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t
; CHECK-LABEL: test_vluxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 5)
@@ -10929,8 +10929,8 @@ define <vscale x 2 x float> @test_vluxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 5)
@@ -10943,8 +10943,8 @@ define <vscale x 1 x double> @test_vluxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2
; CHECK-LABEL: test_vluxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -10956,8 +10956,8 @@ define <vscale x 1 x double> @test_vluxseg2_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg2_mask_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -10970,8 +10970,8 @@ define <vscale x 1 x double> @test_vluxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2
; CHECK-LABEL: test_vluxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -10983,8 +10983,8 @@ define <vscale x 1 x double> @test_vluxseg2_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg2_mask_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -10997,8 +10997,8 @@ define <vscale x 1 x double> @test_vluxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2
; CHECK-LABEL: test_vluxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -11010,8 +11010,8 @@ define <vscale x 1 x double> @test_vluxseg2_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg2_mask_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11186,8 +11186,8 @@ define <vscale x 1 x double> @test_vluxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3
; CHECK-LABEL: test_vluxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -11199,8 +11199,8 @@ define <vscale x 1 x double> @test_vluxseg3_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg3_mask_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11213,8 +11213,8 @@ define <vscale x 1 x double> @test_vluxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3
; CHECK-LABEL: test_vluxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -11226,8 +11226,8 @@ define <vscale x 1 x double> @test_vluxseg3_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg3_mask_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11240,8 +11240,8 @@ define <vscale x 1 x double> @test_vluxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3
; CHECK-LABEL: test_vluxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -11253,8 +11253,8 @@ define <vscale x 1 x double> @test_vluxseg3_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg3_mask_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11348,8 +11348,8 @@ define <vscale x 1 x double> @test_vluxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4
; CHECK-LABEL: test_vluxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -11361,8 +11361,8 @@ define <vscale x 1 x double> @test_vluxseg4_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg4_mask_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11375,8 +11375,8 @@ define <vscale x 1 x double> @test_vluxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4
; CHECK-LABEL: test_vluxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -11388,8 +11388,8 @@ define <vscale x 1 x double> @test_vluxseg4_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg4_mask_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11402,8 +11402,8 @@ define <vscale x 1 x double> @test_vluxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4
; CHECK-LABEL: test_vluxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -11415,8 +11415,8 @@ define <vscale x 1 x double> @test_vluxseg4_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg4_mask_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11510,8 +11510,8 @@ define <vscale x 1 x double> @test_vluxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vluxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -11523,8 +11523,8 @@ define <vscale x 1 x double> @test_vluxseg5_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg5_mask_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11537,8 +11537,8 @@ define <vscale x 1 x double> @test_vluxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vluxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -11550,8 +11550,8 @@ define <vscale x 1 x double> @test_vluxseg5_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg5_mask_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11564,8 +11564,8 @@ define <vscale x 1 x double> @test_vluxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vluxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -11577,8 +11577,8 @@ define <vscale x 1 x double> @test_vluxseg5_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg5_mask_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11591,8 +11591,8 @@ define <vscale x 1 x double> @test_vluxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vluxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -11604,8 +11604,8 @@ define <vscale x 1 x double> @test_vluxseg6_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg6_mask_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11618,8 +11618,8 @@ define <vscale x 1 x double> @test_vluxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vluxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -11631,8 +11631,8 @@ define <vscale x 1 x double> @test_vluxseg6_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg6_mask_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11645,8 +11645,8 @@ define <vscale x 1 x double> @test_vluxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vluxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -11658,8 +11658,8 @@ define <vscale x 1 x double> @test_vluxseg6_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg6_mask_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11672,8 +11672,8 @@ define <vscale x 1 x double> @test_vluxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vluxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -11685,8 +11685,8 @@ define <vscale x 1 x double> @test_vluxseg7_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg7_mask_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11699,8 +11699,8 @@ define <vscale x 1 x double> @test_vluxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vluxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -11712,8 +11712,8 @@ define <vscale x 1 x double> @test_vluxseg7_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg7_mask_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11726,8 +11726,8 @@ define <vscale x 1 x double> @test_vluxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vluxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -11739,8 +11739,8 @@ define <vscale x 1 x double> @test_vluxseg7_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg7_mask_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11753,8 +11753,8 @@ define <vscale x 1 x double> @test_vluxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vluxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 6)
@@ -11766,8 +11766,8 @@ define <vscale x 1 x double> @test_vluxseg8_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg8_mask_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11780,8 +11780,8 @@ define <vscale x 1 x double> @test_vluxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vluxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 6)
@@ -11793,8 +11793,8 @@ define <vscale x 1 x double> @test_vluxseg8_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg8_mask_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11807,8 +11807,8 @@ define <vscale x 1 x double> @test_vluxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vluxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 6)
@@ -11820,8 +11820,8 @@ define <vscale x 1 x double> @test_vluxseg8_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg8_mask_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 6)
@@ -11834,8 +11834,8 @@ define <vscale x 1 x bfloat> @test_vluxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -11847,8 +11847,8 @@ define <vscale x 1 x bfloat> @test_vluxseg2_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg2_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -11861,8 +11861,8 @@ define <vscale x 1 x bfloat> @test_vluxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -11874,8 +11874,8 @@ define <vscale x 1 x bfloat> @test_vluxseg2_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg2_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -11888,8 +11888,8 @@ define <vscale x 1 x bfloat> @test_vluxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -11901,8 +11901,8 @@ define <vscale x 1 x bfloat> @test_vluxseg2_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg2_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -11915,8 +11915,8 @@ define <vscale x 2 x bfloat> @test_vluxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -11928,8 +11928,8 @@ define <vscale x 2 x bfloat> @test_vluxseg2_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg2_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -11942,8 +11942,8 @@ define <vscale x 2 x bfloat> @test_vluxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -11955,8 +11955,8 @@ define <vscale x 2 x bfloat> @test_vluxseg2_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg2_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -11969,8 +11969,8 @@ define <vscale x 2 x bfloat> @test_vluxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -11982,8 +11982,8 @@ define <vscale x 2 x bfloat> @test_vluxseg2_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg2_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -11996,8 +11996,8 @@ define <vscale x 4 x bfloat> @test_vluxseg2_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg2_nxv4bf16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -12009,8 +12009,8 @@ define <vscale x 4 x bfloat> @test_vluxseg2_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg2_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12023,8 +12023,8 @@ define <vscale x 4 x bfloat> @test_vluxseg2_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg2_nxv4bf16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -12036,8 +12036,8 @@ define <vscale x 4 x bfloat> @test_vluxseg2_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg2_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12239,8 +12239,8 @@ define <vscale x 1 x bfloat> @test_vluxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -12252,8 +12252,8 @@ define <vscale x 1 x bfloat> @test_vluxseg3_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg3_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12266,8 +12266,8 @@ define <vscale x 1 x bfloat> @test_vluxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -12279,8 +12279,8 @@ define <vscale x 1 x bfloat> @test_vluxseg3_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg3_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12293,8 +12293,8 @@ define <vscale x 1 x bfloat> @test_vluxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -12306,8 +12306,8 @@ define <vscale x 1 x bfloat> @test_vluxseg3_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg3_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12320,8 +12320,8 @@ define <vscale x 2 x bfloat> @test_vluxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -12333,8 +12333,8 @@ define <vscale x 2 x bfloat> @test_vluxseg3_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg3_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12347,8 +12347,8 @@ define <vscale x 2 x bfloat> @test_vluxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -12360,8 +12360,8 @@ define <vscale x 2 x bfloat> @test_vluxseg3_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg3_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12374,8 +12374,8 @@ define <vscale x 2 x bfloat> @test_vluxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -12387,8 +12387,8 @@ define <vscale x 2 x bfloat> @test_vluxseg3_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg3_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12401,8 +12401,8 @@ define <vscale x 4 x bfloat> @test_vluxseg3_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg3_nxv4bf16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -12414,8 +12414,8 @@ define <vscale x 4 x bfloat> @test_vluxseg3_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg3_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12428,8 +12428,8 @@ define <vscale x 4 x bfloat> @test_vluxseg3_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg3_nxv4bf16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -12441,8 +12441,8 @@ define <vscale x 4 x bfloat> @test_vluxseg3_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg3_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12509,8 +12509,8 @@ define <vscale x 8 x bfloat> @test_vluxseg3_nxv8bf16_triscv.vector.tuple_nxv16i8
; CHECK-LABEL: test_vluxseg3_nxv8bf16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei16.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv16i8_3t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 4)
@@ -12522,8 +12522,8 @@ define <vscale x 8 x bfloat> @test_vluxseg3_mask_nxv8bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg3_mask_nxv8bf16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei16.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12563,8 +12563,8 @@ define <vscale x 1 x bfloat> @test_vluxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -12576,8 +12576,8 @@ define <vscale x 1 x bfloat> @test_vluxseg4_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg4_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12590,8 +12590,8 @@ define <vscale x 1 x bfloat> @test_vluxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -12603,8 +12603,8 @@ define <vscale x 1 x bfloat> @test_vluxseg4_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg4_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12617,8 +12617,8 @@ define <vscale x 1 x bfloat> @test_vluxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -12630,8 +12630,8 @@ define <vscale x 1 x bfloat> @test_vluxseg4_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg4_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12644,8 +12644,8 @@ define <vscale x 2 x bfloat> @test_vluxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -12657,8 +12657,8 @@ define <vscale x 2 x bfloat> @test_vluxseg4_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg4_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12671,8 +12671,8 @@ define <vscale x 2 x bfloat> @test_vluxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -12684,8 +12684,8 @@ define <vscale x 2 x bfloat> @test_vluxseg4_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg4_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12698,8 +12698,8 @@ define <vscale x 2 x bfloat> @test_vluxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -12711,8 +12711,8 @@ define <vscale x 2 x bfloat> @test_vluxseg4_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg4_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12725,8 +12725,8 @@ define <vscale x 4 x bfloat> @test_vluxseg4_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg4_nxv4bf16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -12738,8 +12738,8 @@ define <vscale x 4 x bfloat> @test_vluxseg4_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg4_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12752,8 +12752,8 @@ define <vscale x 4 x bfloat> @test_vluxseg4_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg4_nxv4bf16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -12765,8 +12765,8 @@ define <vscale x 4 x bfloat> @test_vluxseg4_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg4_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12833,8 +12833,8 @@ define <vscale x 8 x bfloat> @test_vluxseg4_nxv8bf16_triscv.vector.tuple_nxv16i8
; CHECK-LABEL: test_vluxseg4_nxv8bf16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei16.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv16i8_4t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, i32 %vl, i32 4)
@@ -12846,8 +12846,8 @@ define <vscale x 8 x bfloat> @test_vluxseg4_mask_nxv8bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg4_mask_nxv8bf16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei16.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12887,8 +12887,8 @@ define <vscale x 1 x bfloat> @test_vluxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -12900,8 +12900,8 @@ define <vscale x 1 x bfloat> @test_vluxseg5_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12914,8 +12914,8 @@ define <vscale x 1 x bfloat> @test_vluxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -12927,8 +12927,8 @@ define <vscale x 1 x bfloat> @test_vluxseg5_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12941,8 +12941,8 @@ define <vscale x 1 x bfloat> @test_vluxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -12954,8 +12954,8 @@ define <vscale x 1 x bfloat> @test_vluxseg5_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12968,8 +12968,8 @@ define <vscale x 2 x bfloat> @test_vluxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -12981,8 +12981,8 @@ define <vscale x 2 x bfloat> @test_vluxseg5_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -12995,8 +12995,8 @@ define <vscale x 2 x bfloat> @test_vluxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -13008,8 +13008,8 @@ define <vscale x 2 x bfloat> @test_vluxseg5_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13022,8 +13022,8 @@ define <vscale x 2 x bfloat> @test_vluxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -13035,8 +13035,8 @@ define <vscale x 2 x bfloat> @test_vluxseg5_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13049,8 +13049,8 @@ define <vscale x 4 x bfloat> @test_vluxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -13062,8 +13062,8 @@ define <vscale x 4 x bfloat> @test_vluxseg5_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13076,8 +13076,8 @@ define <vscale x 4 x bfloat> @test_vluxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -13089,8 +13089,8 @@ define <vscale x 4 x bfloat> @test_vluxseg5_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13103,8 +13103,8 @@ define <vscale x 4 x bfloat> @test_vluxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -13116,8 +13116,8 @@ define <vscale x 4 x bfloat> @test_vluxseg5_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13130,8 +13130,8 @@ define <vscale x 1 x bfloat> @test_vluxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -13143,8 +13143,8 @@ define <vscale x 1 x bfloat> @test_vluxseg6_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13157,8 +13157,8 @@ define <vscale x 1 x bfloat> @test_vluxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -13170,8 +13170,8 @@ define <vscale x 1 x bfloat> @test_vluxseg6_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13184,8 +13184,8 @@ define <vscale x 1 x bfloat> @test_vluxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -13197,8 +13197,8 @@ define <vscale x 1 x bfloat> @test_vluxseg6_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13211,8 +13211,8 @@ define <vscale x 2 x bfloat> @test_vluxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -13224,8 +13224,8 @@ define <vscale x 2 x bfloat> @test_vluxseg6_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13238,8 +13238,8 @@ define <vscale x 2 x bfloat> @test_vluxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -13251,8 +13251,8 @@ define <vscale x 2 x bfloat> @test_vluxseg6_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13265,8 +13265,8 @@ define <vscale x 2 x bfloat> @test_vluxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -13278,8 +13278,8 @@ define <vscale x 2 x bfloat> @test_vluxseg6_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13292,8 +13292,8 @@ define <vscale x 4 x bfloat> @test_vluxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -13305,8 +13305,8 @@ define <vscale x 4 x bfloat> @test_vluxseg6_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13319,8 +13319,8 @@ define <vscale x 4 x bfloat> @test_vluxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -13332,8 +13332,8 @@ define <vscale x 4 x bfloat> @test_vluxseg6_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13346,8 +13346,8 @@ define <vscale x 4 x bfloat> @test_vluxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -13359,8 +13359,8 @@ define <vscale x 4 x bfloat> @test_vluxseg6_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13373,8 +13373,8 @@ define <vscale x 1 x bfloat> @test_vluxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -13386,8 +13386,8 @@ define <vscale x 1 x bfloat> @test_vluxseg7_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13400,8 +13400,8 @@ define <vscale x 1 x bfloat> @test_vluxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -13413,8 +13413,8 @@ define <vscale x 1 x bfloat> @test_vluxseg7_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13427,8 +13427,8 @@ define <vscale x 1 x bfloat> @test_vluxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -13440,8 +13440,8 @@ define <vscale x 1 x bfloat> @test_vluxseg7_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13454,8 +13454,8 @@ define <vscale x 2 x bfloat> @test_vluxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -13467,8 +13467,8 @@ define <vscale x 2 x bfloat> @test_vluxseg7_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13481,8 +13481,8 @@ define <vscale x 2 x bfloat> @test_vluxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -13494,8 +13494,8 @@ define <vscale x 2 x bfloat> @test_vluxseg7_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13508,8 +13508,8 @@ define <vscale x 2 x bfloat> @test_vluxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -13521,8 +13521,8 @@ define <vscale x 2 x bfloat> @test_vluxseg7_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13535,8 +13535,8 @@ define <vscale x 4 x bfloat> @test_vluxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -13548,8 +13548,8 @@ define <vscale x 4 x bfloat> @test_vluxseg7_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13562,8 +13562,8 @@ define <vscale x 4 x bfloat> @test_vluxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -13575,8 +13575,8 @@ define <vscale x 4 x bfloat> @test_vluxseg7_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13589,8 +13589,8 @@ define <vscale x 4 x bfloat> @test_vluxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -13602,8 +13602,8 @@ define <vscale x 4 x bfloat> @test_vluxseg7_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13616,8 +13616,8 @@ define <vscale x 1 x bfloat> @test_vluxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i32 %vl, i32 4)
@@ -13629,8 +13629,8 @@ define <vscale x 1 x bfloat> @test_vluxseg8_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13643,8 +13643,8 @@ define <vscale x 1 x bfloat> @test_vluxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i32 %vl, i32 4)
@@ -13656,8 +13656,8 @@ define <vscale x 1 x bfloat> @test_vluxseg8_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13670,8 +13670,8 @@ define <vscale x 1 x bfloat> @test_vluxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i32 %vl, i32 4)
@@ -13683,8 +13683,8 @@ define <vscale x 1 x bfloat> @test_vluxseg8_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13697,8 +13697,8 @@ define <vscale x 2 x bfloat> @test_vluxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i32 %vl, i32 4)
@@ -13710,8 +13710,8 @@ define <vscale x 2 x bfloat> @test_vluxseg8_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13724,8 +13724,8 @@ define <vscale x 2 x bfloat> @test_vluxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i32 %vl, i32 4)
@@ -13737,8 +13737,8 @@ define <vscale x 2 x bfloat> @test_vluxseg8_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13751,8 +13751,8 @@ define <vscale x 2 x bfloat> @test_vluxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i32 %vl, i32 4)
@@ -13764,8 +13764,8 @@ define <vscale x 2 x bfloat> @test_vluxseg8_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13778,8 +13778,8 @@ define <vscale x 4 x bfloat> @test_vluxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, i32 %vl, i32 4)
@@ -13791,8 +13791,8 @@ define <vscale x 4 x bfloat> @test_vluxseg8_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13805,8 +13805,8 @@ define <vscale x 4 x bfloat> @test_vluxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, i32 %vl, i32 4)
@@ -13818,8 +13818,8 @@ define <vscale x 4 x bfloat> @test_vluxseg8_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
@@ -13832,8 +13832,8 @@ define <vscale x 4 x bfloat> @test_vluxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, i32 %vl, i32 4)
@@ -13845,8 +13845,8 @@ define <vscale x 4 x bfloat> @test_vluxseg8_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i32 %vl, i32 1, i32 4)
diff --git a/llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll b/llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll
index 49565c422e92c..cfe5ab2b07e64 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll
@@ -9,8 +9,8 @@ define <vscale x 1 x i8> @test_vluxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv
; CHECK-LABEL: test_vluxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv1i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 3)
@@ -22,8 +22,8 @@ define <vscale x 1 x i8> @test_vluxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2
; CHECK-LABEL: test_vluxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -35,8 +35,8 @@ define <vscale x 1 x i8> @test_vluxseg2_allonesmask_nxv1i8_triscv.vector.tuple_n
; CHECK-LABEL: test_vluxseg2_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
@@ -51,8 +51,8 @@ define <vscale x 1 x i8> @test_vluxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv
; CHECK-LABEL: test_vluxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv1i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 3)
@@ -64,8 +64,8 @@ define <vscale x 1 x i8> @test_vluxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2
; CHECK-LABEL: test_vluxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -80,8 +80,8 @@ define <vscale x 1 x i8> @test_vluxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv
; CHECK-LABEL: test_vluxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv1i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 3)
@@ -93,8 +93,8 @@ define <vscale x 1 x i8> @test_vluxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2
; CHECK-LABEL: test_vluxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -109,8 +109,8 @@ define <vscale x 1 x i8> @test_vluxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv
; CHECK-LABEL: test_vluxseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg2ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei64.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv1i8_2t.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 3)
@@ -122,8 +122,8 @@ define <vscale x 1 x i8> @test_vluxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2
; CHECK-LABEL: test_vluxseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg2ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei64.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -138,8 +138,8 @@ define <vscale x 2 x i8> @test_vluxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv
; CHECK-LABEL: test_vluxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 3)
@@ -151,8 +151,8 @@ define <vscale x 2 x i8> @test_vluxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2
; CHECK-LABEL: test_vluxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -167,8 +167,8 @@ define <vscale x 2 x i8> @test_vluxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv
; CHECK-LABEL: test_vluxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 3)
@@ -180,8 +180,8 @@ define <vscale x 2 x i8> @test_vluxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2
; CHECK-LABEL: test_vluxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -196,8 +196,8 @@ define <vscale x 2 x i8> @test_vluxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv
; CHECK-LABEL: test_vluxseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 3)
@@ -209,8 +209,8 @@ define <vscale x 2 x i8> @test_vluxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2
; CHECK-LABEL: test_vluxseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -254,8 +254,8 @@ define <vscale x 4 x i8> @test_vluxseg2_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv
; CHECK-LABEL: test_vluxseg2_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 3)
@@ -267,8 +267,8 @@ define <vscale x 4 x i8> @test_vluxseg2_mask_nxv4i8_triscv.vector.tuple_nxv4i8_2
; CHECK-LABEL: test_vluxseg2_mask_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -283,8 +283,8 @@ define <vscale x 4 x i8> @test_vluxseg2_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv
; CHECK-LABEL: test_vluxseg2_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 3)
@@ -296,8 +296,8 @@ define <vscale x 4 x i8> @test_vluxseg2_mask_nxv4i8_triscv.vector.tuple_nxv4i8_2
; CHECK-LABEL: test_vluxseg2_mask_nxv4i8_triscv.vector.tuple_nxv4i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -370,8 +370,8 @@ define <vscale x 8 x i8> @test_vluxseg2_nxv8i8_triscv.vector.tuple_nxv8i8_2t_nxv
; CHECK-LABEL: test_vluxseg2_nxv8i8_triscv.vector.tuple_nxv8i8_2t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 8 x i8> %index, i64 %vl, i64 3)
@@ -383,8 +383,8 @@ define <vscale x 8 x i8> @test_vluxseg2_mask_nxv8i8_triscv.vector.tuple_nxv8i8_2
; CHECK-LABEL: test_vluxseg2_mask_nxv8i8_triscv.vector.tuple_nxv8i8_2t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -631,8 +631,8 @@ define <vscale x 1 x i8> @test_vluxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv
; CHECK-LABEL: test_vluxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv1i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 3)
@@ -644,8 +644,8 @@ define <vscale x 1 x i8> @test_vluxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3
; CHECK-LABEL: test_vluxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv1i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -657,8 +657,8 @@ define <vscale x 1 x i8> @test_vluxseg3_allonesmask_nxv1i8_triscv.vector.tuple_n
; CHECK-LABEL: test_vluxseg3_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv1i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
@@ -673,8 +673,8 @@ define <vscale x 1 x i8> @test_vluxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv
; CHECK-LABEL: test_vluxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv1i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 3)
@@ -686,8 +686,8 @@ define <vscale x 1 x i8> @test_vluxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3
; CHECK-LABEL: test_vluxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv1i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -702,8 +702,8 @@ define <vscale x 1 x i8> @test_vluxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv
; CHECK-LABEL: test_vluxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv1i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 3)
@@ -715,8 +715,8 @@ define <vscale x 1 x i8> @test_vluxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3
; CHECK-LABEL: test_vluxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv1i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -731,8 +731,8 @@ define <vscale x 1 x i8> @test_vluxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv
; CHECK-LABEL: test_vluxseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei64.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv1i8_3t.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 3)
@@ -744,8 +744,8 @@ define <vscale x 1 x i8> @test_vluxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3
; CHECK-LABEL: test_vluxseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei64.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv1i8_3t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -760,8 +760,8 @@ define <vscale x 2 x i8> @test_vluxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv
; CHECK-LABEL: test_vluxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 3)
@@ -773,8 +773,8 @@ define <vscale x 2 x i8> @test_vluxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3
; CHECK-LABEL: test_vluxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -789,8 +789,8 @@ define <vscale x 2 x i8> @test_vluxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv
; CHECK-LABEL: test_vluxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 3)
@@ -802,8 +802,8 @@ define <vscale x 2 x i8> @test_vluxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3
; CHECK-LABEL: test_vluxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -818,8 +818,8 @@ define <vscale x 2 x i8> @test_vluxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv
; CHECK-LABEL: test_vluxseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 3)
@@ -831,8 +831,8 @@ define <vscale x 2 x i8> @test_vluxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3
; CHECK-LABEL: test_vluxseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -876,8 +876,8 @@ define <vscale x 4 x i8> @test_vluxseg3_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv
; CHECK-LABEL: test_vluxseg3_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 3)
@@ -889,8 +889,8 @@ define <vscale x 4 x i8> @test_vluxseg3_mask_nxv4i8_triscv.vector.tuple_nxv4i8_3
; CHECK-LABEL: test_vluxseg3_mask_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -905,8 +905,8 @@ define <vscale x 4 x i8> @test_vluxseg3_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv
; CHECK-LABEL: test_vluxseg3_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 3)
@@ -918,8 +918,8 @@ define <vscale x 4 x i8> @test_vluxseg3_mask_nxv4i8_triscv.vector.tuple_nxv4i8_3
; CHECK-LABEL: test_vluxseg3_mask_nxv4i8_triscv.vector.tuple_nxv4i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -992,8 +992,8 @@ define <vscale x 8 x i8> @test_vluxseg3_nxv8i8_triscv.vector.tuple_nxv8i8_3t_nxv
; CHECK-LABEL: test_vluxseg3_nxv8i8_triscv.vector.tuple_nxv8i8_3t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 8 x i8> %index, i64 %vl, i64 3)
@@ -1005,8 +1005,8 @@ define <vscale x 8 x i8> @test_vluxseg3_mask_nxv8i8_triscv.vector.tuple_nxv8i8_3
; CHECK-LABEL: test_vluxseg3_mask_nxv8i8_triscv.vector.tuple_nxv8i8_3t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1108,8 +1108,8 @@ define <vscale x 16 x i8> @test_vluxseg3_nxv16i8_triscv.vector.tuple_nxv16i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv16i8_triscv.vector.tuple_nxv16i8_3t_nxv16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei8.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv16i8_3t.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 16 x i8> %index, i64 %vl, i64 3)
@@ -1121,8 +1121,8 @@ define <vscale x 16 x i8> @test_vluxseg3_mask_nxv16i8_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vluxseg3_mask_nxv16i8_triscv.vector.tuple_nxv16i8_3t_nxv16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei8.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv16i1.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 16 x i8> %index, <vscale x 16 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1195,8 +1195,8 @@ define <vscale x 1 x i8> @test_vluxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv
; CHECK-LABEL: test_vluxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv1i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 3)
@@ -1208,8 +1208,8 @@ define <vscale x 1 x i8> @test_vluxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4
; CHECK-LABEL: test_vluxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1221,8 +1221,8 @@ define <vscale x 1 x i8> @test_vluxseg4_allonesmask_nxv1i8_triscv.vector.tuple_n
; CHECK-LABEL: test_vluxseg4_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
@@ -1237,8 +1237,8 @@ define <vscale x 1 x i8> @test_vluxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv
; CHECK-LABEL: test_vluxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv1i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 3)
@@ -1250,8 +1250,8 @@ define <vscale x 1 x i8> @test_vluxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4
; CHECK-LABEL: test_vluxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1266,8 +1266,8 @@ define <vscale x 1 x i8> @test_vluxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv
; CHECK-LABEL: test_vluxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv1i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 3)
@@ -1279,8 +1279,8 @@ define <vscale x 1 x i8> @test_vluxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4
; CHECK-LABEL: test_vluxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1295,8 +1295,8 @@ define <vscale x 1 x i8> @test_vluxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv
; CHECK-LABEL: test_vluxseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei64.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv1i8_4t.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 3)
@@ -1308,8 +1308,8 @@ define <vscale x 1 x i8> @test_vluxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4
; CHECK-LABEL: test_vluxseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei64.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1324,8 +1324,8 @@ define <vscale x 2 x i8> @test_vluxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv
; CHECK-LABEL: test_vluxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 3)
@@ -1337,8 +1337,8 @@ define <vscale x 2 x i8> @test_vluxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4
; CHECK-LABEL: test_vluxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1353,8 +1353,8 @@ define <vscale x 2 x i8> @test_vluxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv
; CHECK-LABEL: test_vluxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 3)
@@ -1366,8 +1366,8 @@ define <vscale x 2 x i8> @test_vluxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4
; CHECK-LABEL: test_vluxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1382,8 +1382,8 @@ define <vscale x 2 x i8> @test_vluxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv
; CHECK-LABEL: test_vluxseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 3)
@@ -1395,8 +1395,8 @@ define <vscale x 2 x i8> @test_vluxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4
; CHECK-LABEL: test_vluxseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1440,8 +1440,8 @@ define <vscale x 4 x i8> @test_vluxseg4_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv
; CHECK-LABEL: test_vluxseg4_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 3)
@@ -1453,8 +1453,8 @@ define <vscale x 4 x i8> @test_vluxseg4_mask_nxv4i8_triscv.vector.tuple_nxv4i8_4
; CHECK-LABEL: test_vluxseg4_mask_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1469,8 +1469,8 @@ define <vscale x 4 x i8> @test_vluxseg4_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv
; CHECK-LABEL: test_vluxseg4_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 3)
@@ -1482,8 +1482,8 @@ define <vscale x 4 x i8> @test_vluxseg4_mask_nxv4i8_triscv.vector.tuple_nxv4i8_4
; CHECK-LABEL: test_vluxseg4_mask_nxv4i8_triscv.vector.tuple_nxv4i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1556,8 +1556,8 @@ define <vscale x 8 x i8> @test_vluxseg4_nxv8i8_triscv.vector.tuple_nxv8i8_4t_nxv
; CHECK-LABEL: test_vluxseg4_nxv8i8_triscv.vector.tuple_nxv8i8_4t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 8 x i8> %index, i64 %vl, i64 3)
@@ -1569,8 +1569,8 @@ define <vscale x 8 x i8> @test_vluxseg4_mask_nxv8i8_triscv.vector.tuple_nxv8i8_4
; CHECK-LABEL: test_vluxseg4_mask_nxv8i8_triscv.vector.tuple_nxv8i8_4t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1672,8 +1672,8 @@ define <vscale x 16 x i8> @test_vluxseg4_nxv16i8_triscv.vector.tuple_nxv16i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv16i8_triscv.vector.tuple_nxv16i8_4t_nxv16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei8.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv16i8_4t.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 16 x i8> %index, i64 %vl, i64 3)
@@ -1685,8 +1685,8 @@ define <vscale x 16 x i8> @test_vluxseg4_mask_nxv16i8_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vluxseg4_mask_nxv16i8_triscv.vector.tuple_nxv16i8_4t_nxv16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei8.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv16i1.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 16 x i8> %index, <vscale x 16 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1759,8 +1759,8 @@ define <vscale x 1 x i8> @test_vluxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv1i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 3)
@@ -1772,8 +1772,8 @@ define <vscale x 1 x i8> @test_vluxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1785,8 +1785,8 @@ define <vscale x 1 x i8> @test_vluxseg5_allonesmask_nxv1i8_triscv.vector.tuple_n
; CHECK-LABEL: test_vluxseg5_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
@@ -1801,8 +1801,8 @@ define <vscale x 1 x i8> @test_vluxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv1i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 3)
@@ -1814,8 +1814,8 @@ define <vscale x 1 x i8> @test_vluxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1830,8 +1830,8 @@ define <vscale x 1 x i8> @test_vluxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv1i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 3)
@@ -1843,8 +1843,8 @@ define <vscale x 1 x i8> @test_vluxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1859,8 +1859,8 @@ define <vscale x 1 x i8> @test_vluxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv1i8_5t.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 3)
@@ -1872,8 +1872,8 @@ define <vscale x 1 x i8> @test_vluxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1888,8 +1888,8 @@ define <vscale x 2 x i8> @test_vluxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 3)
@@ -1901,8 +1901,8 @@ define <vscale x 2 x i8> @test_vluxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1917,8 +1917,8 @@ define <vscale x 2 x i8> @test_vluxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 3)
@@ -1930,8 +1930,8 @@ define <vscale x 2 x i8> @test_vluxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1946,8 +1946,8 @@ define <vscale x 2 x i8> @test_vluxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 3)
@@ -1959,8 +1959,8 @@ define <vscale x 2 x i8> @test_vluxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -1975,8 +1975,8 @@ define <vscale x 2 x i8> @test_vluxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv2i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 3)
@@ -1988,8 +1988,8 @@ define <vscale x 2 x i8> @test_vluxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2004,8 +2004,8 @@ define <vscale x 4 x i8> @test_vluxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 3)
@@ -2017,8 +2017,8 @@ define <vscale x 4 x i8> @test_vluxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2033,8 +2033,8 @@ define <vscale x 4 x i8> @test_vluxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 3)
@@ -2046,8 +2046,8 @@ define <vscale x 4 x i8> @test_vluxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2062,8 +2062,8 @@ define <vscale x 4 x i8> @test_vluxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 3)
@@ -2075,8 +2075,8 @@ define <vscale x 4 x i8> @test_vluxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2120,8 +2120,8 @@ define <vscale x 8 x i8> @test_vluxseg5_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 8 x i8> %index, i64 %vl, i64 3)
@@ -2133,8 +2133,8 @@ define <vscale x 8 x i8> @test_vluxseg5_mask_nxv8i8_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2149,8 +2149,8 @@ define <vscale x 8 x i8> @test_vluxseg5_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv
; CHECK-LABEL: test_vluxseg5_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 3)
@@ -2162,8 +2162,8 @@ define <vscale x 8 x i8> @test_vluxseg5_mask_nxv8i8_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vluxseg5_mask_nxv8i8_triscv.vector.tuple_nxv8i8_5t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2236,8 +2236,8 @@ define <vscale x 1 x i8> @test_vluxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv1i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 3)
@@ -2249,8 +2249,8 @@ define <vscale x 1 x i8> @test_vluxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2262,8 +2262,8 @@ define <vscale x 1 x i8> @test_vluxseg6_allonesmask_nxv1i8_triscv.vector.tuple_n
; CHECK-LABEL: test_vluxseg6_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
@@ -2278,8 +2278,8 @@ define <vscale x 1 x i8> @test_vluxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv1i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 3)
@@ -2291,8 +2291,8 @@ define <vscale x 1 x i8> @test_vluxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2307,8 +2307,8 @@ define <vscale x 1 x i8> @test_vluxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv1i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 3)
@@ -2320,8 +2320,8 @@ define <vscale x 1 x i8> @test_vluxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2336,8 +2336,8 @@ define <vscale x 1 x i8> @test_vluxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv1i8_6t.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 3)
@@ -2349,8 +2349,8 @@ define <vscale x 1 x i8> @test_vluxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2365,8 +2365,8 @@ define <vscale x 2 x i8> @test_vluxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 3)
@@ -2378,8 +2378,8 @@ define <vscale x 2 x i8> @test_vluxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2394,8 +2394,8 @@ define <vscale x 2 x i8> @test_vluxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 3)
@@ -2407,8 +2407,8 @@ define <vscale x 2 x i8> @test_vluxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2423,8 +2423,8 @@ define <vscale x 2 x i8> @test_vluxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 3)
@@ -2436,8 +2436,8 @@ define <vscale x 2 x i8> @test_vluxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2452,8 +2452,8 @@ define <vscale x 2 x i8> @test_vluxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv2i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 3)
@@ -2465,8 +2465,8 @@ define <vscale x 2 x i8> @test_vluxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2481,8 +2481,8 @@ define <vscale x 4 x i8> @test_vluxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 3)
@@ -2494,8 +2494,8 @@ define <vscale x 4 x i8> @test_vluxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2510,8 +2510,8 @@ define <vscale x 4 x i8> @test_vluxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 3)
@@ -2523,8 +2523,8 @@ define <vscale x 4 x i8> @test_vluxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2539,8 +2539,8 @@ define <vscale x 4 x i8> @test_vluxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 3)
@@ -2552,8 +2552,8 @@ define <vscale x 4 x i8> @test_vluxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2597,8 +2597,8 @@ define <vscale x 8 x i8> @test_vluxseg6_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 8 x i8> %index, i64 %vl, i64 3)
@@ -2610,8 +2610,8 @@ define <vscale x 8 x i8> @test_vluxseg6_mask_nxv8i8_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2626,8 +2626,8 @@ define <vscale x 8 x i8> @test_vluxseg6_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv
; CHECK-LABEL: test_vluxseg6_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 3)
@@ -2639,8 +2639,8 @@ define <vscale x 8 x i8> @test_vluxseg6_mask_nxv8i8_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vluxseg6_mask_nxv8i8_triscv.vector.tuple_nxv8i8_6t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2713,8 +2713,8 @@ define <vscale x 1 x i8> @test_vluxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv1i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 3)
@@ -2726,8 +2726,8 @@ define <vscale x 1 x i8> @test_vluxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2739,8 +2739,8 @@ define <vscale x 1 x i8> @test_vluxseg7_allonesmask_nxv1i8_triscv.vector.tuple_n
; CHECK-LABEL: test_vluxseg7_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
@@ -2755,8 +2755,8 @@ define <vscale x 1 x i8> @test_vluxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv1i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 3)
@@ -2768,8 +2768,8 @@ define <vscale x 1 x i8> @test_vluxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2784,8 +2784,8 @@ define <vscale x 1 x i8> @test_vluxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv1i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 3)
@@ -2797,8 +2797,8 @@ define <vscale x 1 x i8> @test_vluxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2813,8 +2813,8 @@ define <vscale x 1 x i8> @test_vluxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv1i8_7t.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 3)
@@ -2826,8 +2826,8 @@ define <vscale x 1 x i8> @test_vluxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2842,8 +2842,8 @@ define <vscale x 2 x i8> @test_vluxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 3)
@@ -2855,8 +2855,8 @@ define <vscale x 2 x i8> @test_vluxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2871,8 +2871,8 @@ define <vscale x 2 x i8> @test_vluxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 3)
@@ -2884,8 +2884,8 @@ define <vscale x 2 x i8> @test_vluxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2900,8 +2900,8 @@ define <vscale x 2 x i8> @test_vluxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 3)
@@ -2913,8 +2913,8 @@ define <vscale x 2 x i8> @test_vluxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2929,8 +2929,8 @@ define <vscale x 2 x i8> @test_vluxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv2i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 3)
@@ -2942,8 +2942,8 @@ define <vscale x 2 x i8> @test_vluxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2958,8 +2958,8 @@ define <vscale x 4 x i8> @test_vluxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 3)
@@ -2971,8 +2971,8 @@ define <vscale x 4 x i8> @test_vluxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -2987,8 +2987,8 @@ define <vscale x 4 x i8> @test_vluxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 3)
@@ -3000,8 +3000,8 @@ define <vscale x 4 x i8> @test_vluxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3016,8 +3016,8 @@ define <vscale x 4 x i8> @test_vluxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 3)
@@ -3029,8 +3029,8 @@ define <vscale x 4 x i8> @test_vluxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3074,8 +3074,8 @@ define <vscale x 8 x i8> @test_vluxseg7_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 8 x i8> %index, i64 %vl, i64 3)
@@ -3087,8 +3087,8 @@ define <vscale x 8 x i8> @test_vluxseg7_mask_nxv8i8_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3103,8 +3103,8 @@ define <vscale x 8 x i8> @test_vluxseg7_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv
; CHECK-LABEL: test_vluxseg7_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 3)
@@ -3116,8 +3116,8 @@ define <vscale x 8 x i8> @test_vluxseg7_mask_nxv8i8_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vluxseg7_mask_nxv8i8_triscv.vector.tuple_nxv8i8_7t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3190,8 +3190,8 @@ define <vscale x 1 x i8> @test_vluxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv1i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 3)
@@ -3203,8 +3203,8 @@ define <vscale x 1 x i8> @test_vluxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3216,8 +3216,8 @@ define <vscale x 1 x i8> @test_vluxseg8_allonesmask_nxv1i8_triscv.vector.tuple_n
; CHECK-LABEL: test_vluxseg8_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
@@ -3232,8 +3232,8 @@ define <vscale x 1 x i8> @test_vluxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv1i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 3)
@@ -3245,8 +3245,8 @@ define <vscale x 1 x i8> @test_vluxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3261,8 +3261,8 @@ define <vscale x 1 x i8> @test_vluxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv1i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 3)
@@ -3274,8 +3274,8 @@ define <vscale x 1 x i8> @test_vluxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3290,8 +3290,8 @@ define <vscale x 1 x i8> @test_vluxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv1i8_8t.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 3)
@@ -3303,8 +3303,8 @@ define <vscale x 1 x i8> @test_vluxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3319,8 +3319,8 @@ define <vscale x 2 x i8> @test_vluxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 3)
@@ -3332,8 +3332,8 @@ define <vscale x 2 x i8> @test_vluxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3348,8 +3348,8 @@ define <vscale x 2 x i8> @test_vluxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 3)
@@ -3361,8 +3361,8 @@ define <vscale x 2 x i8> @test_vluxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3377,8 +3377,8 @@ define <vscale x 2 x i8> @test_vluxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 3)
@@ -3390,8 +3390,8 @@ define <vscale x 2 x i8> @test_vluxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3406,8 +3406,8 @@ define <vscale x 2 x i8> @test_vluxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv2i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 3)
@@ -3419,8 +3419,8 @@ define <vscale x 2 x i8> @test_vluxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3435,8 +3435,8 @@ define <vscale x 4 x i8> @test_vluxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 3)
@@ -3448,8 +3448,8 @@ define <vscale x 4 x i8> @test_vluxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3464,8 +3464,8 @@ define <vscale x 4 x i8> @test_vluxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 3)
@@ -3477,8 +3477,8 @@ define <vscale x 4 x i8> @test_vluxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3493,8 +3493,8 @@ define <vscale x 4 x i8> @test_vluxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 3)
@@ -3506,8 +3506,8 @@ define <vscale x 4 x i8> @test_vluxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3551,8 +3551,8 @@ define <vscale x 8 x i8> @test_vluxseg8_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 8 x i8> %index, i64 %vl, i64 3)
@@ -3564,8 +3564,8 @@ define <vscale x 8 x i8> @test_vluxseg8_mask_nxv8i8_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv8i1.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 8 x i8> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3580,8 +3580,8 @@ define <vscale x 8 x i8> @test_vluxseg8_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv
; CHECK-LABEL: test_vluxseg8_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 3)
@@ -3593,8 +3593,8 @@ define <vscale x 8 x i8> @test_vluxseg8_mask_nxv8i8_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vluxseg8_mask_nxv8i8_triscv.vector.tuple_nxv8i8_8t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 3)
@@ -3667,8 +3667,8 @@ define <vscale x 1 x i16> @test_vluxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -3680,8 +3680,8 @@ define <vscale x 1 x i16> @test_vluxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -3696,8 +3696,8 @@ define <vscale x 1 x i16> @test_vluxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -3709,8 +3709,8 @@ define <vscale x 1 x i16> @test_vluxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -3725,8 +3725,8 @@ define <vscale x 1 x i16> @test_vluxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -3738,8 +3738,8 @@ define <vscale x 1 x i16> @test_vluxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -3754,8 +3754,8 @@ define <vscale x 1 x i16> @test_vluxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei64.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -3767,8 +3767,8 @@ define <vscale x 1 x i16> @test_vluxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei64.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -3783,8 +3783,8 @@ define <vscale x 2 x i16> @test_vluxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -3796,8 +3796,8 @@ define <vscale x 2 x i16> @test_vluxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -3812,8 +3812,8 @@ define <vscale x 2 x i16> @test_vluxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -3825,8 +3825,8 @@ define <vscale x 2 x i16> @test_vluxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -3841,8 +3841,8 @@ define <vscale x 2 x i16> @test_vluxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -3854,8 +3854,8 @@ define <vscale x 2 x i16> @test_vluxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -3899,8 +3899,8 @@ define <vscale x 4 x i16> @test_vluxseg2_nxv4i16_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv4i16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -3912,8 +3912,8 @@ define <vscale x 4 x i16> @test_vluxseg2_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg2_mask_nxv4i16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -3928,8 +3928,8 @@ define <vscale x 4 x i16> @test_vluxseg2_nxv4i16_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv4i16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -3941,8 +3941,8 @@ define <vscale x 4 x i16> @test_vluxseg2_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg2_mask_nxv4i16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4218,8 +4218,8 @@ define <vscale x 1 x i16> @test_vluxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -4231,8 +4231,8 @@ define <vscale x 1 x i16> @test_vluxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4247,8 +4247,8 @@ define <vscale x 1 x i16> @test_vluxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -4260,8 +4260,8 @@ define <vscale x 1 x i16> @test_vluxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4276,8 +4276,8 @@ define <vscale x 1 x i16> @test_vluxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -4289,8 +4289,8 @@ define <vscale x 1 x i16> @test_vluxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4305,8 +4305,8 @@ define <vscale x 1 x i16> @test_vluxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei64.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -4318,8 +4318,8 @@ define <vscale x 1 x i16> @test_vluxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei64.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4334,8 +4334,8 @@ define <vscale x 2 x i16> @test_vluxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -4347,8 +4347,8 @@ define <vscale x 2 x i16> @test_vluxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4363,8 +4363,8 @@ define <vscale x 2 x i16> @test_vluxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -4376,8 +4376,8 @@ define <vscale x 2 x i16> @test_vluxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4392,8 +4392,8 @@ define <vscale x 2 x i16> @test_vluxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -4405,8 +4405,8 @@ define <vscale x 2 x i16> @test_vluxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4450,8 +4450,8 @@ define <vscale x 4 x i16> @test_vluxseg3_nxv4i16_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv4i16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -4463,8 +4463,8 @@ define <vscale x 4 x i16> @test_vluxseg3_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg3_mask_nxv4i16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4479,8 +4479,8 @@ define <vscale x 4 x i16> @test_vluxseg3_nxv4i16_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv4i16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -4492,8 +4492,8 @@ define <vscale x 4 x i16> @test_vluxseg3_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg3_mask_nxv4i16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4595,8 +4595,8 @@ define <vscale x 8 x i16> @test_vluxseg3_nxv8i16_triscv.vector.tuple_nxv16i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv8i16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei16.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv16i8_3t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 4)
@@ -4608,8 +4608,8 @@ define <vscale x 8 x i16> @test_vluxseg3_mask_nxv8i16_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vluxseg3_mask_nxv8i16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei16.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4682,8 +4682,8 @@ define <vscale x 1 x i16> @test_vluxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -4695,8 +4695,8 @@ define <vscale x 1 x i16> @test_vluxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4711,8 +4711,8 @@ define <vscale x 1 x i16> @test_vluxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -4724,8 +4724,8 @@ define <vscale x 1 x i16> @test_vluxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4740,8 +4740,8 @@ define <vscale x 1 x i16> @test_vluxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -4753,8 +4753,8 @@ define <vscale x 1 x i16> @test_vluxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4769,8 +4769,8 @@ define <vscale x 1 x i16> @test_vluxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei64.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -4782,8 +4782,8 @@ define <vscale x 1 x i16> @test_vluxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei64.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4798,8 +4798,8 @@ define <vscale x 2 x i16> @test_vluxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -4811,8 +4811,8 @@ define <vscale x 2 x i16> @test_vluxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4827,8 +4827,8 @@ define <vscale x 2 x i16> @test_vluxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -4840,8 +4840,8 @@ define <vscale x 2 x i16> @test_vluxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4856,8 +4856,8 @@ define <vscale x 2 x i16> @test_vluxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -4869,8 +4869,8 @@ define <vscale x 2 x i16> @test_vluxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4914,8 +4914,8 @@ define <vscale x 4 x i16> @test_vluxseg4_nxv4i16_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv4i16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -4927,8 +4927,8 @@ define <vscale x 4 x i16> @test_vluxseg4_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg4_mask_nxv4i16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -4943,8 +4943,8 @@ define <vscale x 4 x i16> @test_vluxseg4_nxv4i16_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv4i16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -4956,8 +4956,8 @@ define <vscale x 4 x i16> @test_vluxseg4_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg4_mask_nxv4i16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5059,8 +5059,8 @@ define <vscale x 8 x i16> @test_vluxseg4_nxv8i16_triscv.vector.tuple_nxv16i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv8i16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei16.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv16i8_4t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 4)
@@ -5072,8 +5072,8 @@ define <vscale x 8 x i16> @test_vluxseg4_mask_nxv8i16_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vluxseg4_mask_nxv8i16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei16.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5146,8 +5146,8 @@ define <vscale x 1 x i16> @test_vluxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -5159,8 +5159,8 @@ define <vscale x 1 x i16> @test_vluxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5175,8 +5175,8 @@ define <vscale x 1 x i16> @test_vluxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -5188,8 +5188,8 @@ define <vscale x 1 x i16> @test_vluxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5204,8 +5204,8 @@ define <vscale x 1 x i16> @test_vluxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -5217,8 +5217,8 @@ define <vscale x 1 x i16> @test_vluxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5233,8 +5233,8 @@ define <vscale x 1 x i16> @test_vluxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -5246,8 +5246,8 @@ define <vscale x 1 x i16> @test_vluxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5262,8 +5262,8 @@ define <vscale x 2 x i16> @test_vluxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -5275,8 +5275,8 @@ define <vscale x 2 x i16> @test_vluxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5291,8 +5291,8 @@ define <vscale x 2 x i16> @test_vluxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -5304,8 +5304,8 @@ define <vscale x 2 x i16> @test_vluxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5320,8 +5320,8 @@ define <vscale x 2 x i16> @test_vluxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -5333,8 +5333,8 @@ define <vscale x 2 x i16> @test_vluxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5349,8 +5349,8 @@ define <vscale x 2 x i16> @test_vluxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -5362,8 +5362,8 @@ define <vscale x 2 x i16> @test_vluxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5378,8 +5378,8 @@ define <vscale x 4 x i16> @test_vluxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -5391,8 +5391,8 @@ define <vscale x 4 x i16> @test_vluxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5407,8 +5407,8 @@ define <vscale x 4 x i16> @test_vluxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -5420,8 +5420,8 @@ define <vscale x 4 x i16> @test_vluxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5436,8 +5436,8 @@ define <vscale x 4 x i16> @test_vluxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -5449,8 +5449,8 @@ define <vscale x 4 x i16> @test_vluxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5494,8 +5494,8 @@ define <vscale x 1 x i16> @test_vluxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -5507,8 +5507,8 @@ define <vscale x 1 x i16> @test_vluxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5523,8 +5523,8 @@ define <vscale x 1 x i16> @test_vluxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -5536,8 +5536,8 @@ define <vscale x 1 x i16> @test_vluxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5552,8 +5552,8 @@ define <vscale x 1 x i16> @test_vluxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -5565,8 +5565,8 @@ define <vscale x 1 x i16> @test_vluxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5581,8 +5581,8 @@ define <vscale x 1 x i16> @test_vluxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -5594,8 +5594,8 @@ define <vscale x 1 x i16> @test_vluxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5610,8 +5610,8 @@ define <vscale x 2 x i16> @test_vluxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -5623,8 +5623,8 @@ define <vscale x 2 x i16> @test_vluxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5639,8 +5639,8 @@ define <vscale x 2 x i16> @test_vluxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -5652,8 +5652,8 @@ define <vscale x 2 x i16> @test_vluxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5668,8 +5668,8 @@ define <vscale x 2 x i16> @test_vluxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -5681,8 +5681,8 @@ define <vscale x 2 x i16> @test_vluxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5697,8 +5697,8 @@ define <vscale x 2 x i16> @test_vluxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -5710,8 +5710,8 @@ define <vscale x 2 x i16> @test_vluxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5726,8 +5726,8 @@ define <vscale x 4 x i16> @test_vluxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -5739,8 +5739,8 @@ define <vscale x 4 x i16> @test_vluxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5755,8 +5755,8 @@ define <vscale x 4 x i16> @test_vluxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -5768,8 +5768,8 @@ define <vscale x 4 x i16> @test_vluxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5784,8 +5784,8 @@ define <vscale x 4 x i16> @test_vluxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -5797,8 +5797,8 @@ define <vscale x 4 x i16> @test_vluxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5842,8 +5842,8 @@ define <vscale x 1 x i16> @test_vluxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -5855,8 +5855,8 @@ define <vscale x 1 x i16> @test_vluxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5871,8 +5871,8 @@ define <vscale x 1 x i16> @test_vluxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -5884,8 +5884,8 @@ define <vscale x 1 x i16> @test_vluxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5900,8 +5900,8 @@ define <vscale x 1 x i16> @test_vluxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -5913,8 +5913,8 @@ define <vscale x 1 x i16> @test_vluxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5929,8 +5929,8 @@ define <vscale x 1 x i16> @test_vluxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -5942,8 +5942,8 @@ define <vscale x 1 x i16> @test_vluxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5958,8 +5958,8 @@ define <vscale x 2 x i16> @test_vluxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -5971,8 +5971,8 @@ define <vscale x 2 x i16> @test_vluxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -5987,8 +5987,8 @@ define <vscale x 2 x i16> @test_vluxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -6000,8 +6000,8 @@ define <vscale x 2 x i16> @test_vluxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6016,8 +6016,8 @@ define <vscale x 2 x i16> @test_vluxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -6029,8 +6029,8 @@ define <vscale x 2 x i16> @test_vluxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6045,8 +6045,8 @@ define <vscale x 2 x i16> @test_vluxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -6058,8 +6058,8 @@ define <vscale x 2 x i16> @test_vluxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6074,8 +6074,8 @@ define <vscale x 4 x i16> @test_vluxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -6087,8 +6087,8 @@ define <vscale x 4 x i16> @test_vluxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6103,8 +6103,8 @@ define <vscale x 4 x i16> @test_vluxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -6116,8 +6116,8 @@ define <vscale x 4 x i16> @test_vluxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6132,8 +6132,8 @@ define <vscale x 4 x i16> @test_vluxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -6145,8 +6145,8 @@ define <vscale x 4 x i16> @test_vluxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6190,8 +6190,8 @@ define <vscale x 1 x i16> @test_vluxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -6203,8 +6203,8 @@ define <vscale x 1 x i16> @test_vluxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6219,8 +6219,8 @@ define <vscale x 1 x i16> @test_vluxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -6232,8 +6232,8 @@ define <vscale x 1 x i16> @test_vluxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6248,8 +6248,8 @@ define <vscale x 1 x i16> @test_vluxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -6261,8 +6261,8 @@ define <vscale x 1 x i16> @test_vluxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6277,8 +6277,8 @@ define <vscale x 1 x i16> @test_vluxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -6290,8 +6290,8 @@ define <vscale x 1 x i16> @test_vluxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6306,8 +6306,8 @@ define <vscale x 2 x i16> @test_vluxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -6319,8 +6319,8 @@ define <vscale x 2 x i16> @test_vluxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6335,8 +6335,8 @@ define <vscale x 2 x i16> @test_vluxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -6348,8 +6348,8 @@ define <vscale x 2 x i16> @test_vluxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6364,8 +6364,8 @@ define <vscale x 2 x i16> @test_vluxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -6377,8 +6377,8 @@ define <vscale x 2 x i16> @test_vluxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6393,8 +6393,8 @@ define <vscale x 2 x i16> @test_vluxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -6406,8 +6406,8 @@ define <vscale x 2 x i16> @test_vluxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6422,8 +6422,8 @@ define <vscale x 4 x i16> @test_vluxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -6435,8 +6435,8 @@ define <vscale x 4 x i16> @test_vluxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6451,8 +6451,8 @@ define <vscale x 4 x i16> @test_vluxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -6464,8 +6464,8 @@ define <vscale x 4 x i16> @test_vluxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6480,8 +6480,8 @@ define <vscale x 4 x i16> @test_vluxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -6493,8 +6493,8 @@ define <vscale x 4 x i16> @test_vluxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -6538,8 +6538,8 @@ define <vscale x 1 x i32> @test_vluxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -6551,8 +6551,8 @@ define <vscale x 1 x i32> @test_vluxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -6567,8 +6567,8 @@ define <vscale x 1 x i32> @test_vluxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -6580,8 +6580,8 @@ define <vscale x 1 x i32> @test_vluxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -6596,8 +6596,8 @@ define <vscale x 1 x i32> @test_vluxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -6609,8 +6609,8 @@ define <vscale x 1 x i32> @test_vluxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -6625,8 +6625,8 @@ define <vscale x 1 x i32> @test_vluxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei64.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -6638,8 +6638,8 @@ define <vscale x 1 x i32> @test_vluxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei64.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -6654,8 +6654,8 @@ define <vscale x 2 x i32> @test_vluxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -6667,8 +6667,8 @@ define <vscale x 2 x i32> @test_vluxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -6683,8 +6683,8 @@ define <vscale x 2 x i32> @test_vluxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -6696,8 +6696,8 @@ define <vscale x 2 x i32> @test_vluxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -6712,8 +6712,8 @@ define <vscale x 2 x i32> @test_vluxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -6725,8 +6725,8 @@ define <vscale x 2 x i32> @test_vluxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7002,8 +7002,8 @@ define <vscale x 1 x i32> @test_vluxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -7015,8 +7015,8 @@ define <vscale x 1 x i32> @test_vluxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7031,8 +7031,8 @@ define <vscale x 1 x i32> @test_vluxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -7044,8 +7044,8 @@ define <vscale x 1 x i32> @test_vluxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7060,8 +7060,8 @@ define <vscale x 1 x i32> @test_vluxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -7073,8 +7073,8 @@ define <vscale x 1 x i32> @test_vluxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7089,8 +7089,8 @@ define <vscale x 1 x i32> @test_vluxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei64.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -7102,8 +7102,8 @@ define <vscale x 1 x i32> @test_vluxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei64.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7118,8 +7118,8 @@ define <vscale x 2 x i32> @test_vluxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -7131,8 +7131,8 @@ define <vscale x 2 x i32> @test_vluxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7147,8 +7147,8 @@ define <vscale x 2 x i32> @test_vluxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -7160,8 +7160,8 @@ define <vscale x 2 x i32> @test_vluxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7176,8 +7176,8 @@ define <vscale x 2 x i32> @test_vluxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -7189,8 +7189,8 @@ define <vscale x 2 x i32> @test_vluxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7292,8 +7292,8 @@ define <vscale x 4 x i32> @test_vluxseg3_nxv4i32_triscv.vector.tuple_nxv16i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv4i32_triscv.vector.tuple_nxv16i8_3t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei32.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv16i8_3t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 5)
@@ -7305,8 +7305,8 @@ define <vscale x 4 x i32> @test_vluxseg3_mask_nxv4i32_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vluxseg3_mask_nxv4i32_triscv.vector.tuple_nxv16i8_3t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei32.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7350,8 +7350,8 @@ define <vscale x 1 x i32> @test_vluxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -7363,8 +7363,8 @@ define <vscale x 1 x i32> @test_vluxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7379,8 +7379,8 @@ define <vscale x 1 x i32> @test_vluxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -7392,8 +7392,8 @@ define <vscale x 1 x i32> @test_vluxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7408,8 +7408,8 @@ define <vscale x 1 x i32> @test_vluxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -7421,8 +7421,8 @@ define <vscale x 1 x i32> @test_vluxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7437,8 +7437,8 @@ define <vscale x 1 x i32> @test_vluxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei64.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -7450,8 +7450,8 @@ define <vscale x 1 x i32> @test_vluxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei64.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7466,8 +7466,8 @@ define <vscale x 2 x i32> @test_vluxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -7479,8 +7479,8 @@ define <vscale x 2 x i32> @test_vluxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7495,8 +7495,8 @@ define <vscale x 2 x i32> @test_vluxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -7508,8 +7508,8 @@ define <vscale x 2 x i32> @test_vluxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7524,8 +7524,8 @@ define <vscale x 2 x i32> @test_vluxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -7537,8 +7537,8 @@ define <vscale x 2 x i32> @test_vluxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7640,8 +7640,8 @@ define <vscale x 4 x i32> @test_vluxseg4_nxv4i32_triscv.vector.tuple_nxv16i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv4i32_triscv.vector.tuple_nxv16i8_4t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei32.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv16i8_4t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 5)
@@ -7653,8 +7653,8 @@ define <vscale x 4 x i32> @test_vluxseg4_mask_nxv4i32_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vluxseg4_mask_nxv4i32_triscv.vector.tuple_nxv16i8_4t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei32.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7698,8 +7698,8 @@ define <vscale x 1 x i32> @test_vluxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -7711,8 +7711,8 @@ define <vscale x 1 x i32> @test_vluxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7727,8 +7727,8 @@ define <vscale x 1 x i32> @test_vluxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -7740,8 +7740,8 @@ define <vscale x 1 x i32> @test_vluxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7756,8 +7756,8 @@ define <vscale x 1 x i32> @test_vluxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -7769,8 +7769,8 @@ define <vscale x 1 x i32> @test_vluxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7785,8 +7785,8 @@ define <vscale x 1 x i32> @test_vluxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -7798,8 +7798,8 @@ define <vscale x 1 x i32> @test_vluxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7814,8 +7814,8 @@ define <vscale x 2 x i32> @test_vluxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -7827,8 +7827,8 @@ define <vscale x 2 x i32> @test_vluxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7843,8 +7843,8 @@ define <vscale x 2 x i32> @test_vluxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -7856,8 +7856,8 @@ define <vscale x 2 x i32> @test_vluxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7872,8 +7872,8 @@ define <vscale x 2 x i32> @test_vluxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -7885,8 +7885,8 @@ define <vscale x 2 x i32> @test_vluxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7901,8 +7901,8 @@ define <vscale x 2 x i32> @test_vluxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 5)
@@ -7914,8 +7914,8 @@ define <vscale x 2 x i32> @test_vluxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7930,8 +7930,8 @@ define <vscale x 1 x i32> @test_vluxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -7943,8 +7943,8 @@ define <vscale x 1 x i32> @test_vluxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7959,8 +7959,8 @@ define <vscale x 1 x i32> @test_vluxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -7972,8 +7972,8 @@ define <vscale x 1 x i32> @test_vluxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -7988,8 +7988,8 @@ define <vscale x 1 x i32> @test_vluxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -8001,8 +8001,8 @@ define <vscale x 1 x i32> @test_vluxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8017,8 +8017,8 @@ define <vscale x 1 x i32> @test_vluxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -8030,8 +8030,8 @@ define <vscale x 1 x i32> @test_vluxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8046,8 +8046,8 @@ define <vscale x 2 x i32> @test_vluxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -8059,8 +8059,8 @@ define <vscale x 2 x i32> @test_vluxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8075,8 +8075,8 @@ define <vscale x 2 x i32> @test_vluxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -8088,8 +8088,8 @@ define <vscale x 2 x i32> @test_vluxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8104,8 +8104,8 @@ define <vscale x 2 x i32> @test_vluxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -8117,8 +8117,8 @@ define <vscale x 2 x i32> @test_vluxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8133,8 +8133,8 @@ define <vscale x 2 x i32> @test_vluxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 5)
@@ -8146,8 +8146,8 @@ define <vscale x 2 x i32> @test_vluxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8162,8 +8162,8 @@ define <vscale x 1 x i32> @test_vluxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -8175,8 +8175,8 @@ define <vscale x 1 x i32> @test_vluxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8191,8 +8191,8 @@ define <vscale x 1 x i32> @test_vluxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -8204,8 +8204,8 @@ define <vscale x 1 x i32> @test_vluxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8220,8 +8220,8 @@ define <vscale x 1 x i32> @test_vluxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -8233,8 +8233,8 @@ define <vscale x 1 x i32> @test_vluxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8249,8 +8249,8 @@ define <vscale x 1 x i32> @test_vluxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -8262,8 +8262,8 @@ define <vscale x 1 x i32> @test_vluxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8278,8 +8278,8 @@ define <vscale x 2 x i32> @test_vluxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -8291,8 +8291,8 @@ define <vscale x 2 x i32> @test_vluxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8307,8 +8307,8 @@ define <vscale x 2 x i32> @test_vluxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -8320,8 +8320,8 @@ define <vscale x 2 x i32> @test_vluxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8336,8 +8336,8 @@ define <vscale x 2 x i32> @test_vluxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -8349,8 +8349,8 @@ define <vscale x 2 x i32> @test_vluxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8365,8 +8365,8 @@ define <vscale x 2 x i32> @test_vluxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 5)
@@ -8378,8 +8378,8 @@ define <vscale x 2 x i32> @test_vluxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8394,8 +8394,8 @@ define <vscale x 1 x i32> @test_vluxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -8407,8 +8407,8 @@ define <vscale x 1 x i32> @test_vluxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8423,8 +8423,8 @@ define <vscale x 1 x i32> @test_vluxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -8436,8 +8436,8 @@ define <vscale x 1 x i32> @test_vluxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8452,8 +8452,8 @@ define <vscale x 1 x i32> @test_vluxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -8465,8 +8465,8 @@ define <vscale x 1 x i32> @test_vluxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8481,8 +8481,8 @@ define <vscale x 1 x i32> @test_vluxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -8494,8 +8494,8 @@ define <vscale x 1 x i32> @test_vluxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8510,8 +8510,8 @@ define <vscale x 2 x i32> @test_vluxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -8523,8 +8523,8 @@ define <vscale x 2 x i32> @test_vluxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8539,8 +8539,8 @@ define <vscale x 2 x i32> @test_vluxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -8552,8 +8552,8 @@ define <vscale x 2 x i32> @test_vluxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8568,8 +8568,8 @@ define <vscale x 2 x i32> @test_vluxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -8581,8 +8581,8 @@ define <vscale x 2 x i32> @test_vluxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8597,8 +8597,8 @@ define <vscale x 2 x i32> @test_vluxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 5)
@@ -8610,8 +8610,8 @@ define <vscale x 2 x i32> @test_vluxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -8626,8 +8626,8 @@ define <vscale x 1 x i64> @test_vluxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -8639,8 +8639,8 @@ define <vscale x 1 x i64> @test_vluxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -8655,8 +8655,8 @@ define <vscale x 1 x i64> @test_vluxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -8668,8 +8668,8 @@ define <vscale x 1 x i64> @test_vluxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -8684,8 +8684,8 @@ define <vscale x 1 x i64> @test_vluxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -8697,8 +8697,8 @@ define <vscale x 1 x i64> @test_vluxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -8713,8 +8713,8 @@ define <vscale x 1 x i64> @test_vluxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_n
; CHECK-LABEL: test_vluxseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei64.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -8726,8 +8726,8 @@ define <vscale x 1 x i64> @test_vluxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei64.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -8974,8 +8974,8 @@ define <vscale x 1 x i64> @test_vluxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -8987,8 +8987,8 @@ define <vscale x 1 x i64> @test_vluxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9003,8 +9003,8 @@ define <vscale x 1 x i64> @test_vluxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -9016,8 +9016,8 @@ define <vscale x 1 x i64> @test_vluxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9032,8 +9032,8 @@ define <vscale x 1 x i64> @test_vluxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -9045,8 +9045,8 @@ define <vscale x 1 x i64> @test_vluxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9061,8 +9061,8 @@ define <vscale x 1 x i64> @test_vluxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_n
; CHECK-LABEL: test_vluxseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei64.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -9074,8 +9074,8 @@ define <vscale x 1 x i64> @test_vluxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei64.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9177,8 +9177,8 @@ define <vscale x 2 x i64> @test_vluxseg3_nxv2i64_triscv.vector.tuple_nxv16i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv2i64_triscv.vector.tuple_nxv16i8_3t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei64.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv16i8_3t.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 6)
@@ -9190,8 +9190,8 @@ define <vscale x 2 x i64> @test_vluxseg3_mask_nxv2i64_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vluxseg3_mask_nxv2i64_triscv.vector.tuple_nxv16i8_3t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei64.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9206,8 +9206,8 @@ define <vscale x 1 x i64> @test_vluxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -9219,8 +9219,8 @@ define <vscale x 1 x i64> @test_vluxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9235,8 +9235,8 @@ define <vscale x 1 x i64> @test_vluxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -9248,8 +9248,8 @@ define <vscale x 1 x i64> @test_vluxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9264,8 +9264,8 @@ define <vscale x 1 x i64> @test_vluxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -9277,8 +9277,8 @@ define <vscale x 1 x i64> @test_vluxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9293,8 +9293,8 @@ define <vscale x 1 x i64> @test_vluxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_n
; CHECK-LABEL: test_vluxseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei64.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -9306,8 +9306,8 @@ define <vscale x 1 x i64> @test_vluxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei64.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9409,8 +9409,8 @@ define <vscale x 2 x i64> @test_vluxseg4_nxv2i64_triscv.vector.tuple_nxv16i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv2i64_triscv.vector.tuple_nxv16i8_4t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei64.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv16i8_4t.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 6)
@@ -9422,8 +9422,8 @@ define <vscale x 2 x i64> @test_vluxseg4_mask_nxv2i64_triscv.vector.tuple_nxv16i
; CHECK-LABEL: test_vluxseg4_mask_nxv2i64_triscv.vector.tuple_nxv16i8_4t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei64.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9438,8 +9438,8 @@ define <vscale x 1 x i64> @test_vluxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -9451,8 +9451,8 @@ define <vscale x 1 x i64> @test_vluxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9467,8 +9467,8 @@ define <vscale x 1 x i64> @test_vluxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -9480,8 +9480,8 @@ define <vscale x 1 x i64> @test_vluxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9496,8 +9496,8 @@ define <vscale x 1 x i64> @test_vluxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -9509,8 +9509,8 @@ define <vscale x 1 x i64> @test_vluxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9525,8 +9525,8 @@ define <vscale x 1 x i64> @test_vluxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_n
; CHECK-LABEL: test_vluxseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -9538,8 +9538,8 @@ define <vscale x 1 x i64> @test_vluxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9554,8 +9554,8 @@ define <vscale x 1 x i64> @test_vluxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -9567,8 +9567,8 @@ define <vscale x 1 x i64> @test_vluxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9583,8 +9583,8 @@ define <vscale x 1 x i64> @test_vluxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -9596,8 +9596,8 @@ define <vscale x 1 x i64> @test_vluxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9612,8 +9612,8 @@ define <vscale x 1 x i64> @test_vluxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -9625,8 +9625,8 @@ define <vscale x 1 x i64> @test_vluxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9641,8 +9641,8 @@ define <vscale x 1 x i64> @test_vluxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_n
; CHECK-LABEL: test_vluxseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -9654,8 +9654,8 @@ define <vscale x 1 x i64> @test_vluxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9670,8 +9670,8 @@ define <vscale x 1 x i64> @test_vluxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -9683,8 +9683,8 @@ define <vscale x 1 x i64> @test_vluxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9699,8 +9699,8 @@ define <vscale x 1 x i64> @test_vluxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -9712,8 +9712,8 @@ define <vscale x 1 x i64> @test_vluxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9728,8 +9728,8 @@ define <vscale x 1 x i64> @test_vluxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -9741,8 +9741,8 @@ define <vscale x 1 x i64> @test_vluxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9757,8 +9757,8 @@ define <vscale x 1 x i64> @test_vluxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_n
; CHECK-LABEL: test_vluxseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -9770,8 +9770,8 @@ define <vscale x 1 x i64> @test_vluxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9786,8 +9786,8 @@ define <vscale x 1 x i64> @test_vluxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -9799,8 +9799,8 @@ define <vscale x 1 x i64> @test_vluxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9815,8 +9815,8 @@ define <vscale x 1 x i64> @test_vluxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -9828,8 +9828,8 @@ define <vscale x 1 x i64> @test_vluxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9844,8 +9844,8 @@ define <vscale x 1 x i64> @test_vluxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -9857,8 +9857,8 @@ define <vscale x 1 x i64> @test_vluxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9873,8 +9873,8 @@ define <vscale x 1 x i64> @test_vluxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_n
; CHECK-LABEL: test_vluxseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -9886,8 +9886,8 @@ define <vscale x 1 x i64> @test_vluxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8
; CHECK-LABEL: test_vluxseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -9900,8 +9900,8 @@ define <vscale x 1 x half> @test_vluxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_
; CHECK-LABEL: test_vluxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -9913,8 +9913,8 @@ define <vscale x 1 x half> @test_vluxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -9927,8 +9927,8 @@ define <vscale x 1 x half> @test_vluxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_
; CHECK-LABEL: test_vluxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -9940,8 +9940,8 @@ define <vscale x 1 x half> @test_vluxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -9954,8 +9954,8 @@ define <vscale x 1 x half> @test_vluxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_
; CHECK-LABEL: test_vluxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -9967,8 +9967,8 @@ define <vscale x 1 x half> @test_vluxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -9981,8 +9981,8 @@ define <vscale x 1 x half> @test_vluxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_
; CHECK-LABEL: test_vluxseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei64.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -9994,8 +9994,8 @@ define <vscale x 1 x half> @test_vluxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei64.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10008,8 +10008,8 @@ define <vscale x 2 x half> @test_vluxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_
; CHECK-LABEL: test_vluxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -10021,8 +10021,8 @@ define <vscale x 2 x half> @test_vluxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10035,8 +10035,8 @@ define <vscale x 2 x half> @test_vluxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_
; CHECK-LABEL: test_vluxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -10048,8 +10048,8 @@ define <vscale x 2 x half> @test_vluxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10062,8 +10062,8 @@ define <vscale x 2 x half> @test_vluxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_
; CHECK-LABEL: test_vluxseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -10075,8 +10075,8 @@ define <vscale x 2 x half> @test_vluxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10116,8 +10116,8 @@ define <vscale x 4 x half> @test_vluxseg2_nxv4f16_triscv.vector.tuple_nxv8i8_2t_
; CHECK-LABEL: test_vluxseg2_nxv4f16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -10129,8 +10129,8 @@ define <vscale x 4 x half> @test_vluxseg2_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg2_mask_nxv4f16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10143,8 +10143,8 @@ define <vscale x 4 x half> @test_vluxseg2_nxv4f16_triscv.vector.tuple_nxv8i8_2t_
; CHECK-LABEL: test_vluxseg2_nxv4f16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -10156,8 +10156,8 @@ define <vscale x 4 x half> @test_vluxseg2_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg2_mask_nxv4f16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10413,8 +10413,8 @@ define <vscale x 1 x half> @test_vluxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -10426,8 +10426,8 @@ define <vscale x 1 x half> @test_vluxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10440,8 +10440,8 @@ define <vscale x 1 x half> @test_vluxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -10453,8 +10453,8 @@ define <vscale x 1 x half> @test_vluxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10467,8 +10467,8 @@ define <vscale x 1 x half> @test_vluxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -10480,8 +10480,8 @@ define <vscale x 1 x half> @test_vluxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10494,8 +10494,8 @@ define <vscale x 1 x half> @test_vluxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei64.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -10507,8 +10507,8 @@ define <vscale x 1 x half> @test_vluxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei64.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10521,8 +10521,8 @@ define <vscale x 2 x half> @test_vluxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -10534,8 +10534,8 @@ define <vscale x 2 x half> @test_vluxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10548,8 +10548,8 @@ define <vscale x 2 x half> @test_vluxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -10561,8 +10561,8 @@ define <vscale x 2 x half> @test_vluxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10575,8 +10575,8 @@ define <vscale x 2 x half> @test_vluxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -10588,8 +10588,8 @@ define <vscale x 2 x half> @test_vluxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10629,8 +10629,8 @@ define <vscale x 4 x half> @test_vluxseg3_nxv4f16_triscv.vector.tuple_nxv8i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv4f16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -10642,8 +10642,8 @@ define <vscale x 4 x half> @test_vluxseg3_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg3_mask_nxv4f16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10656,8 +10656,8 @@ define <vscale x 4 x half> @test_vluxseg3_nxv4f16_triscv.vector.tuple_nxv8i8_3t_
; CHECK-LABEL: test_vluxseg3_nxv4f16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -10669,8 +10669,8 @@ define <vscale x 4 x half> @test_vluxseg3_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg3_mask_nxv4f16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10764,8 +10764,8 @@ define <vscale x 8 x half> @test_vluxseg3_nxv8f16_triscv.vector.tuple_nxv16i8_3t
; CHECK-LABEL: test_vluxseg3_nxv8f16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei16.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv16i8_3t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 4)
@@ -10777,8 +10777,8 @@ define <vscale x 8 x half> @test_vluxseg3_mask_nxv8f16_triscv.vector.tuple_nxv16
; CHECK-LABEL: test_vluxseg3_mask_nxv8f16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei16.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10845,8 +10845,8 @@ define <vscale x 1 x half> @test_vluxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -10858,8 +10858,8 @@ define <vscale x 1 x half> @test_vluxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10872,8 +10872,8 @@ define <vscale x 1 x half> @test_vluxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -10885,8 +10885,8 @@ define <vscale x 1 x half> @test_vluxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10899,8 +10899,8 @@ define <vscale x 1 x half> @test_vluxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -10912,8 +10912,8 @@ define <vscale x 1 x half> @test_vluxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10926,8 +10926,8 @@ define <vscale x 1 x half> @test_vluxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei64.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -10939,8 +10939,8 @@ define <vscale x 1 x half> @test_vluxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei64.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10953,8 +10953,8 @@ define <vscale x 2 x half> @test_vluxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -10966,8 +10966,8 @@ define <vscale x 2 x half> @test_vluxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -10980,8 +10980,8 @@ define <vscale x 2 x half> @test_vluxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -10993,8 +10993,8 @@ define <vscale x 2 x half> @test_vluxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11007,8 +11007,8 @@ define <vscale x 2 x half> @test_vluxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -11020,8 +11020,8 @@ define <vscale x 2 x half> @test_vluxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11061,8 +11061,8 @@ define <vscale x 4 x half> @test_vluxseg4_nxv4f16_triscv.vector.tuple_nxv8i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv4f16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -11074,8 +11074,8 @@ define <vscale x 4 x half> @test_vluxseg4_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg4_mask_nxv4f16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11088,8 +11088,8 @@ define <vscale x 4 x half> @test_vluxseg4_nxv4f16_triscv.vector.tuple_nxv8i8_4t_
; CHECK-LABEL: test_vluxseg4_nxv4f16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -11101,8 +11101,8 @@ define <vscale x 4 x half> @test_vluxseg4_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg4_mask_nxv4f16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11196,8 +11196,8 @@ define <vscale x 8 x half> @test_vluxseg4_nxv8f16_triscv.vector.tuple_nxv16i8_4t
; CHECK-LABEL: test_vluxseg4_nxv8f16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei16.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv16i8_4t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 4)
@@ -11209,8 +11209,8 @@ define <vscale x 8 x half> @test_vluxseg4_mask_nxv8f16_triscv.vector.tuple_nxv16
; CHECK-LABEL: test_vluxseg4_mask_nxv8f16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei16.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11277,8 +11277,8 @@ define <vscale x 1 x half> @test_vluxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -11290,8 +11290,8 @@ define <vscale x 1 x half> @test_vluxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11304,8 +11304,8 @@ define <vscale x 1 x half> @test_vluxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -11317,8 +11317,8 @@ define <vscale x 1 x half> @test_vluxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11331,8 +11331,8 @@ define <vscale x 1 x half> @test_vluxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -11344,8 +11344,8 @@ define <vscale x 1 x half> @test_vluxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11358,8 +11358,8 @@ define <vscale x 1 x half> @test_vluxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -11371,8 +11371,8 @@ define <vscale x 1 x half> @test_vluxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11385,8 +11385,8 @@ define <vscale x 2 x half> @test_vluxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -11398,8 +11398,8 @@ define <vscale x 2 x half> @test_vluxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11412,8 +11412,8 @@ define <vscale x 2 x half> @test_vluxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -11425,8 +11425,8 @@ define <vscale x 2 x half> @test_vluxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11439,8 +11439,8 @@ define <vscale x 2 x half> @test_vluxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -11452,8 +11452,8 @@ define <vscale x 2 x half> @test_vluxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11466,8 +11466,8 @@ define <vscale x 2 x half> @test_vluxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -11479,8 +11479,8 @@ define <vscale x 2 x half> @test_vluxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11493,8 +11493,8 @@ define <vscale x 4 x half> @test_vluxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -11506,8 +11506,8 @@ define <vscale x 4 x half> @test_vluxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11520,8 +11520,8 @@ define <vscale x 4 x half> @test_vluxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -11533,8 +11533,8 @@ define <vscale x 4 x half> @test_vluxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11547,8 +11547,8 @@ define <vscale x 4 x half> @test_vluxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_
; CHECK-LABEL: test_vluxseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -11560,8 +11560,8 @@ define <vscale x 4 x half> @test_vluxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11601,8 +11601,8 @@ define <vscale x 1 x half> @test_vluxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -11614,8 +11614,8 @@ define <vscale x 1 x half> @test_vluxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11628,8 +11628,8 @@ define <vscale x 1 x half> @test_vluxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -11641,8 +11641,8 @@ define <vscale x 1 x half> @test_vluxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11655,8 +11655,8 @@ define <vscale x 1 x half> @test_vluxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -11668,8 +11668,8 @@ define <vscale x 1 x half> @test_vluxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11682,8 +11682,8 @@ define <vscale x 1 x half> @test_vluxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -11695,8 +11695,8 @@ define <vscale x 1 x half> @test_vluxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11709,8 +11709,8 @@ define <vscale x 2 x half> @test_vluxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -11722,8 +11722,8 @@ define <vscale x 2 x half> @test_vluxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11736,8 +11736,8 @@ define <vscale x 2 x half> @test_vluxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -11749,8 +11749,8 @@ define <vscale x 2 x half> @test_vluxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11763,8 +11763,8 @@ define <vscale x 2 x half> @test_vluxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -11776,8 +11776,8 @@ define <vscale x 2 x half> @test_vluxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11790,8 +11790,8 @@ define <vscale x 2 x half> @test_vluxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -11803,8 +11803,8 @@ define <vscale x 2 x half> @test_vluxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11817,8 +11817,8 @@ define <vscale x 4 x half> @test_vluxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -11830,8 +11830,8 @@ define <vscale x 4 x half> @test_vluxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11844,8 +11844,8 @@ define <vscale x 4 x half> @test_vluxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -11857,8 +11857,8 @@ define <vscale x 4 x half> @test_vluxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11871,8 +11871,8 @@ define <vscale x 4 x half> @test_vluxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_
; CHECK-LABEL: test_vluxseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -11884,8 +11884,8 @@ define <vscale x 4 x half> @test_vluxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11925,8 +11925,8 @@ define <vscale x 1 x half> @test_vluxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -11938,8 +11938,8 @@ define <vscale x 1 x half> @test_vluxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11952,8 +11952,8 @@ define <vscale x 1 x half> @test_vluxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -11965,8 +11965,8 @@ define <vscale x 1 x half> @test_vluxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -11979,8 +11979,8 @@ define <vscale x 1 x half> @test_vluxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -11992,8 +11992,8 @@ define <vscale x 1 x half> @test_vluxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12006,8 +12006,8 @@ define <vscale x 1 x half> @test_vluxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -12019,8 +12019,8 @@ define <vscale x 1 x half> @test_vluxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12033,8 +12033,8 @@ define <vscale x 2 x half> @test_vluxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -12046,8 +12046,8 @@ define <vscale x 2 x half> @test_vluxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12060,8 +12060,8 @@ define <vscale x 2 x half> @test_vluxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -12073,8 +12073,8 @@ define <vscale x 2 x half> @test_vluxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12087,8 +12087,8 @@ define <vscale x 2 x half> @test_vluxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -12100,8 +12100,8 @@ define <vscale x 2 x half> @test_vluxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12114,8 +12114,8 @@ define <vscale x 2 x half> @test_vluxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -12127,8 +12127,8 @@ define <vscale x 2 x half> @test_vluxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12141,8 +12141,8 @@ define <vscale x 4 x half> @test_vluxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -12154,8 +12154,8 @@ define <vscale x 4 x half> @test_vluxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12168,8 +12168,8 @@ define <vscale x 4 x half> @test_vluxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -12181,8 +12181,8 @@ define <vscale x 4 x half> @test_vluxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12195,8 +12195,8 @@ define <vscale x 4 x half> @test_vluxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_
; CHECK-LABEL: test_vluxseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -12208,8 +12208,8 @@ define <vscale x 4 x half> @test_vluxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12249,8 +12249,8 @@ define <vscale x 1 x half> @test_vluxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -12262,8 +12262,8 @@ define <vscale x 1 x half> @test_vluxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12276,8 +12276,8 @@ define <vscale x 1 x half> @test_vluxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -12289,8 +12289,8 @@ define <vscale x 1 x half> @test_vluxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12303,8 +12303,8 @@ define <vscale x 1 x half> @test_vluxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -12316,8 +12316,8 @@ define <vscale x 1 x half> @test_vluxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12330,8 +12330,8 @@ define <vscale x 1 x half> @test_vluxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -12343,8 +12343,8 @@ define <vscale x 1 x half> @test_vluxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i
; CHECK-LABEL: test_vluxseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12357,8 +12357,8 @@ define <vscale x 2 x half> @test_vluxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -12370,8 +12370,8 @@ define <vscale x 2 x half> @test_vluxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12384,8 +12384,8 @@ define <vscale x 2 x half> @test_vluxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -12397,8 +12397,8 @@ define <vscale x 2 x half> @test_vluxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12411,8 +12411,8 @@ define <vscale x 2 x half> @test_vluxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -12424,8 +12424,8 @@ define <vscale x 2 x half> @test_vluxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12438,8 +12438,8 @@ define <vscale x 2 x half> @test_vluxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -12451,8 +12451,8 @@ define <vscale x 2 x half> @test_vluxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i
; CHECK-LABEL: test_vluxseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12465,8 +12465,8 @@ define <vscale x 4 x half> @test_vluxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -12478,8 +12478,8 @@ define <vscale x 4 x half> @test_vluxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12492,8 +12492,8 @@ define <vscale x 4 x half> @test_vluxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -12505,8 +12505,8 @@ define <vscale x 4 x half> @test_vluxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12519,8 +12519,8 @@ define <vscale x 4 x half> @test_vluxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_
; CHECK-LABEL: test_vluxseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -12532,8 +12532,8 @@ define <vscale x 4 x half> @test_vluxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i
; CHECK-LABEL: test_vluxseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -12573,8 +12573,8 @@ define <vscale x 1 x float> @test_vluxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t
; CHECK-LABEL: test_vluxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -12586,8 +12586,8 @@ define <vscale x 1 x float> @test_vluxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -12600,8 +12600,8 @@ define <vscale x 1 x float> @test_vluxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t
; CHECK-LABEL: test_vluxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -12613,8 +12613,8 @@ define <vscale x 1 x float> @test_vluxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -12627,8 +12627,8 @@ define <vscale x 1 x float> @test_vluxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t
; CHECK-LABEL: test_vluxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -12640,8 +12640,8 @@ define <vscale x 1 x float> @test_vluxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -12654,8 +12654,8 @@ define <vscale x 1 x float> @test_vluxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t
; CHECK-LABEL: test_vluxseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei64.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -12667,8 +12667,8 @@ define <vscale x 1 x float> @test_vluxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg2_mask_nxv1f32_triscv.vector.tuple_nxv4i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei64.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -12681,8 +12681,8 @@ define <vscale x 2 x float> @test_vluxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t
; CHECK-LABEL: test_vluxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -12694,8 +12694,8 @@ define <vscale x 2 x float> @test_vluxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -12708,8 +12708,8 @@ define <vscale x 2 x float> @test_vluxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t
; CHECK-LABEL: test_vluxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -12721,8 +12721,8 @@ define <vscale x 2 x float> @test_vluxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -12735,8 +12735,8 @@ define <vscale x 2 x float> @test_vluxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t
; CHECK-LABEL: test_vluxseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -12748,8 +12748,8 @@ define <vscale x 2 x float> @test_vluxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg2_mask_nxv2f32_triscv.vector.tuple_nxv8i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13005,8 +13005,8 @@ define <vscale x 1 x float> @test_vluxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t
; CHECK-LABEL: test_vluxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -13018,8 +13018,8 @@ define <vscale x 1 x float> @test_vluxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13032,8 +13032,8 @@ define <vscale x 1 x float> @test_vluxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t
; CHECK-LABEL: test_vluxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -13045,8 +13045,8 @@ define <vscale x 1 x float> @test_vluxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13059,8 +13059,8 @@ define <vscale x 1 x float> @test_vluxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t
; CHECK-LABEL: test_vluxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -13072,8 +13072,8 @@ define <vscale x 1 x float> @test_vluxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13086,8 +13086,8 @@ define <vscale x 1 x float> @test_vluxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t
; CHECK-LABEL: test_vluxseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei64.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -13099,8 +13099,8 @@ define <vscale x 1 x float> @test_vluxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg3_mask_nxv1f32_triscv.vector.tuple_nxv4i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei64.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13113,8 +13113,8 @@ define <vscale x 2 x float> @test_vluxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t
; CHECK-LABEL: test_vluxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -13126,8 +13126,8 @@ define <vscale x 2 x float> @test_vluxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13140,8 +13140,8 @@ define <vscale x 2 x float> @test_vluxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t
; CHECK-LABEL: test_vluxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -13153,8 +13153,8 @@ define <vscale x 2 x float> @test_vluxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13167,8 +13167,8 @@ define <vscale x 2 x float> @test_vluxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t
; CHECK-LABEL: test_vluxseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -13180,8 +13180,8 @@ define <vscale x 2 x float> @test_vluxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg3_mask_nxv2f32_triscv.vector.tuple_nxv8i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13275,8 +13275,8 @@ define <vscale x 4 x float> @test_vluxseg3_nxv4f32_triscv.vector.tuple_nxv16i8_3
; CHECK-LABEL: test_vluxseg3_nxv4f32_triscv.vector.tuple_nxv16i8_3t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei32.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv16i8_3t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 5)
@@ -13288,8 +13288,8 @@ define <vscale x 4 x float> @test_vluxseg3_mask_nxv4f32_triscv.vector.tuple_nxv1
; CHECK-LABEL: test_vluxseg3_mask_nxv4f32_triscv.vector.tuple_nxv16i8_3t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei32.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13329,8 +13329,8 @@ define <vscale x 1 x float> @test_vluxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t
; CHECK-LABEL: test_vluxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -13342,8 +13342,8 @@ define <vscale x 1 x float> @test_vluxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13356,8 +13356,8 @@ define <vscale x 1 x float> @test_vluxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t
; CHECK-LABEL: test_vluxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -13369,8 +13369,8 @@ define <vscale x 1 x float> @test_vluxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13383,8 +13383,8 @@ define <vscale x 1 x float> @test_vluxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t
; CHECK-LABEL: test_vluxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -13396,8 +13396,8 @@ define <vscale x 1 x float> @test_vluxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13410,8 +13410,8 @@ define <vscale x 1 x float> @test_vluxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t
; CHECK-LABEL: test_vluxseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei64.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -13423,8 +13423,8 @@ define <vscale x 1 x float> @test_vluxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg4_mask_nxv1f32_triscv.vector.tuple_nxv4i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei64.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13437,8 +13437,8 @@ define <vscale x 2 x float> @test_vluxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t
; CHECK-LABEL: test_vluxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -13450,8 +13450,8 @@ define <vscale x 2 x float> @test_vluxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13464,8 +13464,8 @@ define <vscale x 2 x float> @test_vluxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t
; CHECK-LABEL: test_vluxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -13477,8 +13477,8 @@ define <vscale x 2 x float> @test_vluxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13491,8 +13491,8 @@ define <vscale x 2 x float> @test_vluxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t
; CHECK-LABEL: test_vluxseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -13504,8 +13504,8 @@ define <vscale x 2 x float> @test_vluxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg4_mask_nxv2f32_triscv.vector.tuple_nxv8i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13599,8 +13599,8 @@ define <vscale x 4 x float> @test_vluxseg4_nxv4f32_triscv.vector.tuple_nxv16i8_4
; CHECK-LABEL: test_vluxseg4_nxv4f32_triscv.vector.tuple_nxv16i8_4t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei32.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv16i8_4t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 5)
@@ -13612,8 +13612,8 @@ define <vscale x 4 x float> @test_vluxseg4_mask_nxv4f32_triscv.vector.tuple_nxv1
; CHECK-LABEL: test_vluxseg4_mask_nxv4f32_triscv.vector.tuple_nxv16i8_4t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei32.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13653,8 +13653,8 @@ define <vscale x 1 x float> @test_vluxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t
; CHECK-LABEL: test_vluxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -13666,8 +13666,8 @@ define <vscale x 1 x float> @test_vluxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13680,8 +13680,8 @@ define <vscale x 1 x float> @test_vluxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t
; CHECK-LABEL: test_vluxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -13693,8 +13693,8 @@ define <vscale x 1 x float> @test_vluxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13707,8 +13707,8 @@ define <vscale x 1 x float> @test_vluxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t
; CHECK-LABEL: test_vluxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -13720,8 +13720,8 @@ define <vscale x 1 x float> @test_vluxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13734,8 +13734,8 @@ define <vscale x 1 x float> @test_vluxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t
; CHECK-LABEL: test_vluxseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -13747,8 +13747,8 @@ define <vscale x 1 x float> @test_vluxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg5_mask_nxv1f32_triscv.vector.tuple_nxv4i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13761,8 +13761,8 @@ define <vscale x 2 x float> @test_vluxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t
; CHECK-LABEL: test_vluxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -13774,8 +13774,8 @@ define <vscale x 2 x float> @test_vluxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13788,8 +13788,8 @@ define <vscale x 2 x float> @test_vluxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t
; CHECK-LABEL: test_vluxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -13801,8 +13801,8 @@ define <vscale x 2 x float> @test_vluxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13815,8 +13815,8 @@ define <vscale x 2 x float> @test_vluxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t
; CHECK-LABEL: test_vluxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -13828,8 +13828,8 @@ define <vscale x 2 x float> @test_vluxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13842,8 +13842,8 @@ define <vscale x 2 x float> @test_vluxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t
; CHECK-LABEL: test_vluxseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 5)
@@ -13855,8 +13855,8 @@ define <vscale x 2 x float> @test_vluxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg5_mask_nxv2f32_triscv.vector.tuple_nxv8i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13869,8 +13869,8 @@ define <vscale x 1 x float> @test_vluxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t
; CHECK-LABEL: test_vluxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -13882,8 +13882,8 @@ define <vscale x 1 x float> @test_vluxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13896,8 +13896,8 @@ define <vscale x 1 x float> @test_vluxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t
; CHECK-LABEL: test_vluxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -13909,8 +13909,8 @@ define <vscale x 1 x float> @test_vluxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13923,8 +13923,8 @@ define <vscale x 1 x float> @test_vluxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t
; CHECK-LABEL: test_vluxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -13936,8 +13936,8 @@ define <vscale x 1 x float> @test_vluxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13950,8 +13950,8 @@ define <vscale x 1 x float> @test_vluxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t
; CHECK-LABEL: test_vluxseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -13963,8 +13963,8 @@ define <vscale x 1 x float> @test_vluxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg6_mask_nxv1f32_triscv.vector.tuple_nxv4i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -13977,8 +13977,8 @@ define <vscale x 2 x float> @test_vluxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t
; CHECK-LABEL: test_vluxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -13990,8 +13990,8 @@ define <vscale x 2 x float> @test_vluxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14004,8 +14004,8 @@ define <vscale x 2 x float> @test_vluxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t
; CHECK-LABEL: test_vluxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -14017,8 +14017,8 @@ define <vscale x 2 x float> @test_vluxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14031,8 +14031,8 @@ define <vscale x 2 x float> @test_vluxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t
; CHECK-LABEL: test_vluxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -14044,8 +14044,8 @@ define <vscale x 2 x float> @test_vluxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14058,8 +14058,8 @@ define <vscale x 2 x float> @test_vluxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t
; CHECK-LABEL: test_vluxseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 5)
@@ -14071,8 +14071,8 @@ define <vscale x 2 x float> @test_vluxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg6_mask_nxv2f32_triscv.vector.tuple_nxv8i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14085,8 +14085,8 @@ define <vscale x 1 x float> @test_vluxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t
; CHECK-LABEL: test_vluxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -14098,8 +14098,8 @@ define <vscale x 1 x float> @test_vluxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14112,8 +14112,8 @@ define <vscale x 1 x float> @test_vluxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t
; CHECK-LABEL: test_vluxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -14125,8 +14125,8 @@ define <vscale x 1 x float> @test_vluxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14139,8 +14139,8 @@ define <vscale x 1 x float> @test_vluxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t
; CHECK-LABEL: test_vluxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -14152,8 +14152,8 @@ define <vscale x 1 x float> @test_vluxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14166,8 +14166,8 @@ define <vscale x 1 x float> @test_vluxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t
; CHECK-LABEL: test_vluxseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -14179,8 +14179,8 @@ define <vscale x 1 x float> @test_vluxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg7_mask_nxv1f32_triscv.vector.tuple_nxv4i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14193,8 +14193,8 @@ define <vscale x 2 x float> @test_vluxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t
; CHECK-LABEL: test_vluxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -14206,8 +14206,8 @@ define <vscale x 2 x float> @test_vluxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14220,8 +14220,8 @@ define <vscale x 2 x float> @test_vluxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t
; CHECK-LABEL: test_vluxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -14233,8 +14233,8 @@ define <vscale x 2 x float> @test_vluxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14247,8 +14247,8 @@ define <vscale x 2 x float> @test_vluxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t
; CHECK-LABEL: test_vluxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -14260,8 +14260,8 @@ define <vscale x 2 x float> @test_vluxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14274,8 +14274,8 @@ define <vscale x 2 x float> @test_vluxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t
; CHECK-LABEL: test_vluxseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 5)
@@ -14287,8 +14287,8 @@ define <vscale x 2 x float> @test_vluxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg7_mask_nxv2f32_triscv.vector.tuple_nxv8i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14301,8 +14301,8 @@ define <vscale x 1 x float> @test_vluxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t
; CHECK-LABEL: test_vluxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 5)
@@ -14314,8 +14314,8 @@ define <vscale x 1 x float> @test_vluxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14328,8 +14328,8 @@ define <vscale x 1 x float> @test_vluxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t
; CHECK-LABEL: test_vluxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 5)
@@ -14341,8 +14341,8 @@ define <vscale x 1 x float> @test_vluxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14355,8 +14355,8 @@ define <vscale x 1 x float> @test_vluxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t
; CHECK-LABEL: test_vluxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 5)
@@ -14368,8 +14368,8 @@ define <vscale x 1 x float> @test_vluxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14382,8 +14382,8 @@ define <vscale x 1 x float> @test_vluxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t
; CHECK-LABEL: test_vluxseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 5)
@@ -14395,8 +14395,8 @@ define <vscale x 1 x float> @test_vluxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4
; CHECK-LABEL: test_vluxseg8_mask_nxv1f32_triscv.vector.tuple_nxv4i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14409,8 +14409,8 @@ define <vscale x 2 x float> @test_vluxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t
; CHECK-LABEL: test_vluxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 5)
@@ -14422,8 +14422,8 @@ define <vscale x 2 x float> @test_vluxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14436,8 +14436,8 @@ define <vscale x 2 x float> @test_vluxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t
; CHECK-LABEL: test_vluxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 5)
@@ -14449,8 +14449,8 @@ define <vscale x 2 x float> @test_vluxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14463,8 +14463,8 @@ define <vscale x 2 x float> @test_vluxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t
; CHECK-LABEL: test_vluxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 5)
@@ -14476,8 +14476,8 @@ define <vscale x 2 x float> @test_vluxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14490,8 +14490,8 @@ define <vscale x 2 x float> @test_vluxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t
; CHECK-LABEL: test_vluxseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 5)
@@ -14503,8 +14503,8 @@ define <vscale x 2 x float> @test_vluxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8
; CHECK-LABEL: test_vluxseg8_mask_nxv2f32_triscv.vector.tuple_nxv8i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 5)
@@ -14517,8 +14517,8 @@ define <vscale x 1 x double> @test_vluxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2
; CHECK-LABEL: test_vluxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -14530,8 +14530,8 @@ define <vscale x 1 x double> @test_vluxseg2_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg2_mask_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -14544,8 +14544,8 @@ define <vscale x 1 x double> @test_vluxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2
; CHECK-LABEL: test_vluxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -14557,8 +14557,8 @@ define <vscale x 1 x double> @test_vluxseg2_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg2_mask_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -14571,8 +14571,8 @@ define <vscale x 1 x double> @test_vluxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2
; CHECK-LABEL: test_vluxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -14584,8 +14584,8 @@ define <vscale x 1 x double> @test_vluxseg2_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg2_mask_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -14598,8 +14598,8 @@ define <vscale x 1 x double> @test_vluxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2
; CHECK-LABEL: test_vluxseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei64.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -14611,8 +14611,8 @@ define <vscale x 1 x double> @test_vluxseg2_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg2_mask_nxv1f64_triscv.vector.tuple_nxv8i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei64.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -14841,8 +14841,8 @@ define <vscale x 1 x double> @test_vluxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3
; CHECK-LABEL: test_vluxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -14854,8 +14854,8 @@ define <vscale x 1 x double> @test_vluxseg3_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg3_mask_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -14868,8 +14868,8 @@ define <vscale x 1 x double> @test_vluxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3
; CHECK-LABEL: test_vluxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -14881,8 +14881,8 @@ define <vscale x 1 x double> @test_vluxseg3_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg3_mask_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -14895,8 +14895,8 @@ define <vscale x 1 x double> @test_vluxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3
; CHECK-LABEL: test_vluxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -14908,8 +14908,8 @@ define <vscale x 1 x double> @test_vluxseg3_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg3_mask_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -14922,8 +14922,8 @@ define <vscale x 1 x double> @test_vluxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3
; CHECK-LABEL: test_vluxseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei64.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -14935,8 +14935,8 @@ define <vscale x 1 x double> @test_vluxseg3_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg3_mask_nxv1f64_triscv.vector.tuple_nxv8i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei64.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15030,8 +15030,8 @@ define <vscale x 2 x double> @test_vluxseg3_nxv2f64_triscv.vector.tuple_nxv16i8_
; CHECK-LABEL: test_vluxseg3_nxv2f64_triscv.vector.tuple_nxv16i8_3t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei64.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv16i8_3t.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 6)
@@ -15043,8 +15043,8 @@ define <vscale x 2 x double> @test_vluxseg3_mask_nxv2f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg3_mask_nxv2f64_triscv.vector.tuple_nxv16i8_3t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei64.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15057,8 +15057,8 @@ define <vscale x 1 x double> @test_vluxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4
; CHECK-LABEL: test_vluxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -15070,8 +15070,8 @@ define <vscale x 1 x double> @test_vluxseg4_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg4_mask_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15084,8 +15084,8 @@ define <vscale x 1 x double> @test_vluxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4
; CHECK-LABEL: test_vluxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -15097,8 +15097,8 @@ define <vscale x 1 x double> @test_vluxseg4_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg4_mask_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15111,8 +15111,8 @@ define <vscale x 1 x double> @test_vluxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4
; CHECK-LABEL: test_vluxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -15124,8 +15124,8 @@ define <vscale x 1 x double> @test_vluxseg4_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg4_mask_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15138,8 +15138,8 @@ define <vscale x 1 x double> @test_vluxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4
; CHECK-LABEL: test_vluxseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei64.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -15151,8 +15151,8 @@ define <vscale x 1 x double> @test_vluxseg4_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg4_mask_nxv1f64_triscv.vector.tuple_nxv8i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei64.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15246,8 +15246,8 @@ define <vscale x 2 x double> @test_vluxseg4_nxv2f64_triscv.vector.tuple_nxv16i8_
; CHECK-LABEL: test_vluxseg4_nxv2f64_triscv.vector.tuple_nxv16i8_4t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei64.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv16i8_4t.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 6)
@@ -15259,8 +15259,8 @@ define <vscale x 2 x double> @test_vluxseg4_mask_nxv2f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg4_mask_nxv2f64_triscv.vector.tuple_nxv16i8_4t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei64.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15273,8 +15273,8 @@ define <vscale x 1 x double> @test_vluxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vluxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -15286,8 +15286,8 @@ define <vscale x 1 x double> @test_vluxseg5_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg5_mask_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15300,8 +15300,8 @@ define <vscale x 1 x double> @test_vluxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vluxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -15313,8 +15313,8 @@ define <vscale x 1 x double> @test_vluxseg5_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg5_mask_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15327,8 +15327,8 @@ define <vscale x 1 x double> @test_vluxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vluxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -15340,8 +15340,8 @@ define <vscale x 1 x double> @test_vluxseg5_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg5_mask_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15354,8 +15354,8 @@ define <vscale x 1 x double> @test_vluxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5
; CHECK-LABEL: test_vluxseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -15367,8 +15367,8 @@ define <vscale x 1 x double> @test_vluxseg5_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg5_mask_nxv1f64_triscv.vector.tuple_nxv8i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15381,8 +15381,8 @@ define <vscale x 1 x double> @test_vluxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vluxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -15394,8 +15394,8 @@ define <vscale x 1 x double> @test_vluxseg6_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg6_mask_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15408,8 +15408,8 @@ define <vscale x 1 x double> @test_vluxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vluxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -15421,8 +15421,8 @@ define <vscale x 1 x double> @test_vluxseg6_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg6_mask_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15435,8 +15435,8 @@ define <vscale x 1 x double> @test_vluxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vluxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -15448,8 +15448,8 @@ define <vscale x 1 x double> @test_vluxseg6_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg6_mask_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15462,8 +15462,8 @@ define <vscale x 1 x double> @test_vluxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6
; CHECK-LABEL: test_vluxseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -15475,8 +15475,8 @@ define <vscale x 1 x double> @test_vluxseg6_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg6_mask_nxv1f64_triscv.vector.tuple_nxv8i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15489,8 +15489,8 @@ define <vscale x 1 x double> @test_vluxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vluxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -15502,8 +15502,8 @@ define <vscale x 1 x double> @test_vluxseg7_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg7_mask_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15516,8 +15516,8 @@ define <vscale x 1 x double> @test_vluxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vluxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -15529,8 +15529,8 @@ define <vscale x 1 x double> @test_vluxseg7_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg7_mask_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15543,8 +15543,8 @@ define <vscale x 1 x double> @test_vluxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vluxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -15556,8 +15556,8 @@ define <vscale x 1 x double> @test_vluxseg7_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg7_mask_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15570,8 +15570,8 @@ define <vscale x 1 x double> @test_vluxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7
; CHECK-LABEL: test_vluxseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -15583,8 +15583,8 @@ define <vscale x 1 x double> @test_vluxseg7_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg7_mask_nxv1f64_triscv.vector.tuple_nxv8i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15597,8 +15597,8 @@ define <vscale x 1 x double> @test_vluxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vluxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 6)
@@ -15610,8 +15610,8 @@ define <vscale x 1 x double> @test_vluxseg8_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg8_mask_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15624,8 +15624,8 @@ define <vscale x 1 x double> @test_vluxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vluxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 6)
@@ -15637,8 +15637,8 @@ define <vscale x 1 x double> @test_vluxseg8_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg8_mask_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15651,8 +15651,8 @@ define <vscale x 1 x double> @test_vluxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vluxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 6)
@@ -15664,8 +15664,8 @@ define <vscale x 1 x double> @test_vluxseg8_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg8_mask_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15678,8 +15678,8 @@ define <vscale x 1 x double> @test_vluxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8
; CHECK-LABEL: test_vluxseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 6)
@@ -15691,8 +15691,8 @@ define <vscale x 1 x double> @test_vluxseg8_mask_nxv1f64_triscv.vector.tuple_nxv
; CHECK-LABEL: test_vluxseg8_mask_nxv1f64_triscv.vector.tuple_nxv8i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 6)
@@ -15705,8 +15705,8 @@ define <vscale x 1 x bfloat> @test_vluxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -15718,8 +15718,8 @@ define <vscale x 1 x bfloat> @test_vluxseg2_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg2_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -15732,8 +15732,8 @@ define <vscale x 1 x bfloat> @test_vluxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -15745,8 +15745,8 @@ define <vscale x 1 x bfloat> @test_vluxseg2_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg2_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -15759,8 +15759,8 @@ define <vscale x 1 x bfloat> @test_vluxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -15772,8 +15772,8 @@ define <vscale x 1 x bfloat> @test_vluxseg2_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg2_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -15786,8 +15786,8 @@ define <vscale x 1 x bfloat> @test_vluxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei64.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv2i8_2t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -15799,8 +15799,8 @@ define <vscale x 1 x bfloat> @test_vluxseg2_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg2_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_2t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg2ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei64.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -15813,8 +15813,8 @@ define <vscale x 2 x bfloat> @test_vluxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -15826,8 +15826,8 @@ define <vscale x 2 x bfloat> @test_vluxseg2_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg2_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -15840,8 +15840,8 @@ define <vscale x 2 x bfloat> @test_vluxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -15853,8 +15853,8 @@ define <vscale x 2 x bfloat> @test_vluxseg2_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg2_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -15867,8 +15867,8 @@ define <vscale x 2 x bfloat> @test_vluxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv4i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -15880,8 +15880,8 @@ define <vscale x 2 x bfloat> @test_vluxseg2_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg2_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_2t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg2ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei32.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -15921,8 +15921,8 @@ define <vscale x 4 x bfloat> @test_vluxseg2_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg2_nxv4bf16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -15934,8 +15934,8 @@ define <vscale x 4 x bfloat> @test_vluxseg2_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg2_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_2t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei8.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -15948,8 +15948,8 @@ define <vscale x 4 x bfloat> @test_vluxseg2_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg2_nxv4bf16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv8i8_2t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -15961,8 +15961,8 @@ define <vscale x 4 x bfloat> @test_vluxseg2_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg2_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_2t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg2ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v9, v8
+; CHECK-NEXT: vluxseg2ei16.v v7, (a0), v9, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16218,8 +16218,8 @@ define <vscale x 1 x bfloat> @test_vluxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -16231,8 +16231,8 @@ define <vscale x 1 x bfloat> @test_vluxseg3_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg3_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16245,8 +16245,8 @@ define <vscale x 1 x bfloat> @test_vluxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -16258,8 +16258,8 @@ define <vscale x 1 x bfloat> @test_vluxseg3_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg3_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16272,8 +16272,8 @@ define <vscale x 1 x bfloat> @test_vluxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -16285,8 +16285,8 @@ define <vscale x 1 x bfloat> @test_vluxseg3_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg3_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16299,8 +16299,8 @@ define <vscale x 1 x bfloat> @test_vluxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei64.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv2i8_3t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -16312,8 +16312,8 @@ define <vscale x 1 x bfloat> @test_vluxseg3_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg3_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_3t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg3ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei64.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16326,8 +16326,8 @@ define <vscale x 2 x bfloat> @test_vluxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -16339,8 +16339,8 @@ define <vscale x 2 x bfloat> @test_vluxseg3_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg3_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16353,8 +16353,8 @@ define <vscale x 2 x bfloat> @test_vluxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -16366,8 +16366,8 @@ define <vscale x 2 x bfloat> @test_vluxseg3_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg3_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16380,8 +16380,8 @@ define <vscale x 2 x bfloat> @test_vluxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv4i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -16393,8 +16393,8 @@ define <vscale x 2 x bfloat> @test_vluxseg3_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg3_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_3t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg3ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei32.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16434,8 +16434,8 @@ define <vscale x 4 x bfloat> @test_vluxseg3_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg3_nxv4bf16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -16447,8 +16447,8 @@ define <vscale x 4 x bfloat> @test_vluxseg3_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg3_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_3t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei8.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16461,8 +16461,8 @@ define <vscale x 4 x bfloat> @test_vluxseg3_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg3_nxv4bf16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv8i8_3t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -16474,8 +16474,8 @@ define <vscale x 4 x bfloat> @test_vluxseg3_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg3_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_3t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v10, v8
+; CHECK-NEXT: vluxseg3ei16.v v7, (a0), v10, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16569,8 +16569,8 @@ define <vscale x 8 x bfloat> @test_vluxseg3_nxv8bf16_triscv.vector.tuple_nxv16i8
; CHECK-LABEL: test_vluxseg3_nxv8bf16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei16.v v6, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv16i8_3t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 4)
@@ -16582,8 +16582,8 @@ define <vscale x 8 x bfloat> @test_vluxseg3_mask_nxv8bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg3_mask_nxv8bf16_triscv.vector.tuple_nxv16i8_3t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg3ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg3ei16.v v6, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16650,8 +16650,8 @@ define <vscale x 1 x bfloat> @test_vluxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -16663,8 +16663,8 @@ define <vscale x 1 x bfloat> @test_vluxseg4_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg4_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16677,8 +16677,8 @@ define <vscale x 1 x bfloat> @test_vluxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -16690,8 +16690,8 @@ define <vscale x 1 x bfloat> @test_vluxseg4_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg4_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16704,8 +16704,8 @@ define <vscale x 1 x bfloat> @test_vluxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -16717,8 +16717,8 @@ define <vscale x 1 x bfloat> @test_vluxseg4_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg4_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16731,8 +16731,8 @@ define <vscale x 1 x bfloat> @test_vluxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei64.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv2i8_4t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -16744,8 +16744,8 @@ define <vscale x 1 x bfloat> @test_vluxseg4_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg4_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_4t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg4ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei64.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16758,8 +16758,8 @@ define <vscale x 2 x bfloat> @test_vluxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -16771,8 +16771,8 @@ define <vscale x 2 x bfloat> @test_vluxseg4_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg4_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16785,8 +16785,8 @@ define <vscale x 2 x bfloat> @test_vluxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -16798,8 +16798,8 @@ define <vscale x 2 x bfloat> @test_vluxseg4_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg4_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16812,8 +16812,8 @@ define <vscale x 2 x bfloat> @test_vluxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv4i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -16825,8 +16825,8 @@ define <vscale x 2 x bfloat> @test_vluxseg4_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg4_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_4t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg4ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei32.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16866,8 +16866,8 @@ define <vscale x 4 x bfloat> @test_vluxseg4_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg4_nxv4bf16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -16879,8 +16879,8 @@ define <vscale x 4 x bfloat> @test_vluxseg4_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg4_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_4t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei8.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -16893,8 +16893,8 @@ define <vscale x 4 x bfloat> @test_vluxseg4_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg4_nxv4bf16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv8i8_4t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -16906,8 +16906,8 @@ define <vscale x 4 x bfloat> @test_vluxseg4_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg4_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_4t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v11, v8
+; CHECK-NEXT: vluxseg4ei16.v v7, (a0), v11, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17001,8 +17001,8 @@ define <vscale x 8 x bfloat> @test_vluxseg4_nxv8bf16_triscv.vector.tuple_nxv16i8
; CHECK-LABEL: test_vluxseg4_nxv8bf16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v10, (a0), v8
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei16.v v6, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv16i8_4t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, i64 %vl, i64 4)
@@ -17014,8 +17014,8 @@ define <vscale x 8 x bfloat> @test_vluxseg4_mask_nxv8bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg4_mask_nxv8bf16_triscv.vector.tuple_nxv16i8_4t_nxv8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
-; CHECK-NEXT: vluxseg4ei16.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv2r.v v8, v12
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg4ei16.v v6, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv8i1.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr %base, <vscale x 8 x i16> %index, <vscale x 8 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17082,8 +17082,8 @@ define <vscale x 1 x bfloat> @test_vluxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -17095,8 +17095,8 @@ define <vscale x 1 x bfloat> @test_vluxseg5_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17109,8 +17109,8 @@ define <vscale x 1 x bfloat> @test_vluxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -17122,8 +17122,8 @@ define <vscale x 1 x bfloat> @test_vluxseg5_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17136,8 +17136,8 @@ define <vscale x 1 x bfloat> @test_vluxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -17149,8 +17149,8 @@ define <vscale x 1 x bfloat> @test_vluxseg5_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17163,8 +17163,8 @@ define <vscale x 1 x bfloat> @test_vluxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv2i8_5t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -17176,8 +17176,8 @@ define <vscale x 1 x bfloat> @test_vluxseg5_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_5t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17190,8 +17190,8 @@ define <vscale x 2 x bfloat> @test_vluxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -17203,8 +17203,8 @@ define <vscale x 2 x bfloat> @test_vluxseg5_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17217,8 +17217,8 @@ define <vscale x 2 x bfloat> @test_vluxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -17230,8 +17230,8 @@ define <vscale x 2 x bfloat> @test_vluxseg5_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17244,8 +17244,8 @@ define <vscale x 2 x bfloat> @test_vluxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -17257,8 +17257,8 @@ define <vscale x 2 x bfloat> @test_vluxseg5_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17271,8 +17271,8 @@ define <vscale x 2 x bfloat> @test_vluxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv4i8_5t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -17284,8 +17284,8 @@ define <vscale x 2 x bfloat> @test_vluxseg5_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_5t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg5ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei64.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17298,8 +17298,8 @@ define <vscale x 4 x bfloat> @test_vluxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -17311,8 +17311,8 @@ define <vscale x 4 x bfloat> @test_vluxseg5_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei8.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17325,8 +17325,8 @@ define <vscale x 4 x bfloat> @test_vluxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -17338,8 +17338,8 @@ define <vscale x 4 x bfloat> @test_vluxseg5_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v12, v8
+; CHECK-NEXT: vluxseg5ei16.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17352,8 +17352,8 @@ define <vscale x 4 x bfloat> @test_vluxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv8i8_5t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -17365,8 +17365,8 @@ define <vscale x 4 x bfloat> @test_vluxseg5_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg5_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_5t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg5ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v12, v8
+; CHECK-NEXT: vluxseg5ei32.v v7, (a0), v12, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17406,8 +17406,8 @@ define <vscale x 1 x bfloat> @test_vluxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -17419,8 +17419,8 @@ define <vscale x 1 x bfloat> @test_vluxseg6_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17433,8 +17433,8 @@ define <vscale x 1 x bfloat> @test_vluxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -17446,8 +17446,8 @@ define <vscale x 1 x bfloat> @test_vluxseg6_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17460,8 +17460,8 @@ define <vscale x 1 x bfloat> @test_vluxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -17473,8 +17473,8 @@ define <vscale x 1 x bfloat> @test_vluxseg6_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17487,8 +17487,8 @@ define <vscale x 1 x bfloat> @test_vluxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv2i8_6t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -17500,8 +17500,8 @@ define <vscale x 1 x bfloat> @test_vluxseg6_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_6t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17514,8 +17514,8 @@ define <vscale x 2 x bfloat> @test_vluxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -17527,8 +17527,8 @@ define <vscale x 2 x bfloat> @test_vluxseg6_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17541,8 +17541,8 @@ define <vscale x 2 x bfloat> @test_vluxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -17554,8 +17554,8 @@ define <vscale x 2 x bfloat> @test_vluxseg6_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17568,8 +17568,8 @@ define <vscale x 2 x bfloat> @test_vluxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -17581,8 +17581,8 @@ define <vscale x 2 x bfloat> @test_vluxseg6_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17595,8 +17595,8 @@ define <vscale x 2 x bfloat> @test_vluxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv4i8_6t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -17608,8 +17608,8 @@ define <vscale x 2 x bfloat> @test_vluxseg6_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_6t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg6ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17622,8 +17622,8 @@ define <vscale x 4 x bfloat> @test_vluxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -17635,8 +17635,8 @@ define <vscale x 4 x bfloat> @test_vluxseg6_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei8.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17649,8 +17649,8 @@ define <vscale x 4 x bfloat> @test_vluxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -17662,8 +17662,8 @@ define <vscale x 4 x bfloat> @test_vluxseg6_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v13, v8
+; CHECK-NEXT: vluxseg6ei16.v v7, (a0), v13, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17676,8 +17676,8 @@ define <vscale x 4 x bfloat> @test_vluxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv8i8_6t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -17689,8 +17689,8 @@ define <vscale x 4 x bfloat> @test_vluxseg6_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg6_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_6t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg6ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg6ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17730,8 +17730,8 @@ define <vscale x 1 x bfloat> @test_vluxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -17743,8 +17743,8 @@ define <vscale x 1 x bfloat> @test_vluxseg7_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17757,8 +17757,8 @@ define <vscale x 1 x bfloat> @test_vluxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -17770,8 +17770,8 @@ define <vscale x 1 x bfloat> @test_vluxseg7_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17784,8 +17784,8 @@ define <vscale x 1 x bfloat> @test_vluxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -17797,8 +17797,8 @@ define <vscale x 1 x bfloat> @test_vluxseg7_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17811,8 +17811,8 @@ define <vscale x 1 x bfloat> @test_vluxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv2i8_7t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -17824,8 +17824,8 @@ define <vscale x 1 x bfloat> @test_vluxseg7_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_7t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17838,8 +17838,8 @@ define <vscale x 2 x bfloat> @test_vluxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -17851,8 +17851,8 @@ define <vscale x 2 x bfloat> @test_vluxseg7_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17865,8 +17865,8 @@ define <vscale x 2 x bfloat> @test_vluxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -17878,8 +17878,8 @@ define <vscale x 2 x bfloat> @test_vluxseg7_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17892,8 +17892,8 @@ define <vscale x 2 x bfloat> @test_vluxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -17905,8 +17905,8 @@ define <vscale x 2 x bfloat> @test_vluxseg7_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17919,8 +17919,8 @@ define <vscale x 2 x bfloat> @test_vluxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv4i8_7t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -17932,8 +17932,8 @@ define <vscale x 2 x bfloat> @test_vluxseg7_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_7t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg7ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei64.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17946,8 +17946,8 @@ define <vscale x 4 x bfloat> @test_vluxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -17959,8 +17959,8 @@ define <vscale x 4 x bfloat> @test_vluxseg7_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei8.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -17973,8 +17973,8 @@ define <vscale x 4 x bfloat> @test_vluxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -17986,8 +17986,8 @@ define <vscale x 4 x bfloat> @test_vluxseg7_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v14, v8
+; CHECK-NEXT: vluxseg7ei16.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18000,8 +18000,8 @@ define <vscale x 4 x bfloat> @test_vluxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv8i8_7t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -18013,8 +18013,8 @@ define <vscale x 4 x bfloat> @test_vluxseg7_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg7_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_7t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg7ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v14, v8
+; CHECK-NEXT: vluxseg7ei32.v v7, (a0), v14, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18054,8 +18054,8 @@ define <vscale x 1 x bfloat> @test_vluxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, i64 %vl, i64 4)
@@ -18067,8 +18067,8 @@ define <vscale x 1 x bfloat> @test_vluxseg8_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18081,8 +18081,8 @@ define <vscale x 1 x bfloat> @test_vluxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, i64 %vl, i64 4)
@@ -18094,8 +18094,8 @@ define <vscale x 1 x bfloat> @test_vluxseg8_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i16> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18108,8 +18108,8 @@ define <vscale x 1 x bfloat> @test_vluxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, i64 %vl, i64 4)
@@ -18121,8 +18121,8 @@ define <vscale x 1 x bfloat> @test_vluxseg8_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i32(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i32> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18135,8 +18135,8 @@ define <vscale x 1 x bfloat> @test_vluxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_
; CHECK-LABEL: test_vluxseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv2i8_8t.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, i64 %vl, i64 4)
@@ -18148,8 +18148,8 @@ define <vscale x 1 x bfloat> @test_vluxseg8_mask_nxv1bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_8t_nxv1i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1.nxv1i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison, ptr %base, <vscale x 1 x i64> %index, <vscale x 1 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18162,8 +18162,8 @@ define <vscale x 2 x bfloat> @test_vluxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, i64 %vl, i64 4)
@@ -18175,8 +18175,8 @@ define <vscale x 2 x bfloat> @test_vluxseg8_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i8> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18189,8 +18189,8 @@ define <vscale x 2 x bfloat> @test_vluxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, i64 %vl, i64 4)
@@ -18202,8 +18202,8 @@ define <vscale x 2 x bfloat> @test_vluxseg8_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i16> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18216,8 +18216,8 @@ define <vscale x 2 x bfloat> @test_vluxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, i64 %vl, i64 4)
@@ -18229,8 +18229,8 @@ define <vscale x 2 x bfloat> @test_vluxseg8_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i32> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18243,8 +18243,8 @@ define <vscale x 2 x bfloat> @test_vluxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_
; CHECK-LABEL: test_vluxseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv4i8_8t.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, i64 %vl, i64 4)
@@ -18256,8 +18256,8 @@ define <vscale x 2 x bfloat> @test_vluxseg8_mask_nxv2bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_8t_nxv2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
-; CHECK-NEXT: vluxseg8ei64.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei64.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1.nxv2i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison, ptr %base, <vscale x 2 x i64> %index, <vscale x 2 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18270,8 +18270,8 @@ define <vscale x 4 x bfloat> @test_vluxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, i64 %vl, i64 4)
@@ -18283,8 +18283,8 @@ define <vscale x 4 x bfloat> @test_vluxseg8_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei8.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i8> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18297,8 +18297,8 @@ define <vscale x 4 x bfloat> @test_vluxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, i64 %vl, i64 4)
@@ -18310,8 +18310,8 @@ define <vscale x 4 x bfloat> @test_vluxseg8_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei16.v v9, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv1r.v v15, v8
+; CHECK-NEXT: vluxseg8ei16.v v7, (a0), v15, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i16> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
@@ -18324,8 +18324,8 @@ define <vscale x 4 x bfloat> @test_vluxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_
; CHECK-LABEL: test_vluxseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v10, (a0), v8
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v16
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv8i8_8t.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, i64 %vl, i64 4)
@@ -18337,8 +18337,8 @@ define <vscale x 4 x bfloat> @test_vluxseg8_mask_nxv4bf16_triscv.vector.tuple_nx
; CHECK-LABEL: test_vluxseg8_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_8t_nxv4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
-; CHECK-NEXT: vluxseg8ei32.v v10, (a0), v8, v0.t
-; CHECK-NEXT: vmv1r.v v8, v11
+; CHECK-NEXT: vmv2r.v v16, v8
+; CHECK-NEXT: vluxseg8ei32.v v7, (a0), v16, v0.t
; CHECK-NEXT: ret
entry:
%0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1.nxv4i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison, ptr %base, <vscale x 4 x i32> %index, <vscale x 4 x i1> %mask, i64 %vl, i64 1, i64 4)
diff --git a/llvm/test/CodeGen/RISCV/zilsd.ll b/llvm/test/CodeGen/RISCV/zilsd.ll
index 048ce964f9e18..7f2d2dd120306 100644
--- a/llvm/test/CodeGen/RISCV/zilsd.ll
+++ b/llvm/test/CodeGen/RISCV/zilsd.ll
@@ -7,10 +7,9 @@
define i64 @load(ptr %a) nounwind {
; CHECK-LABEL: load:
; CHECK: # %bb.0:
-; CHECK-NEXT: ld a2, 80(a0)
-; CHECK-NEXT: ld zero, 0(a0)
-; CHECK-NEXT: mv a0, a2
-; CHECK-NEXT: mv a1, a3
+; CHECK-NEXT: mv a2, a0
+; CHECK-NEXT: ld a0, 80(a0)
+; CHECK-NEXT: ld zero, 0(a2)
; CHECK-NEXT: ret
%1 = getelementptr i64, ptr %a, i32 10
%2 = load i64, ptr %1
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