[llvm] 81f83a8 - [RISCV][NFC] Parsed Immediates are Expressions (#159888)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 21 14:28:28 PDT 2025
Author: Sam Elliott
Date: 2025-09-21T14:28:24-07:00
New Revision: 81f83a85db27600ef571299fc9dc88063dba4a6f
URL: https://github.com/llvm/llvm-project/commit/81f83a85db27600ef571299fc9dc88063dba4a6f
DIFF: https://github.com/llvm/llvm-project/commit/81f83a85db27600ef571299fc9dc88063dba4a6f.diff
LOG: [RISCV][NFC] Parsed Immediates are Expressions (#159888)
I find it very confusing that we have two different kinds of
"immediates":
- MCOperands in the backend that are `isImm()` which can only be numbers
- RISCVOperands in the parser that are `isImm()` which can contain
expressions
This change aims to make it clearer that in the AsmParser, we are
dealing with expressions, rather than just numbers.
Unfortunately, `isImm` comes from the `MCParsedAsmOperand`, which is
needed for Microsoft Inline Asm, so we cannot fully get rid of it.
Added:
Modified:
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index 2b5f18d611524..50891da333f01 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -195,7 +195,7 @@ class RISCVAsmParser : public MCTargetAsmParser {
ParseStatus parseCSRSystemRegister(OperandVector &Operands);
ParseStatus parseFPImm(OperandVector &Operands);
- ParseStatus parseImmediate(OperandVector &Operands);
+ ParseStatus parseExpression(OperandVector &Operands);
ParseStatus parseRegister(OperandVector &Operands, bool AllowParens = false);
ParseStatus parseMemOpBaseReg(OperandVector &Operands);
ParseStatus parseZeroOffsetMemOp(OperandVector &Operands);
@@ -340,7 +340,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
enum class KindTy {
Token,
Register,
- Immediate,
+ Expression,
FPImmediate,
SystemRegister,
VType,
@@ -356,8 +356,8 @@ struct RISCVOperand final : public MCParsedAsmOperand {
bool IsGPRAsFPR;
};
- struct ImmOp {
- const MCExpr *Val;
+ struct ExprOp {
+ const MCExpr *Expr;
bool IsRV64;
};
@@ -402,7 +402,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
union {
StringRef Tok;
RegOp Reg;
- ImmOp Imm;
+ ExprOp Expr;
FPImmOp FPImm;
SysRegOp SysReg;
VTypeOp VType;
@@ -424,8 +424,8 @@ struct RISCVOperand final : public MCParsedAsmOperand {
case KindTy::Register:
Reg = o.Reg;
break;
- case KindTy::Immediate:
- Imm = o.Imm;
+ case KindTy::Expression:
+ Expr = o.Expr;
break;
case KindTy::FPImmediate:
FPImm = o.FPImm;
@@ -459,6 +459,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
bool isToken() const override { return Kind == KindTy::Token; }
bool isReg() const override { return Kind == KindTy::Register; }
+ bool isExpr() const { return Kind == KindTy::Expression; }
bool isV0Reg() const {
return Kind == KindTy::Register && Reg.RegNum == RISCV::V0;
}
@@ -475,7 +476,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
RISCVMCRegisterClasses[RISCV::FPR64CRegClassID].contains(
Reg.RegNum));
}
- bool isImm() const override { return Kind == KindTy::Immediate; }
+ bool isImm() const override { return isExpr(); }
bool isMem() const override { return false; }
bool isSystemRegister() const { return Kind == KindTy::SystemRegister; }
bool isRegReg() const { return Kind == KindTy::RegReg; }
@@ -523,7 +524,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
bool isGPRAsFPR32() const { return isGPRF32() && Reg.IsGPRAsFPR; }
bool isGPRPairAsFPR64() const { return isGPRPair() && Reg.IsGPRAsFPR; }
- static bool evaluateConstantImm(const MCExpr *Expr, int64_t &Imm) {
+ static bool evaluateConstantExpr(const MCExpr *Expr, int64_t &Imm) {
if (auto CE = dyn_cast<MCConstantExpr>(Expr)) {
Imm = CE->getValue();
return true;
@@ -535,30 +536,30 @@ struct RISCVOperand final : public MCParsedAsmOperand {
// True if operand is a symbol with no modifiers, or a constant with no
// modifiers and isShiftedInt<N-1, 1>(Op).
template <int N> bool isBareSimmNLsb0() const {
- if (!isImm())
+ if (!isExpr())
return false;
int64_t Imm;
- if (evaluateConstantImm(getImm(), Imm))
- return isShiftedInt<N - 1, 1>(fixImmediateForRV32(Imm, isRV64Imm()));
+ if (evaluateConstantExpr(getExpr(), Imm))
+ return isShiftedInt<N - 1, 1>(fixImmediateForRV32(Imm, isRV64Expr()));
RISCV::Specifier VK = RISCV::S_None;
- return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
+ return RISCVAsmParser::classifySymbolRef(getExpr(), VK) &&
VK == RISCV::S_None;
}
// True if operand is a symbol with no modifiers, or a constant with no
// modifiers and isInt<N>(Op).
template <int N> bool isBareSimmN() const {
- if (!isImm())
+ if (!isExpr())
return false;
int64_t Imm;
- if (evaluateConstantImm(getImm(), Imm))
- return isInt<N>(fixImmediateForRV32(Imm, isRV64Imm()));
+ if (evaluateConstantExpr(getExpr(), Imm))
+ return isInt<N>(fixImmediateForRV32(Imm, isRV64Expr()));
RISCV::Specifier VK = RISCV::S_None;
- return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
+ return RISCVAsmParser::classifySymbolRef(getExpr(), VK) &&
VK == RISCV::S_None;
}
@@ -567,55 +568,55 @@ struct RISCVOperand final : public MCParsedAsmOperand {
bool isBareSymbol() const {
int64_t Imm;
// Must be of 'immediate' type but not a constant.
- if (!isImm() || evaluateConstantImm(getImm(), Imm))
+ if (!isExpr() || evaluateConstantExpr(getExpr(), Imm))
return false;
RISCV::Specifier VK = RISCV::S_None;
- return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
+ return RISCVAsmParser::classifySymbolRef(getExpr(), VK) &&
VK == RISCV::S_None;
}
bool isCallSymbol() const {
int64_t Imm;
// Must be of 'immediate' type but not a constant.
- if (!isImm() || evaluateConstantImm(getImm(), Imm))
+ if (!isExpr() || evaluateConstantExpr(getExpr(), Imm))
return false;
RISCV::Specifier VK = RISCV::S_None;
- return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
+ return RISCVAsmParser::classifySymbolRef(getExpr(), VK) &&
VK == ELF::R_RISCV_CALL_PLT;
}
bool isPseudoJumpSymbol() const {
int64_t Imm;
// Must be of 'immediate' type but not a constant.
- if (!isImm() || evaluateConstantImm(getImm(), Imm))
+ if (!isExpr() || evaluateConstantExpr(getExpr(), Imm))
return false;
RISCV::Specifier VK = RISCV::S_None;
- return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
+ return RISCVAsmParser::classifySymbolRef(getExpr(), VK) &&
VK == ELF::R_RISCV_CALL_PLT;
}
bool isTPRelAddSymbol() const {
int64_t Imm;
// Must be of 'immediate' type but not a constant.
- if (!isImm() || evaluateConstantImm(getImm(), Imm))
+ if (!isExpr() || evaluateConstantExpr(getExpr(), Imm))
return false;
RISCV::Specifier VK = RISCV::S_None;
- return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
+ return RISCVAsmParser::classifySymbolRef(getExpr(), VK) &&
VK == ELF::R_RISCV_TPREL_ADD;
}
bool isTLSDESCCallSymbol() const {
int64_t Imm;
// Must be of 'immediate' type but not a constant.
- if (!isImm() || evaluateConstantImm(getImm(), Imm))
+ if (!isExpr() || evaluateConstantExpr(getExpr(), Imm))
return false;
RISCV::Specifier VK = RISCV::S_None;
- return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
+ return RISCVAsmParser::classifySymbolRef(getExpr(), VK) &&
VK == ELF::R_RISCV_TLSDESC_CALL;
}
@@ -649,7 +650,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
/// Return true if the operand is a valid fli.s floating-point immediate.
bool isLoadFPImm() const {
- if (isImm())
+ if (isExpr())
return isUImm5();
if (Kind != KindTy::FPImmediate)
return false;
@@ -662,64 +663,64 @@ struct RISCVOperand final : public MCParsedAsmOperand {
bool isImmXLenLI() const {
int64_t Imm;
- if (!isImm())
+ if (!isExpr())
return false;
// Given only Imm, ensuring that the actually specified constant is either
// a signed or unsigned 64-bit number is unfortunately impossible.
- if (evaluateConstantImm(getImm(), Imm))
- return isRV64Imm() || (isInt<32>(Imm) || isUInt<32>(Imm));
+ if (evaluateConstantExpr(getExpr(), Imm))
+ return isRV64Expr() || (isInt<32>(Imm) || isUInt<32>(Imm));
- return RISCVAsmParser::isSymbolDiff(getImm());
+ return RISCVAsmParser::isSymbolDiff(getExpr());
}
bool isImmXLenLI_Restricted() const {
int64_t Imm;
- if (!isImm())
+ if (!isExpr())
return false;
- bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
+ bool IsConstantImm = evaluateConstantExpr(getExpr(), Imm);
// 'la imm' supports constant immediates only.
return IsConstantImm &&
- (isRV64Imm() || (isInt<32>(Imm) || isUInt<32>(Imm)));
+ (isRV64Expr() || (isInt<32>(Imm) || isUInt<32>(Imm)));
}
template <unsigned N> bool isUImm() const {
int64_t Imm;
- if (!isImm())
+ if (!isExpr())
return false;
- bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
+ bool IsConstantImm = evaluateConstantExpr(getExpr(), Imm);
return IsConstantImm && isUInt<N>(Imm);
}
template <unsigned N, unsigned S> bool isUImmShifted() const {
int64_t Imm;
- if (!isImm())
+ if (!isExpr())
return false;
- bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
+ bool IsConstantImm = evaluateConstantExpr(getExpr(), Imm);
return IsConstantImm && isShiftedUInt<N, S>(Imm);
}
template <class Pred> bool isUImmPred(Pred p) const {
int64_t Imm;
- if (!isImm())
+ if (!isExpr())
return false;
- bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
+ bool IsConstantImm = evaluateConstantExpr(getExpr(), Imm);
return IsConstantImm && p(Imm);
}
bool isUImmLog2XLen() const {
- if (isImm() && isRV64Imm())
+ if (isExpr() && isRV64Expr())
return isUImm<6>();
return isUImm<5>();
}
bool isUImmLog2XLenNonZero() const {
- if (isImm() && isRV64Imm())
+ if (isExpr() && isRV64Expr())
return isUImmPred([](int64_t Imm) { return Imm != 0 && isUInt<6>(Imm); });
return isUImmPred([](int64_t Imm) { return Imm != 0 && isUInt<5>(Imm); });
}
bool isUImmLog2XLenHalf() const {
- if (isImm() && isRV64Imm())
+ if (isExpr() && isRV64Expr())
return isUImm<5>();
return isUImm<4>();
}
@@ -792,18 +793,18 @@ struct RISCVOperand final : public MCParsedAsmOperand {
template <unsigned N> bool isSImm() const {
int64_t Imm;
- if (!isImm())
+ if (!isExpr())
return false;
- bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
- return IsConstantImm && isInt<N>(fixImmediateForRV32(Imm, isRV64Imm()));
+ bool IsConstantImm = evaluateConstantExpr(getExpr(), Imm);
+ return IsConstantImm && isInt<N>(fixImmediateForRV32(Imm, isRV64Expr()));
}
template <class Pred> bool isSImmPred(Pred p) const {
int64_t Imm;
- if (!isImm())
+ if (!isExpr())
return false;
- bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
- return IsConstantImm && p(fixImmediateForRV32(Imm, isRV64Imm()));
+ bool IsConstantImm = evaluateConstantExpr(getExpr(), Imm);
+ return IsConstantImm && p(fixImmediateForRV32(Imm, isRV64Expr()));
}
bool isSImm5() const { return isSImm<5>(); }
@@ -859,15 +860,15 @@ struct RISCVOperand final : public MCParsedAsmOperand {
}
bool isSImm12() const {
- if (!isImm())
+ if (!isExpr())
return false;
int64_t Imm;
- if (evaluateConstantImm(getImm(), Imm))
- return isInt<12>(fixImmediateForRV32(Imm, isRV64Imm()));
+ if (evaluateConstantExpr(getExpr(), Imm))
+ return isInt<12>(fixImmediateForRV32(Imm, isRV64Expr()));
RISCV::Specifier VK = RISCV::S_None;
- return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
+ return RISCVAsmParser::classifySymbolRef(getExpr(), VK) &&
(VK == RISCV::S_LO || VK == RISCV::S_PCREL_LO ||
VK == RISCV::S_TPREL_LO || VK == ELF::R_RISCV_TLSDESC_LOAD_LO12 ||
VK == ELF::R_RISCV_TLSDESC_ADD_LO12);
@@ -891,15 +892,15 @@ struct RISCVOperand final : public MCParsedAsmOperand {
}
bool isSImm20LI() const {
- if (!isImm())
+ if (!isExpr())
return false;
int64_t Imm;
- if (evaluateConstantImm(getImm(), Imm))
- return isInt<20>(fixImmediateForRV32(Imm, isRV64Imm()));
+ if (evaluateConstantExpr(getExpr(), Imm))
+ return isInt<20>(fixImmediateForRV32(Imm, isRV64Expr()));
RISCV::Specifier VK = RISCV::S_None;
- return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
+ return RISCVAsmParser::classifySymbolRef(getExpr(), VK) &&
VK == RISCV::S_QC_ABS20;
}
@@ -907,28 +908,28 @@ struct RISCVOperand final : public MCParsedAsmOperand {
bool isSImm10Unsigned() const { return isSImm<10>() || isUImm<10>(); }
bool isUImm20LUI() const {
- if (!isImm())
+ if (!isExpr())
return false;
int64_t Imm;
- if (evaluateConstantImm(getImm(), Imm))
+ if (evaluateConstantExpr(getExpr(), Imm))
return isUInt<20>(Imm);
RISCV::Specifier VK = RISCV::S_None;
- return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
+ return RISCVAsmParser::classifySymbolRef(getExpr(), VK) &&
(VK == ELF::R_RISCV_HI20 || VK == ELF::R_RISCV_TPREL_HI20);
}
bool isUImm20AUIPC() const {
- if (!isImm())
+ if (!isExpr())
return false;
int64_t Imm;
- if (evaluateConstantImm(getImm(), Imm))
+ if (evaluateConstantExpr(getExpr(), Imm))
return isUInt<20>(Imm);
RISCV::Specifier VK = RISCV::S_None;
- return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
+ return RISCVAsmParser::classifySymbolRef(getExpr(), VK) &&
(VK == ELF::R_RISCV_PCREL_HI20 || VK == ELF::R_RISCV_GOT_HI20 ||
VK == ELF::R_RISCV_TLS_GOT_HI20 || VK == ELF::R_RISCV_TLS_GD_HI20 ||
VK == ELF::R_RISCV_TLSDESC_HI20);
@@ -980,10 +981,11 @@ struct RISCVOperand final : public MCParsedAsmOperand {
SMLoc getStartLoc() const override { return StartLoc; }
/// getEndLoc - Gets location of the last token of this operand
SMLoc getEndLoc() const override { return EndLoc; }
+
/// True if this operand is for an RV64 instruction
- bool isRV64Imm() const {
- assert(Kind == KindTy::Immediate && "Invalid type access!");
- return Imm.IsRV64;
+ bool isRV64Expr() const {
+ assert(Kind == KindTy::Expression && "Invalid type access!");
+ return Expr.IsRV64;
}
MCRegister getReg() const override {
@@ -996,9 +998,9 @@ struct RISCVOperand final : public MCParsedAsmOperand {
return StringRef(SysReg.Data, SysReg.Length);
}
- const MCExpr *getImm() const {
- assert(Kind == KindTy::Immediate && "Invalid type access!");
- return Imm.Val;
+ const MCExpr *getExpr() const {
+ assert(Kind == KindTy::Expression && "Invalid type access!");
+ return Expr.Expr;
}
uint64_t getFPConst() const {
@@ -1035,10 +1037,10 @@ struct RISCVOperand final : public MCParsedAsmOperand {
};
switch (Kind) {
- case KindTy::Immediate:
+ case KindTy::Expression:
OS << "<imm: ";
- MAI.printExpr(OS, *Imm.Val);
- OS << ' ' << (Imm.IsRV64 ? "rv64" : "rv32") << '>';
+ MAI.printExpr(OS, *Expr.Expr);
+ OS << ' ' << (Expr.IsRV64 ? "rv64" : "rv32") << '>';
break;
case KindTy::FPImmediate:
OS << "<fpimm: " << FPImm.Val << ">";
@@ -1103,11 +1105,11 @@ struct RISCVOperand final : public MCParsedAsmOperand {
return Op;
}
- static std::unique_ptr<RISCVOperand> createImm(const MCExpr *Val, SMLoc S,
- SMLoc E, bool IsRV64) {
- auto Op = std::make_unique<RISCVOperand>(KindTy::Immediate);
- Op->Imm.Val = Val;
- Op->Imm.IsRV64 = IsRV64;
+ static std::unique_ptr<RISCVOperand> createExpr(const MCExpr *Val, SMLoc S,
+ SMLoc E, bool IsRV64) {
+ auto Op = std::make_unique<RISCVOperand>(KindTy::Expression);
+ Op->Expr.Expr = Val;
+ Op->Expr.IsRV64 = IsRV64;
Op->StartLoc = S;
Op->EndLoc = E;
return Op;
@@ -1185,7 +1187,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
static void addExpr(MCInst &Inst, const MCExpr *Expr, bool IsRV64Imm) {
assert(Expr && "Expr shouldn't be null!");
int64_t Imm = 0;
- bool IsConstant = evaluateConstantImm(Expr, Imm);
+ bool IsConstant = evaluateConstantExpr(Expr, Imm);
if (IsConstant)
Inst.addOperand(
@@ -1202,13 +1204,13 @@ struct RISCVOperand final : public MCParsedAsmOperand {
void addImmOperands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!");
- addExpr(Inst, getImm(), isRV64Imm());
+ addExpr(Inst, getExpr(), isRV64Expr());
}
void addSImm8UnsignedOperands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!");
int64_t Imm;
- [[maybe_unused]] bool IsConstant = evaluateConstantImm(getImm(), Imm);
+ [[maybe_unused]] bool IsConstant = evaluateConstantExpr(getExpr(), Imm);
assert(IsConstant);
Inst.addOperand(MCOperand::createImm(SignExtend64<8>(Imm)));
}
@@ -1216,15 +1218,15 @@ struct RISCVOperand final : public MCParsedAsmOperand {
void addSImm10UnsignedOperands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!");
int64_t Imm;
- [[maybe_unused]] bool IsConstant = evaluateConstantImm(getImm(), Imm);
+ [[maybe_unused]] bool IsConstant = evaluateConstantExpr(getExpr(), Imm);
assert(IsConstant);
Inst.addOperand(MCOperand::createImm(SignExtend64<10>(Imm)));
}
void addFPImmOperands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!");
- if (isImm()) {
- addExpr(Inst, getImm(), isRV64Imm());
+ if (isExpr()) {
+ addExpr(Inst, getExpr(), isRV64Expr());
return;
}
@@ -1249,8 +1251,9 @@ struct RISCVOperand final : public MCParsedAsmOperand {
void addVTypeIOperands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!");
int64_t Imm = 0;
- if (Kind == KindTy::Immediate) {
- [[maybe_unused]] bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
+ if (Kind == KindTy::Expression) {
+ [[maybe_unused]] bool IsConstantImm =
+ evaluateConstantExpr(getExpr(), Imm);
assert(IsConstantImm && "Invalid VTypeI Operand!");
} else {
Imm = getVType();
@@ -1826,7 +1829,7 @@ ParseStatus RISCVAsmParser::parseInsnDirectiveOpcode(OperandVector &Operands) {
if (CE) {
int64_t Imm = CE->getValue();
if (isUInt<7>(Imm)) {
- Operands.push_back(RISCVOperand::createImm(Res, S, E, isRV64()));
+ Operands.push_back(RISCVOperand::createExpr(Res, S, E, isRV64()));
return ParseStatus::Success;
}
}
@@ -1844,7 +1847,7 @@ ParseStatus RISCVAsmParser::parseInsnDirectiveOpcode(OperandVector &Operands) {
"Unexpected opcode");
Res = MCConstantExpr::create(Opcode->Value, getContext());
E = SMLoc::getFromPointer(S.getPointer() + Identifier.size());
- Operands.push_back(RISCVOperand::createImm(Res, S, E, isRV64()));
+ Operands.push_back(RISCVOperand::createExpr(Res, S, E, isRV64()));
return ParseStatus::Success;
}
@@ -1881,7 +1884,7 @@ ParseStatus RISCVAsmParser::parseInsnCDirectiveOpcode(OperandVector &Operands) {
if (CE) {
int64_t Imm = CE->getValue();
if (Imm >= 0 && Imm <= 2) {
- Operands.push_back(RISCVOperand::createImm(Res, S, E, isRV64()));
+ Operands.push_back(RISCVOperand::createExpr(Res, S, E, isRV64()));
return ParseStatus::Success;
}
}
@@ -1905,7 +1908,7 @@ ParseStatus RISCVAsmParser::parseInsnCDirectiveOpcode(OperandVector &Operands) {
Res = MCConstantExpr::create(Opcode, getContext());
E = SMLoc::getFromPointer(S.getPointer() + Identifier.size());
- Operands.push_back(RISCVOperand::createImm(Res, S, E, isRV64()));
+ Operands.push_back(RISCVOperand::createExpr(Res, S, E, isRV64()));
return ParseStatus::Success;
}
case AsmToken::Percent: {
@@ -2039,16 +2042,16 @@ ParseStatus RISCVAsmParser::parseFPImm(OperandVector &Operands) {
StringRef Identifier = getTok().getIdentifier();
if (Identifier.compare_insensitive("inf") == 0) {
Operands.push_back(
- RISCVOperand::createImm(MCConstantExpr::create(30, getContext()), S,
- getTok().getEndLoc(), isRV64()));
+ RISCVOperand::createExpr(MCConstantExpr::create(30, getContext()), S,
+ getTok().getEndLoc(), isRV64()));
} else if (Identifier.compare_insensitive("nan") == 0) {
Operands.push_back(
- RISCVOperand::createImm(MCConstantExpr::create(31, getContext()), S,
- getTok().getEndLoc(), isRV64()));
+ RISCVOperand::createExpr(MCConstantExpr::create(31, getContext()), S,
+ getTok().getEndLoc(), isRV64()));
} else if (Identifier.compare_insensitive("min") == 0) {
Operands.push_back(
- RISCVOperand::createImm(MCConstantExpr::create(1, getContext()), S,
- getTok().getEndLoc(), isRV64()));
+ RISCVOperand::createExpr(MCConstantExpr::create(1, getContext()), S,
+ getTok().getEndLoc(), isRV64()));
} else {
return TokError("invalid floating point literal");
}
@@ -2083,7 +2086,7 @@ ParseStatus RISCVAsmParser::parseFPImm(OperandVector &Operands) {
return ParseStatus::Success;
}
-ParseStatus RISCVAsmParser::parseImmediate(OperandVector &Operands) {
+ParseStatus RISCVAsmParser::parseExpression(OperandVector &Operands) {
SMLoc S = getLoc();
SMLoc E;
const MCExpr *Res;
@@ -2107,7 +2110,7 @@ ParseStatus RISCVAsmParser::parseImmediate(OperandVector &Operands) {
return parseOperandWithSpecifier(Operands);
}
- Operands.push_back(RISCVOperand::createImm(Res, S, E, isRV64()));
+ Operands.push_back(RISCVOperand::createExpr(Res, S, E, isRV64()));
return ParseStatus::Success;
}
@@ -2120,7 +2123,7 @@ ParseStatus RISCVAsmParser::parseOperandWithSpecifier(OperandVector &Operands) {
const MCExpr *Expr = nullptr;
bool Failed = parseExprWithSpecifier(Expr, E);
if (!Failed)
- Operands.push_back(RISCVOperand::createImm(Expr, S, E, isRV64()));
+ Operands.push_back(RISCVOperand::createExpr(Expr, S, E, isRV64()));
return Failed;
}
@@ -2182,7 +2185,7 @@ ParseStatus RISCVAsmParser::parseBareSymbol(OperandVector &Operands) {
MCBinaryExpr::Opcode Opcode;
switch (getLexer().getKind()) {
default:
- Operands.push_back(RISCVOperand::createImm(Res, S, E, isRV64()));
+ Operands.push_back(RISCVOperand::createExpr(Res, S, E, isRV64()));
return ParseStatus::Success;
case AsmToken::Plus:
Opcode = MCBinaryExpr::Add;
@@ -2198,7 +2201,7 @@ ParseStatus RISCVAsmParser::parseBareSymbol(OperandVector &Operands) {
if (getParser().parseExpression(Expr, E))
return ParseStatus::Failure;
Res = MCBinaryExpr::create(Opcode, Res, Expr, getContext());
- Operands.push_back(RISCVOperand::createImm(Res, S, E, isRV64()));
+ Operands.push_back(RISCVOperand::createExpr(Res, S, E, isRV64()));
return ParseStatus::Success;
}
@@ -2230,7 +2233,7 @@ ParseStatus RISCVAsmParser::parseCallSymbol(OperandVector &Operands) {
MCSymbol *Sym = getContext().getOrCreateSymbol(Identifier);
Res = MCSymbolRefExpr::create(Sym, getContext());
Res = MCSpecifierExpr::create(Res, Kind, getContext());
- Operands.push_back(RISCVOperand::createImm(Res, S, E, isRV64()));
+ Operands.push_back(RISCVOperand::createExpr(Res, S, E, isRV64()));
return ParseStatus::Success;
}
@@ -2246,7 +2249,7 @@ ParseStatus RISCVAsmParser::parsePseudoJumpSymbol(OperandVector &Operands) {
return Error(S, "operand must be a valid jump target");
Res = MCSpecifierExpr::create(Res, ELF::R_RISCV_CALL_PLT, getContext());
- Operands.push_back(RISCVOperand::createImm(Res, S, E, isRV64()));
+ Operands.push_back(RISCVOperand::createExpr(Res, S, E, isRV64()));
return ParseStatus::Success;
}
@@ -2255,7 +2258,7 @@ ParseStatus RISCVAsmParser::parseJALOffset(OperandVector &Operands) {
// both being acceptable forms. When parsing `jal ra, foo` this function
// will be called for the `ra` register operand in an attempt to match the
// single-operand alias. parseJALOffset must fail for this case. It would
- // seem logical to try parse the operand using parseImmediate and return
+ // seem logical to try parse the operand using parseExpression and return
// NoMatch if the next token is a comma (meaning we must be parsing a jal in
// the second form rather than the first). We can't do this as there's no
// way of rewinding the lexer state. Instead, return NoMatch if this operand
@@ -2264,7 +2267,7 @@ ParseStatus RISCVAsmParser::parseJALOffset(OperandVector &Operands) {
getLexer().peekTok().is(AsmToken::Comma))
return ParseStatus::NoMatch;
- return parseImmediate(Operands);
+ return parseExpression(Operands);
}
bool RISCVAsmParser::parseVTypeToken(const AsmToken &Tok, VTypeState &State,
@@ -2688,7 +2691,7 @@ ParseStatus RISCVAsmParser::parseZeroOffsetMemOp(OperandVector &Operands) {
// Normally, we would be able to parse these by putting the parens into the
// instruction string. However, GNU as also accepts a zero-offset memory
// operand (such as `0(a0)`), and ignores the 0. Normally this would be parsed
- // with parseImmediate followed by parseMemOpBaseReg, but these instructions
+ // with parseExpression followed by parseMemOpBaseReg, but these instructions
// do not accept an immediate operand, and we do not want to add a "dummy"
// operand that is silently dropped.
//
@@ -2715,8 +2718,8 @@ ParseStatus RISCVAsmParser::parseZeroOffsetMemOp(OperandVector &Operands) {
// nicer), but we don't add it to Operands.
SMLoc ImmEnd = getLoc();
OptionalImmOp =
- RISCVOperand::createImm(MCConstantExpr::create(ImmVal, getContext()),
- ImmStart, ImmEnd, isRV64());
+ RISCVOperand::createExpr(MCConstantExpr::create(ImmVal, getContext()),
+ ImmStart, ImmEnd, isRV64());
}
if (parseToken(AsmToken::LParen,
@@ -2927,8 +2930,8 @@ bool RISCVAsmParser::parseOperand(OperandVector &Operands, StringRef Mnemonic) {
if (parseRegister(Operands, true).isSuccess())
return false;
- // Attempt to parse token as an immediate
- if (parseImmediate(Operands).isSuccess()) {
+ // Attempt to parse token as an expression
+ if (parseExpression(Operands).isSuccess()) {
// Parse memory base register if present
if (getLexer().is(AsmToken::LParen))
return !parseMemOpBaseReg(Operands).isSuccess();
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