[llvm] [NVPTX] Add 3-operand fmin/fmax DAGCombines (PR #159729)

Durgadoss R via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 19 06:42:27 PDT 2025

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https://github.com/durga4github approved this pull request.


https://github.com/llvm/llvm-project/pull/159729

Previous message: [llvm] [NVPTX] Add 3-operand fmin/fmax DAGCombines (PR #159729)
Next message: [llvm] [X86] Remove X86ISD::VSHLDV/VSHRDV and use ISD::FSHL/FSHR opcodes directly (PR #157616)
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