[llvm] [AArch64] Use SVE to materialise some 128-bit vector constants (PR #159101)

[Paul Walker via llvm-commits]

================
@@ -15197,6 +15197,27 @@ static SDValue NormalizeBuildVector(SDValue Op,
   return DAG.getBuildVector(VT, DL, Ops);
 }
 
+static SDValue trySVESplat64(SDValue Op, SelectionDAG &DAG,
+                             const AArch64Subtarget *ST, APInt &DefBits) {
+  EVT VT = Op.getValueType();
+  // TODO: We should be able to support 64-bit destinations too
+  if (!ST->hasSVE() || DefBits.getHiBits(64) != DefBits.getLoBits(64) ||
+      VT.getFixedSizeInBits() != 128)
+    return SDValue();
+
+  // See if we can make use of the SVE dup instruction.
+  APInt Val64 = DefBits.sextOrTrunc(64);
----------------
paulwalker-arm wrote:

```suggestion
  APInt Val64 = DefBits.trunc(64);
```

https://github.com/llvm/llvm-project/pull/159101