[llvm] [AMDGPU] Fix the magic number RegisterClass for SReg_32 in test (PR #159761)

Mariusz Sikora via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 19 05:14:40 PDT 2025

Previous message: [llvm] [AMDGPU] Fix the magic number RegisterClass for SReg_32 in test (PR #159761)
Next message: [llvm] [AMDGPU][TTI] Add Target Hook for Instruction Uniformity (getInstructionUniformity) (PR #137639)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

https://github.com/mariusz-sikora-at-amd closed https://github.com/llvm/llvm-project/pull/159761

Previous message: [llvm] [AMDGPU] Fix the magic number RegisterClass for SReg_32 in test (PR #159761)
Next message: [llvm] [AMDGPU][TTI] Add Target Hook for Instruction Uniformity (getInstructionUniformity) (PR #137639)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list