[llvm] added ISD::VECTOR_COMPRESS handling in computeKnownBits/ComputeNumSign… (PR #159692)

[Simon Pilgrim via llvm-commits]

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@@ -3480,6 +3481,26 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
         break;
     }
     break;
+  case ISD::VECTOR_COMPRESS: {
+    assert(!Op.getValueType().isScalableVector());
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RKSimon wrote:

is this always the case or do you mean sve isn't supported?

https://github.com/llvm/llvm-project/pull/159692