[llvm] [LoongArch][NFC] Add tests for element extraction from binary add operation (PR #159725)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 19 02:03:35 PDT 2025
https://github.com/zhaoqi5 created https://github.com/llvm/llvm-project/pull/159725
None
>From 0875585f90bcba904e9e77fce2c7bd995b659dd7 Mon Sep 17 00:00:00 2001
From: Qi Zhao <zhaoqi01 at loongson.cn>
Date: Fri, 19 Sep 2025 16:50:37 +0800
Subject: [PATCH] [LoongArch][NFC] Add tests for element extraction from binary
add operation
---
.../CodeGen/LoongArch/lasx/extract-binop.ll | 113 ++++++++++++++++++
.../CodeGen/LoongArch/lsx/extract-binop.ll | 113 ++++++++++++++++++
2 files changed, 226 insertions(+)
create mode 100644 llvm/test/CodeGen/LoongArch/lasx/extract-binop.ll
create mode 100644 llvm/test/CodeGen/LoongArch/lsx/extract-binop.ll
diff --git a/llvm/test/CodeGen/LoongArch/lasx/extract-binop.ll b/llvm/test/CodeGen/LoongArch/lasx/extract-binop.ll
new file mode 100644
index 0000000000000..1517e11aa7d7a
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/lasx/extract-binop.ll
@@ -0,0 +1,113 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA32
+; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA64
+
+define i8 @extractelt_add_v32i8(ptr %p) {
+; CHECK-LABEL: extractelt_add_v32i8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xvld $xr0, $a0, 0
+; CHECK-NEXT: xvaddi.bu $xr0, $xr0, 13
+; CHECK-NEXT: vpickve2gr.b $a0, $vr0, 2
+; CHECK-NEXT: ret
+entry:
+ %x = load <32 x i8>, ptr %p
+ %add = add <32 x i8> %x, <i8 11, i8 12, i8 13, i8 14, i8 11, i8 12, i8 13, i8 14, i8 11, i8 12, i8 13, i8 14, i8 11, i8 12, i8 13, i8 14, i8 11, i8 12, i8 13, i8 14, i8 11, i8 12, i8 13, i8 14, i8 11, i8 12, i8 13, i8 14, i8 11, i8 12, i8 13, i8 14>
+ %ext = extractelement <32 x i8> %add, i32 2
+ ret i8 %ext
+}
+
+define i16 @extractelt_add_v16i16(ptr %p) {
+; CHECK-LABEL: extractelt_add_v16i16:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xvld $xr0, $a0, 0
+; CHECK-NEXT: xvaddi.hu $xr0, $xr0, 13
+; CHECK-NEXT: vpickve2gr.h $a0, $vr0, 2
+; CHECK-NEXT: ret
+entry:
+ %x = load <16 x i16>, ptr %p
+ %add = add <16 x i16> %x, <i16 11, i16 12, i16 13, i16 14, i16 11, i16 12, i16 13, i16 14, i16 11, i16 12, i16 13, i16 14, i16 11, i16 12, i16 13, i16 14>
+ %ext = extractelement <16 x i16> %add, i32 2
+ ret i16 %ext
+}
+
+define i32 @extractelt_add_v8i32(ptr %p) {
+; CHECK-LABEL: extractelt_add_v8i32:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xvld $xr0, $a0, 0
+; CHECK-NEXT: xvaddi.wu $xr0, $xr0, 13
+; CHECK-NEXT: xvpickve2gr.w $a0, $xr0, 2
+; CHECK-NEXT: ret
+entry:
+ %x = load <8 x i32>, ptr %p
+ %add = add <8 x i32> %x, <i32 11, i32 12, i32 13, i32 14, i32 11, i32 12, i32 13, i32 14>
+ %ext = extractelement <8 x i32> %add, i32 2
+ ret i32 %ext
+}
+
+define i64 @extractelt_add_v4i64(ptr %p) {
+; LA32-LABEL: extractelt_add_v4i64:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT: xvld $xr0, $a0, 0
+; LA32-NEXT: xvaddi.du $xr0, $xr0, 12
+; LA32-NEXT: xvpickve2gr.w $a0, $xr0, 2
+; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 3
+; LA32-NEXT: ret
+;
+; LA64-LABEL: extractelt_add_v4i64:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: xvld $xr0, $a0, 0
+; LA64-NEXT: xvaddi.du $xr0, $xr0, 12
+; LA64-NEXT: xvpickve2gr.d $a0, $xr0, 1
+; LA64-NEXT: ret
+entry:
+ %x = load <4 x i64>, ptr %p
+ %add = add <4 x i64> %x, <i64 11, i64 12, i64 13, i64 14>
+ %ext = extractelement <4 x i64> %add, i32 1
+ ret i64 %ext
+}
+
+define float @extractelt_fadd_v8f32(ptr %p) {
+; CHECK-LABEL: extractelt_fadd_v8f32:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xvld $xr0, $a0, 0
+; CHECK-NEXT: lu12i.w $a0, 267520
+; CHECK-NEXT: xvreplgr2vr.w $xr1, $a0
+; CHECK-NEXT: xvfadd.s $xr0, $xr0, $xr1
+; CHECK-NEXT: xvpickve.w $xr0, $xr0, 2
+; CHECK-NEXT: # kill: def $f0 killed $f0 killed $xr0
+; CHECK-NEXT: ret
+entry:
+ %x = load <8 x float>, ptr %p
+ %add = fadd <8 x float> %x, <float 11.0, float 12.0, float 13.0, float 14.0, float 11.0, float 12.0, float 13.0, float 14.0>
+ %ext = extractelement <8 x float> %add, i32 2
+ ret float %ext
+}
+
+define double @extractelt_fadd_v4f64(ptr %p) {
+; LA32-LABEL: extractelt_fadd_v4f64:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT: xvld $xr0, $a0, 0
+; LA32-NEXT: pcalau12i $a0, %pc_hi20(.LCPI5_0)
+; LA32-NEXT: xvld $xr1, $a0, %pc_lo12(.LCPI5_0)
+; LA32-NEXT: xvfadd.d $xr0, $xr0, $xr1
+; LA32-NEXT: xvpickve.d $xr0, $xr0, 1
+; LA32-NEXT: # kill: def $f0_64 killed $f0_64 killed $xr0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: extractelt_fadd_v4f64:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: xvld $xr0, $a0, 0
+; LA64-NEXT: ori $a0, $zero, 0
+; LA64-NEXT: lu32i.d $a0, -524288
+; LA64-NEXT: lu52i.d $a0, $a0, 1026
+; LA64-NEXT: xvreplgr2vr.d $xr1, $a0
+; LA64-NEXT: xvfadd.d $xr0, $xr0, $xr1
+; LA64-NEXT: xvpickve.d $xr0, $xr0, 1
+; LA64-NEXT: # kill: def $f0_64 killed $f0_64 killed $xr0
+; LA64-NEXT: ret
+entry:
+ %x = load <4 x double>, ptr %p
+ %add = fadd <4 x double> %x, <double 11.0, double 12.0, double 13.0, double 14.0>
+ %ext = extractelement <4 x double> %add, i32 1
+ ret double %ext
+}
diff --git a/llvm/test/CodeGen/LoongArch/lsx/extract-binop.ll b/llvm/test/CodeGen/LoongArch/lsx/extract-binop.ll
new file mode 100644
index 0000000000000..506bdf0abcc97
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/lsx/extract-binop.ll
@@ -0,0 +1,113 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lsx < %s | FileCheck %s --check-prefixes=CHECK,LA32
+; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s --check-prefixes=CHECK,LA64
+
+define i8 @extractelt_add_v16i8(ptr %p) {
+; CHECK-LABEL: extractelt_add_v16i8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vld $vr0, $a0, 0
+; CHECK-NEXT: vaddi.bu $vr0, $vr0, 13
+; CHECK-NEXT: vpickve2gr.b $a0, $vr0, 2
+; CHECK-NEXT: ret
+entry:
+ %x = load <16 x i8>, ptr %p
+ %add = add <16 x i8> %x, <i8 11, i8 12, i8 13, i8 14, i8 11, i8 12, i8 13, i8 14, i8 11, i8 12, i8 13, i8 14, i8 11, i8 12, i8 13, i8 14>
+ %ext = extractelement <16 x i8> %add, i32 2
+ ret i8 %ext
+}
+
+define i16 @extractelt_add_v8i16(ptr %p) {
+; CHECK-LABEL: extractelt_add_v8i16:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vld $vr0, $a0, 0
+; CHECK-NEXT: vaddi.hu $vr0, $vr0, 13
+; CHECK-NEXT: vpickve2gr.h $a0, $vr0, 2
+; CHECK-NEXT: ret
+entry:
+ %x = load <8 x i16>, ptr %p
+ %add = add <8 x i16> %x, <i16 11, i16 12, i16 13, i16 14, i16 11, i16 12, i16 13, i16 14>
+ %ext = extractelement <8 x i16> %add, i32 2
+ ret i16 %ext
+}
+
+define i32 @extractelt_add_v4i32(ptr %p) {
+; CHECK-LABEL: extractelt_add_v4i32:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vld $vr0, $a0, 0
+; CHECK-NEXT: vaddi.wu $vr0, $vr0, 13
+; CHECK-NEXT: vpickve2gr.w $a0, $vr0, 2
+; CHECK-NEXT: ret
+entry:
+ %x = load <4 x i32>, ptr %p
+ %add = add <4 x i32> %x, <i32 11, i32 12, i32 13, i32 14>
+ %ext = extractelement <4 x i32> %add, i32 2
+ ret i32 %ext
+}
+
+define i64 @extractelt_add_v2i64(ptr %p) {
+; LA32-LABEL: extractelt_add_v2i64:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT: vld $vr0, $a0, 0
+; LA32-NEXT: vaddi.du $vr0, $vr0, 12
+; LA32-NEXT: vpickve2gr.w $a0, $vr0, 2
+; LA32-NEXT: vpickve2gr.w $a1, $vr0, 3
+; LA32-NEXT: ret
+;
+; LA64-LABEL: extractelt_add_v2i64:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: vld $vr0, $a0, 0
+; LA64-NEXT: vaddi.du $vr0, $vr0, 12
+; LA64-NEXT: vpickve2gr.d $a0, $vr0, 1
+; LA64-NEXT: ret
+entry:
+ %x = load <2 x i64>, ptr %p
+ %add = add <2 x i64> %x, <i64 11, i64 12>
+ %ext = extractelement <2 x i64> %add, i32 1
+ ret i64 %ext
+}
+
+define float @extractelt_fadd_v4f32(ptr %p) {
+; CHECK-LABEL: extractelt_fadd_v4f32:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vld $vr0, $a0, 0
+; CHECK-NEXT: lu12i.w $a0, 267520
+; CHECK-NEXT: vreplgr2vr.w $vr1, $a0
+; CHECK-NEXT: vfadd.s $vr0, $vr0, $vr1
+; CHECK-NEXT: vreplvei.w $vr0, $vr0, 2
+; CHECK-NEXT: # kill: def $f0 killed $f0 killed $vr0
+; CHECK-NEXT: ret
+entry:
+ %x = load <4 x float>, ptr %p
+ %add = fadd <4 x float> %x, <float 11.0, float 12.0, float 13.0, float 14.0>
+ %ext = extractelement <4 x float> %add, i32 2
+ ret float %ext
+}
+
+define double @extractelt_fadd_v2f64(ptr %p) {
+; LA32-LABEL: extractelt_fadd_v2f64:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT: vld $vr0, $a0, 0
+; LA32-NEXT: pcalau12i $a0, %pc_hi20(.LCPI5_0)
+; LA32-NEXT: vld $vr1, $a0, %pc_lo12(.LCPI5_0)
+; LA32-NEXT: vfadd.d $vr0, $vr0, $vr1
+; LA32-NEXT: vreplvei.d $vr0, $vr0, 1
+; LA32-NEXT: # kill: def $f0_64 killed $f0_64 killed $vr0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: extractelt_fadd_v2f64:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: vld $vr0, $a0, 0
+; LA64-NEXT: ori $a0, $zero, 0
+; LA64-NEXT: lu32i.d $a0, -524288
+; LA64-NEXT: lu52i.d $a0, $a0, 1026
+; LA64-NEXT: vreplgr2vr.d $vr1, $a0
+; LA64-NEXT: vfadd.d $vr0, $vr0, $vr1
+; LA64-NEXT: vreplvei.d $vr0, $vr0, 1
+; LA64-NEXT: # kill: def $f0_64 killed $f0_64 killed $vr0
+; LA64-NEXT: ret
+entry:
+ %x = load <2 x double>, ptr %p
+ %add = fadd <2 x double> %x, <double 11.0, double 12.0>
+ %ext = extractelement <2 x double> %add, i32 1
+ ret double %ext
+}
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