[llvm] [TTI][ASan][RISCV] Move InterestingMemoryOperand to Analysis and embed in MemIntrinsicInfo (PR #157863)

[Hank Chang via llvm-commits]

HankChang736 wrote:

It seems that the fail case all contains an error message, 
`/home/buildbot/buildbot-root/llvm-clang-x86_64-sie-ubuntu-fast/build/bin/opt: warning: failed to infer data layout: unable to get target for 'riscv64', see --version and --triple`. 

Maybe add `; REQUIRES: riscv-registered-target` in `llvm/test/Instrumentation/AdddressSanitizer/RISCV/asan-rvv-intrinsics.ll` can solve.

https://github.com/llvm/llvm-project/pull/157863