[llvm] [AArch64][SVE2p1] Allow more uses of mask in performActiveLaneMaskCombine (PR #159360)

[Kerry McLaughlin via llvm-commits]

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@@ -18833,18 +18843,21 @@ performActiveLaneMaskCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI,
   DCI.CombineTo(Extracts[0], R.getValue(0));
   DCI.CombineTo(Extracts[1], R.getValue(1));
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kmclaughlin-arm wrote:

As we discussed earlier, I've changed this PR to focus only on the changes to performActiveLaneMaskCombine as these are enough to use the paired whilelo in the test cases. The combine is now using `ISD::CONCAT_VECTORS` as described above.

Improving codegen of those tests (i.e. removing the ptest) will be addressed separately.

https://github.com/llvm/llvm-project/pull/159360