[llvm] [CodeGen][NewPM] Port `ReachingDefAnalysis` to new pass manager. (PR #159572)
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Thu Sep 18 06:31:23 PDT 2025
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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp,h -- llvm/include/llvm/CodeGen/ExecutionDomainFix.h llvm/include/llvm/CodeGen/ReachingDefAnalysis.h llvm/include/llvm/InitializePasses.h llvm/lib/CodeGen/BreakFalseDeps.cpp llvm/lib/CodeGen/CodeGen.cpp llvm/lib/CodeGen/ExecutionDomainFix.cpp llvm/lib/CodeGen/ReachingDefAnalysis.cpp llvm/lib/Passes/PassBuilder.cpp llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp llvm/lib/Target/ARM/ARMTargetMachine.cpp llvm/lib/Target/X86/X86TargetMachine.cpp
``````````
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``````````diff
diff --git a/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h b/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
index 3c152b56f..ea1b3cd8f 100644
--- a/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
+++ b/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
@@ -312,8 +312,7 @@ private:
MachineInstr *getReachingLocalMIDef(MachineInstr *MI, Register Reg) const;
};
-class ReachingDefAnalysis
- : public AnalysisInfoMixin<ReachingDefAnalysis> {
+class ReachingDefAnalysis : public AnalysisInfoMixin<ReachingDefAnalysis> {
friend AnalysisInfoMixin<ReachingDefAnalysis>;
static AnalysisKey Key;
@@ -324,8 +323,7 @@ public:
};
/// Printer pass for the \c ReachingDefInfo results.
-class ReachingDefPrinterPass
- : public PassInfoMixin<ReachingDefPrinterPass> {
+class ReachingDefPrinterPass : public PassInfoMixin<ReachingDefPrinterPass> {
raw_ostream &OS;
public:
diff --git a/llvm/lib/CodeGen/ReachingDefAnalysis.cpp b/llvm/lib/CodeGen/ReachingDefAnalysis.cpp
index 6ead755e9..17a35dc1a 100644
--- a/llvm/lib/CodeGen/ReachingDefAnalysis.cpp
+++ b/llvm/lib/CodeGen/ReachingDefAnalysis.cpp
@@ -24,7 +24,7 @@ AnalysisKey ReachingDefAnalysis::Key;
ReachingDefAnalysis::Result
ReachingDefAnalysis::run(MachineFunction &MF,
- MachineFunctionAnalysisManager &MFAM) {
+ MachineFunctionAnalysisManager &MFAM) {
ReachingDefInfo RDI;
RDI.run(MF);
return RDI;
@@ -32,7 +32,7 @@ ReachingDefAnalysis::run(MachineFunction &MF,
PreservedAnalyses
ReachingDefPrinterPass::run(MachineFunction &MF,
- MachineFunctionAnalysisManager &MFAM) {
+ MachineFunctionAnalysisManager &MFAM) {
auto &RDI = MFAM.getResult<ReachingDefAnalysis>(MF);
OS << "Reaching definitions for for machine function: " << MF.getName()
<< '\n';
@@ -40,13 +40,14 @@ ReachingDefPrinterPass::run(MachineFunction &MF,
return PreservedAnalyses::all();
}
-INITIALIZE_PASS(ReachingDefInfoWrapperPass, DEBUG_TYPE, "Reaching Definitions Analysis", false,
- true)
+INITIALIZE_PASS(ReachingDefInfoWrapperPass, DEBUG_TYPE,
+ "Reaching Definitions Analysis", false, true)
char ReachingDefInfoWrapperPass::ID = 0;
-ReachingDefInfoWrapperPass::ReachingDefInfoWrapperPass() : MachineFunctionPass(ID) {
- initializeReachingDefInfoWrapperPassPass(*PassRegistry::getPassRegistry());
+ReachingDefInfoWrapperPass::ReachingDefInfoWrapperPass()
+ : MachineFunctionPass(ID) {
+ initializeReachingDefInfoWrapperPassPass(*PassRegistry::getPassRegistry());
}
ReachingDefInfo::ReachingDefInfo() = default;
@@ -411,14 +412,14 @@ int ReachingDefInfo::getReachingDef(MachineInstr *MI, Register Reg) const {
}
MachineInstr *ReachingDefInfo::getReachingLocalMIDef(MachineInstr *MI,
- Register Reg) const {
+ Register Reg) const {
return hasLocalDefBefore(MI, Reg)
? getInstFromId(MI->getParent(), getReachingDef(MI, Reg))
: nullptr;
}
bool ReachingDefInfo::hasSameReachingDef(MachineInstr *A, MachineInstr *B,
- Register Reg) const {
+ Register Reg) const {
MachineBasicBlock *ParentA = A->getParent();
MachineBasicBlock *ParentB = B->getParent();
if (ParentA != ParentB)
@@ -428,7 +429,7 @@ bool ReachingDefInfo::hasSameReachingDef(MachineInstr *A, MachineInstr *B,
}
MachineInstr *ReachingDefInfo::getInstFromId(MachineBasicBlock *MBB,
- int InstId) const {
+ int InstId) const {
assert(static_cast<size_t>(MBB->getNumber()) <
MBBReachingDefs.numBlockIDs() &&
"Unexpected basic block number.");
@@ -452,13 +453,12 @@ int ReachingDefInfo::getClearance(MachineInstr *MI, Register Reg) const {
return InstIds.lookup(MI) - getReachingDef(MI, Reg);
}
-bool ReachingDefInfo::hasLocalDefBefore(MachineInstr *MI,
- Register Reg) const {
+bool ReachingDefInfo::hasLocalDefBefore(MachineInstr *MI, Register Reg) const {
return getReachingDef(MI, Reg) >= 0;
}
void ReachingDefInfo::getReachingLocalUses(MachineInstr *Def, Register Reg,
- InstSet &Uses) const {
+ InstSet &Uses) const {
MachineBasicBlock *MBB = Def->getParent();
MachineBasicBlock::iterator MI = MachineBasicBlock::iterator(Def);
while (++MI != MBB->end()) {
@@ -482,7 +482,7 @@ void ReachingDefInfo::getReachingLocalUses(MachineInstr *Def, Register Reg,
}
bool ReachingDefInfo::getLiveInUses(MachineBasicBlock *MBB, Register Reg,
- InstSet &Uses) const {
+ InstSet &Uses) const {
for (MachineInstr &MI :
instructionsWithoutDebug(MBB->instr_begin(), MBB->instr_end())) {
for (auto &MO : MI.operands()) {
@@ -500,7 +500,7 @@ bool ReachingDefInfo::getLiveInUses(MachineBasicBlock *MBB, Register Reg,
}
void ReachingDefInfo::getGlobalUses(MachineInstr *MI, Register Reg,
- InstSet &Uses) const {
+ InstSet &Uses) const {
MachineBasicBlock *MBB = MI->getParent();
// Collect the uses that each def touches within the block.
@@ -525,7 +525,7 @@ void ReachingDefInfo::getGlobalUses(MachineInstr *MI, Register Reg,
}
void ReachingDefInfo::getGlobalReachingDefs(MachineInstr *MI, Register Reg,
- InstSet &Defs) const {
+ InstSet &Defs) const {
if (auto *Def = getUniqueReachingMIDef(MI, Reg)) {
Defs.insert(Def);
return;
@@ -536,14 +536,13 @@ void ReachingDefInfo::getGlobalReachingDefs(MachineInstr *MI, Register Reg,
}
void ReachingDefInfo::getLiveOuts(MachineBasicBlock *MBB, Register Reg,
- InstSet &Defs) const {
+ InstSet &Defs) const {
SmallPtrSet<MachineBasicBlock*, 2> VisitedBBs;
getLiveOuts(MBB, Reg, Defs, VisitedBBs);
}
void ReachingDefInfo::getLiveOuts(MachineBasicBlock *MBB, Register Reg,
- InstSet &Defs,
- BlockSet &VisitedBBs) const {
+ InstSet &Defs, BlockSet &VisitedBBs) const {
if (VisitedBBs.count(MBB))
return;
@@ -561,7 +560,7 @@ void ReachingDefInfo::getLiveOuts(MachineBasicBlock *MBB, Register Reg,
}
MachineInstr *ReachingDefInfo::getUniqueReachingMIDef(MachineInstr *MI,
- Register Reg) const {
+ Register Reg) const {
// If there's a local def before MI, return it.
MachineInstr *LocalDef = getReachingLocalMIDef(MI, Reg);
if (LocalDef && InstIds.lookup(LocalDef) < InstIds.lookup(MI))
@@ -581,13 +580,13 @@ MachineInstr *ReachingDefInfo::getUniqueReachingMIDef(MachineInstr *MI,
}
MachineInstr *ReachingDefInfo::getMIOperand(MachineInstr *MI,
- unsigned Idx) const {
+ unsigned Idx) const {
assert(MI->getOperand(Idx).isReg() && "Expected register operand");
return getUniqueReachingMIDef(MI, MI->getOperand(Idx).getReg());
}
MachineInstr *ReachingDefInfo::getMIOperand(MachineInstr *MI,
- MachineOperand &MO) const {
+ MachineOperand &MO) const {
assert(MO.isReg() && "Expected register operand");
return getUniqueReachingMIDef(MI, MO.getReg());
}
@@ -612,8 +611,7 @@ bool ReachingDefInfo::isRegUsedAfter(MachineInstr *MI, Register Reg) const {
return false;
}
-bool ReachingDefInfo::isRegDefinedAfter(MachineInstr *MI,
- Register Reg) const {
+bool ReachingDefInfo::isRegDefinedAfter(MachineInstr *MI, Register Reg) const {
MachineBasicBlock *MBB = MI->getParent();
auto Last = MBB->getLastNonDebugInstr();
if (Last != MBB->end() &&
@@ -627,7 +625,7 @@ bool ReachingDefInfo::isRegDefinedAfter(MachineInstr *MI,
}
bool ReachingDefInfo::isReachingDefLiveOut(MachineInstr *MI,
- Register Reg) const {
+ Register Reg) const {
MachineBasicBlock *MBB = MI->getParent();
LiveRegUnits LiveRegs(*TRI);
LiveRegs.addLiveOuts(*MBB);
@@ -648,7 +646,7 @@ bool ReachingDefInfo::isReachingDefLiveOut(MachineInstr *MI,
}
MachineInstr *ReachingDefInfo::getLocalLiveOutMIDef(MachineBasicBlock *MBB,
- Register Reg) const {
+ Register Reg) const {
LiveRegUnits LiveRegs(*TRI);
LiveRegs.addLiveOuts(*MBB);
if (Reg.isPhysical() && LiveRegs.available(Reg))
@@ -682,9 +680,8 @@ static bool mayHaveSideEffects(MachineInstr &MI) {
// Can we safely move 'From' to just before 'To'? To satisfy this, 'From' must
// not define a register that is used by any instructions, after and including,
// 'To'. These instructions also must not redefine any of Froms operands.
-template<typename Iterator>
-bool ReachingDefInfo::isSafeToMove(MachineInstr *From,
- MachineInstr *To) const {
+template <typename Iterator>
+bool ReachingDefInfo::isSafeToMove(MachineInstr *From, MachineInstr *To) const {
if (From->getParent() != To->getParent() || From == To)
return false;
@@ -713,7 +710,7 @@ bool ReachingDefInfo::isSafeToMove(MachineInstr *From,
}
bool ReachingDefInfo::isSafeToMoveForwards(MachineInstr *From,
- MachineInstr *To) const {
+ MachineInstr *To) const {
using Iterator = MachineBasicBlock::iterator;
// Walk forwards until we find the instruction.
for (auto I = Iterator(From), E = From->getParent()->end(); I != E; ++I)
@@ -723,7 +720,7 @@ bool ReachingDefInfo::isSafeToMoveForwards(MachineInstr *From,
}
bool ReachingDefInfo::isSafeToMoveBackwards(MachineInstr *From,
- MachineInstr *To) const {
+ MachineInstr *To) const {
using Iterator = MachineBasicBlock::reverse_iterator;
// Walk backwards until we find the instruction.
for (auto I = Iterator(From), E = From->getParent()->rend(); I != E; ++I)
@@ -733,22 +730,20 @@ bool ReachingDefInfo::isSafeToMoveBackwards(MachineInstr *From,
}
bool ReachingDefInfo::isSafeToRemove(MachineInstr *MI,
- InstSet &ToRemove) const {
+ InstSet &ToRemove) const {
SmallPtrSet<MachineInstr*, 1> Ignore;
SmallPtrSet<MachineInstr*, 2> Visited;
return isSafeToRemove(MI, Visited, ToRemove, Ignore);
}
-bool
-ReachingDefInfo::isSafeToRemove(MachineInstr *MI, InstSet &ToRemove,
- InstSet &Ignore) const {
+bool ReachingDefInfo::isSafeToRemove(MachineInstr *MI, InstSet &ToRemove,
+ InstSet &Ignore) const {
SmallPtrSet<MachineInstr*, 2> Visited;
return isSafeToRemove(MI, Visited, ToRemove, Ignore);
}
-bool
-ReachingDefInfo::isSafeToRemove(MachineInstr *MI, InstSet &Visited,
- InstSet &ToRemove, InstSet &Ignore) const {
+bool ReachingDefInfo::isSafeToRemove(MachineInstr *MI, InstSet &Visited,
+ InstSet &ToRemove, InstSet &Ignore) const {
if (Visited.count(MI) || Ignore.count(MI))
return true;
else if (mayHaveSideEffects(*MI)) {
@@ -777,7 +772,7 @@ ReachingDefInfo::isSafeToRemove(MachineInstr *MI, InstSet &Visited,
}
void ReachingDefInfo::collectKilledOperands(MachineInstr *MI,
- InstSet &Dead) const {
+ InstSet &Dead) const {
Dead.insert(MI);
auto IsDead = [this, &Dead](MachineInstr *Def, Register Reg) {
if (mayHaveSideEffects(*Def))
@@ -808,14 +803,13 @@ void ReachingDefInfo::collectKilledOperands(MachineInstr *MI,
}
}
-bool ReachingDefInfo::isSafeToDefRegAt(MachineInstr *MI,
- Register Reg) const {
+bool ReachingDefInfo::isSafeToDefRegAt(MachineInstr *MI, Register Reg) const {
SmallPtrSet<MachineInstr*, 1> Ignore;
return isSafeToDefRegAt(MI, Reg, Ignore);
}
bool ReachingDefInfo::isSafeToDefRegAt(MachineInstr *MI, Register Reg,
- InstSet &Ignore) const {
+ InstSet &Ignore) const {
// Check for any uses of the register after MI.
if (isRegUsedAfter(MI, Reg)) {
if (auto *Def = getReachingLocalMIDef(MI, Reg)) {
diff --git a/llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp b/llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp
index c2f3bf6c1..3f9ea3757 100644
--- a/llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp
+++ b/llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp
@@ -267,8 +267,7 @@ bool ARMFixCortexA57AES1742098::runOnMachineFunction(MachineFunction &F) {
}
void ARMFixCortexA57AES1742098::analyzeMF(
- MachineFunction &MF, ReachingDefInfo &RDI,
- const ARMBaseRegisterInfo *TRI,
+ MachineFunction &MF, ReachingDefInfo &RDI, const ARMBaseRegisterInfo *TRI,
SmallVectorImpl<AESFixupLocation> &FixupLocsForFn) const {
unsigned MaxAllowedFixups = 0;
diff --git a/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp b/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
index 2a676f307..96ee69cf3 100644
--- a/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
+++ b/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
@@ -382,9 +382,8 @@ namespace {
bool CannotTailPredicate = false;
VPTState VPTstate;
- LowOverheadLoop(MachineLoop &ML, MachineLoopInfo &MLI,
- ReachingDefInfo &RDI, const TargetRegisterInfo &TRI,
- const ARMBaseInstrInfo &TII)
+ LowOverheadLoop(MachineLoop &ML, MachineLoopInfo &MLI, ReachingDefInfo &RDI,
+ const TargetRegisterInfo &TRI, const ARMBaseInstrInfo &TII)
: ML(ML), MLI(MLI), RDI(RDI), TRI(TRI), TII(TII),
TPNumElements(MachineOperand::CreateImm(0)) {
MF = ML.getHeader()->getParent();
@@ -468,7 +467,7 @@ namespace {
class ARMLowOverheadLoops : public MachineFunctionPass {
MachineFunction *MF = nullptr;
MachineLoopInfo *MLI = nullptr;
- ReachingDefInfo *RDI = nullptr;
+ ReachingDefInfo *RDI = nullptr;
const ARMBaseInstrInfo *TII = nullptr;
MachineRegisterInfo *MRI = nullptr;
const TargetRegisterInfo *TRI = nullptr;
@@ -525,8 +524,8 @@ char ARMLowOverheadLoops::ID = 0;
INITIALIZE_PASS(ARMLowOverheadLoops, DEBUG_TYPE, ARM_LOW_OVERHEAD_LOOPS_NAME,
false, false)
-static bool TryRemove(MachineInstr *MI, ReachingDefInfo &RDI,
- InstSet &ToRemove, InstSet &Ignore) {
+static bool TryRemove(MachineInstr *MI, ReachingDefInfo &RDI, InstSet &ToRemove,
+ InstSet &Ignore) {
// Check that we can remove all of Killed without having to modify any IT
// blocks.
``````````
</details>
https://github.com/llvm/llvm-project/pull/159572
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