[clang] [llvm] RISCV: the builtins support for MIPS RV64 P8700 execution control . (PR #159246)

[via llvm-commits]

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@@ -0,0 +1,27 @@
+//==- BuiltinsRISCVXMIPS.td - RISC-V MIPS  Builtin database    ----*- C++ -*-==//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the MIPS-specific builtin function database.  Users of
+// this file must define the BUILTIN macro to make use of this information.
+//
+//===----------------------------------------------------------------------===//
+
+class RISCVXMIPSBuiltin<string prototype, string features = ""> : TargetBuiltin {
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ukalappa-mips wrote:

Thank you @wangpc-pp  ,make sense

https://github.com/llvm/llvm-project/pull/159246