[llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)

via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 17 08:02:33 PDT 2025


================
@@ -468,6 +488,91 @@ bool Vectorizer::run() {
   return Changed;
 }
 
+Value *Vectorizer::insertCast(Value *Val, Type *DstTy) {
+  if (DL.getTypeSizeInBits(Val->getType()) == DL.getTypeSizeInBits(DstTy)) {
+    return Builder.CreateBitOrPointerCast(Val, DstTy, Val->getName() + ".bc");
+  }
+
+  // If the types are of different sizes and both are integers, we can use
+  // zext or sext to cast.
+  if (Val->getType()->isIntegerTy() && DstTy->isIntegerTy()) {
+    if (DL.getTypeSizeInBits(Val->getType()) < DL.getTypeSizeInBits(DstTy)) {
+      return Builder.CreateZExt(Val, DstTy, Val->getName() + ".bc");
+    }
+    return Builder.CreateTrunc(Val, DstTy, Val->getName() + ".bc");
+  }
+
+  return nullptr;
+}
+
+std::optional<APInt> Vectorizer::computeLeaderDelta(Instruction *I1,
+                                                    Instruction *I2) {
+  assert((isa<LoadInst>(I1) || isa<StoreInst>(I1)) &&
+         (isa<LoadInst>(I2) || isa<StoreInst>(I2)) &&
+         "computeLeaderDelta must be called with load or store instructions");
----------------
LU-JOHN wrote:

Can this be:

assert((isa<LoadInst>(I1) && isa<LoadInst>(I2)) ||
           (isa<StoreInst>(I1) && isa<StoreInst>(I2)) &&
         "computeLeaderDelta must be called with two load or two store instructions");

https://github.com/llvm/llvm-project/pull/154069


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