[llvm] New POC (PR #159201)

[Rahul Joshi via llvm-commits]

jurahul wrote:

When we remove all the decoder namesapces for AARch64, we get this conflict:

```
    ................................
    ...101..........................
    110101..........................
    11010101000.....................
    11010101000 .....................
    11010101000 0111001110000000_____  APAS
    11010101000 000000100____01011111  AXFLAG
    11010101000 000000100____00011111  CFINV
    11010101000 000110011____01011111  CLREX
    11010101000 000110011____10111111  DMB
    11010101000 000110011____10011111  DSB
    11010101000 000110011__1000111111  DSBnXS
    11010101000 0101101110111000_____  GCSPUSHM
    11010101000 0101101110111010_____  GCSSS1
    11010101000 000110010_______11111  HINT
    11010101000 000110011____11011111  ISB
    11010101000 _____________________  MSR, 
    11010101000 00___0100_______11111  MSRpstateImm1, 
    11010101000 00___0100_______11111  MSRpstateImm4, 
    11010101000 000110100____01111111  MSRpstatesvcrImm1
    11010101000 000110011____11111111  SB
    11010101000 0000110010110___11111  STSHH
    11010101000 01___________________  SYSxt
    11010101000 0101101110010111_____  TRCIT
    11010101000 0001100010000000_____  WFET
    11010101000 0001100010000001_____  WFIT
    11010101000 000000100____00111111  XAFLAG 
```
The heuristic here is to separate the `MSR` instruction as it has the least assertive known bits and attempt to decode the rest of the set under a OPC_SCope. If any one of them succeeds, we are good, else if it fails and pops the scope (which can happen if a checkfield or checkpredicate fail or one of these does not have a complete decoder and its Decode fails) and then attempt each of the N insts with all unfiltered unknown bits 1 by 1.

https://github.com/llvm/llvm-project/pull/159201