[llvm] [InstCombine] Add optimization to combine adds through zext nneg, and add testcase (PR #157723)

via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 16 09:29:05 PDT 2025

Previous message: [llvm] [AMDGPU][True16][CodeGen] add a 16bit d16 predicate for true16 mode (PR #156574)
Next message: [llvm] [InstCombine] Add optimization to combine adds through zext nneg, and add testcase (PR #157723)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

https://github.com/Aethezz edited https://github.com/llvm/llvm-project/pull/157723

Previous message: [llvm] [AMDGPU][True16][CodeGen] add a 16bit d16 predicate for true16 mode (PR #156574)
Next message: [llvm] [InstCombine] Add optimization to combine adds through zext nneg, and add testcase (PR #157723)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list